[PATCH v1 0/3] Revive TEGRA_SUPPORT_NON_SECURE
Revive TEGRA_SUPPORT_NON_SECURE used for T124 and adapt it to be used on T114 as well.
Nonsecure state detection used on T124 works on T114 as well, tested by me personally on tegratab.
Svyatoslav Ryhel (3): ARM: tegra124: convert TEGRA_SUPPORT_NON_SECURE into Kconfig ARM: tegra114: expand MC register map ARM: tegra114: support nonsecure state detection
README | 7 ------ arch/arm/include/asm/arch-tegra114/mc.h | 29 +++++++++++++++++++++++-- arch/arm/mach-tegra/Kconfig | 7 ++++++ arch/arm/mach-tegra/board.c | 3 --- 4 files changed, 34 insertions(+), 12 deletions(-)
Signed-off-by: Svyatoslav Ryhel clamor95@gmail.com --- README | 7 ------- arch/arm/mach-tegra/Kconfig | 7 +++++++ arch/arm/mach-tegra/board.c | 3 --- 3 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/README b/README index 805c06598d..b940fae706 100644 --- a/README +++ b/README @@ -300,13 +300,6 @@ The following options need to be configured: different from COUNTER_FREQUENCY, and can only be determined at run time.
-- Tegra SoC options: - CONFIG_TEGRA_SUPPORT_NON_SECURE - - Support executing U-Boot in non-secure (NS) mode. Certain - impossible actions will be skipped if the CPU is in NS mode, - such as ARM architectural timer initialization. - - Linux Kernel Interface: CONFIG_OF_LIBFDT
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index b18885f4c1..fb1a46b780 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -176,6 +176,13 @@ config TEGRA_DISCONNECT_UDC_ON_BOOT USB controller when U-Boot boots to avoid leaving a stale USB device present.
+config TEGRA_SUPPORT_NON_SECURE + bool "Support executing U-Boot in non-secure (NS) mode" + depends on TEGRA124 + help + Certain impossible actions will be skipped if the CPU is in NS mode, + such as ARM architectural timer initialization. + config CI_UDC_HAS_HOSTPC def_bool y depends on CI_UDC && !TEGRA20 diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index 9224743d0e..327d70bd4c 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -77,9 +77,6 @@ bool spl_was_boot_source(void) }
#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) -#if !defined(CONFIG_TEGRA124) -#error tegra_cpu_is_non_secure has only been validated on Tegra124 -#endif bool tegra_cpu_is_non_secure(void) { /*
This expansion is required for nonsecure detection to work correctly.
Signed-off-by: Svyatoslav Ryhel clamor95@gmail.com --- arch/arm/include/asm/arch-tegra114/mc.h | 29 +++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra114/mc.h b/arch/arm/include/asm/arch-tegra114/mc.h index 3930bab571..2fd2f50b0e 100644 --- a/arch/arm/include/asm/arch-tegra114/mc.h +++ b/arch/arm/include/asm/arch-tegra114/mc.h @@ -25,9 +25,34 @@ struct mc_ctlr { u32 mc_emem_adr_cfg; /* offset 0x54 */ u32 mc_emem_adr_cfg_dev0; /* offset 0x58 */ u32 mc_emem_adr_cfg_dev1; /* offset 0x5C */ - u32 reserved3[12]; /* offset 0x60 - 0x8C */ + u32 reserved3[4]; /* offset 0x60 - 0x6C */ + u32 mc_security_cfg0; /* offset 0x70 */ + u32 mc_security_cfg1; /* offset 0x74 */ + u32 reserved4[6]; /* offset 0x7C - 0x8C */ u32 mc_emem_arb_reserved[28]; /* offset 0x90 - 0xFC */ - u32 reserved4[338]; /* offset 0x100 - 0x644 */ + u32 reserved5[74]; /* offset 0x100 - 0x224 */ + u32 mc_smmu_translation_enable_0; /* offset 0x228 */ + u32 mc_smmu_translation_enable_1; /* offset 0x22C */ + u32 mc_smmu_translation_enable_2; /* offset 0x230 */ + u32 mc_smmu_translation_enable_3; /* offset 0x234 */ + u32 mc_smmu_afi_asid; /* offset 0x238 */ + u32 mc_smmu_avpc_asid; /* offset 0x23C */ + u32 mc_smmu_dc_asid; /* offset 0x240 */ + u32 mc_smmu_dcb_asid; /* offset 0x244 */ + u32 reserved6[2]; /* offset 0x248 - 0x24C */ + u32 mc_smmu_hc_asid; /* offset 0x250 */ + u32 mc_smmu_hda_asid; /* offset 0x254 */ + u32 mc_smmu_isp_asid; /* offset 0x258 */ + u32 reserved7[2]; /* offset 0x25C - 0x260 */ + u32 mc_smmu_mpe_asid; /* offset 0x264 */ + u32 mc_smmu_nv_asid; /* offset 0x268 */ + u32 mc_smmu_nv2_asid; /* offset 0x26C */ + u32 mc_smmu_ppcs_asid; /* offset 0x270 */ + u32 reserved8[1]; /* offset 0x274 */ + u32 mc_smmu_sata_asid; /* offset 0x278 */ + u32 mc_smmu_vde_asid; /* offset 0x27C */ + u32 mc_smmu_vi_asid; /* offset 0x280 */ + u32 reserved9[241]; /* offset 0x284 - 0x644 */ u32 mc_video_protect_bom; /* offset 0x648 */ u32 mc_video_protect_size_mb; /* offset 0x64c */ u32 mc_video_protect_reg_ctrl; /* offset 0x650 */
Prinsiple is exactly the same as on T124, testing of register which behaves differently in secure and non-secure states.
Signed-off-by: Svyatoslav Ryhel clamor95@gmail.com --- arch/arm/mach-tegra/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index fb1a46b780..c8907bccec 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -178,7 +178,7 @@ config TEGRA_DISCONNECT_UDC_ON_BOOT
config TEGRA_SUPPORT_NON_SECURE bool "Support executing U-Boot in non-secure (NS) mode" - depends on TEGRA124 + depends on TEGRA114 || TEGRA124 help Certain impossible actions will be skipped if the CPU is in NS mode, such as ARM architectural timer initialization.
participants (1)
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Svyatoslav Ryhel