[U-Boot] [PATCH v2 0/2] Add support for only one CS in fsl Quad SPI
SOC’s like LS1012A has only one chip select signal out to connect with flash and the 64M flash is attached to it. On boards the same CS is connected to different flash via mux. So at one time only one flash is active and it is not possible to scan other flash at run time.
Suresh Gupta (2): spi: fsl_qspi: Add support for one chip select armv8: dts: fsl-ls1012a: Change number of CS in SPI node
arch/arm/dts/fsl-ls1012a.dtsi | 2 +- drivers/spi/fsl_qspi.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-)
SOC’s like LS1012A has only one chip select signal out to connect with flash. So at one time only one flash is active and it is not possible to scan other flash at run time.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com --- drivers/spi/fsl_qspi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index b2a0583..e61c67b 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -1037,8 +1037,11 @@ static int fsl_qspi_probe(struct udevice *bus) * setting the size of these devices to 0. This would ensure * that the complete memory map is assigned to only one flash device. */ - qspi_write32(priv->flags, &priv->regs->sfa1ad, priv->amba_base[1]); + qspi_write32(priv->flags, &priv->regs->sfa1ad, + priv->amba_base[0] + amba_size_per_chip); switch (priv->num_chipselect) { + case 1: + break; case 2: qspi_write32(priv->flags, &priv->regs->sfa2ad, priv->amba_base[1]);
On 02/21/2017 12:55 AM, Suresh Gupta wrote:
SOC’s like LS1012A has only one chip select signal out to connect with flash. So at one time only one flash is active and it is not possible to scan other flash at run time.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
drivers/spi/fsl_qspi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index b2a0583..e61c67b 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -1037,8 +1037,11 @@ static int fsl_qspi_probe(struct udevice *bus) * setting the size of these devices to 0. This would ensure * that the complete memory map is assigned to only one flash device. */
- qspi_write32(priv->flags, &priv->regs->sfa1ad, priv->amba_base[1]);
- qspi_write32(priv->flags, &priv->regs->sfa1ad,
priv->amba_base[0] + amba_size_per_chip);- case 1:
break;
Jagan, this patch looks OK to me. Ack?
York
On Tue, Feb 21, 2017 at 2:26 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
SOC’s like LS1012A has only one chip select signal out to connect with flash. So at one time only one flash is active and it is not possible to scan other flash at run time.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
Reviewed-by: Jagan Teki jagan@openedev.com
York, pick this from your tree.
thanks!
On 02/21/2017 12:55 AM, Suresh Gupta wrote:
SOC’s like LS1012A has only one chip select signal out to connect with flash. So at one time only one flash is active and it is not possible to scan other flash at run time.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
Reformatted commit message. Applied to fsl-qoriq master, awaiting upstream. Thanks.
York
LS1012A has only one chip select signal out to connect with flash
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com --- arch/arm/dts/fsl-ls1012a.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index ed5ea54..23b3cec 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -114,7 +114,7 @@ reg = <0x0 0x1550000 0x0 0x10000>, <0x0 0x40000000 0x0 0x4000000>; reg-names = "QuadSPI", "QuadSPI-memory"; - num-cs = <2>; + num-cs = <1>; big-endian; status = "disabled"; };
On 02/21/2017 12:55 AM, Suresh Gupta wrote:
LS1012A has only one chip select signal out to connect with flash
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
Minor adjustment to commit message. Applied to fsl-qoriq master, awaiting upstream.
York
participants (3)
-
Jagan Teki -
Suresh Gupta -
york sun