DSA stands for Distributed Switch Architecture and it covers switches that are connected to the CPU through an Ethernet link and generally use frame tags to pass information about the source/destination ports to/from CPU. Front panel ports are presented as regular ethernet devices in U-Boot and they are expected to support the typical networking commands. DSA switches may be cascaded, DSA class code does not currently support this.

Signed-off-by: Alex Marginean alexandru.marginean@nxp.com --- drivers/net/Kconfig | 13 ++ include/dm/uclass-id.h | 1 + include/dsa.h | 140 ++++++++++++++++ net/Makefile | 1 + net/dsa-uclass.c | 369 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 524 insertions(+) create mode 100644 include/dsa.h create mode 100644 net/dsa-uclass.c

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 4182897d89..a4157cb122 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -37,6 +37,19 @@ config DM_MDIO_MUX This is currently implemented in net/mdio-mux-uclass.c Look in include/miiphy.h for details.

+config DM_DSA + bool "Enable Driver Model for DSA switches" + depends on DM_ETH && DM_MDIO + help + Enable Driver Model for DSA switches + + Adds UCLASS_DSA class supporting switches that follow the Distributed + Switch Architecture (DSA). These switches rely on the presence of a + management switch port connected to an Ethernet controller capable of + receiving frames from the switch. This host Ethernet controller is + called "master" and "cpu" in DSA terminology. + This is currently implemented in net/dsa-uclass.c + config MDIO_SANDBOX depends on DM_MDIO && SANDBOX default y diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 0c563d898b..8f37a91488 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -42,6 +42,7 @@ enum uclass_id { UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ UCLASS_DSI_HOST, /* Display Serial Interface host */ UCLASS_DMA, /* Direct Memory Access */ + UCLASS_DSA, /* Distributed (Ethernet) Switch Architecture */ UCLASS_EFI, /* EFI managed devices */ UCLASS_ETH, /* Ethernet device */ UCLASS_FIRMWARE, /* Firmware */ diff --git a/include/dsa.h b/include/dsa.h new file mode 100644 index 0000000000..707a1d7e6f --- /dev/null +++ b/include/dsa.h @@ -0,0 +1,140 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 NXP + */ + +#ifndef __DSA_H__ +#define __DSA_H__ + +#include <common.h> +#include <dm.h> +#include <phy.h> + +/** + * DSA stands for Distributed Switch Architecture and it is infrastructure + * intended to support drivers for Switches that rely on an intermediary + * Ethernet device for I/O. These switches may support cascading allowing + * them to be arranged as a tree. + * DSA is documented in detail in the Linux kernel documentation under + * Documentation/networking/dsa/dsa.txt + * The network layout of such a switch is shown below: + * + * |--------------------------- + * | CPU network device (eth0)| + * ---------------------------- + * | <tag added by switch | + * | | + * | | + * | tag added by CPU> | + * |--------------------------------------------| + * | Switch driver | + * |--------------------------------------------| + * || || || + * |-------| |-------| |-------| + * | sw0p0 | | sw0p1 | | sw0p2 | + * |-------| |-------| |-------| + * + * In U-Boot the intent is to allow acces to front panel ports (shown at the + * bottom of the picture) though the master Ethernet port (eth0 in the picture). + * Front panel ports are presented as regular ethernet devices in U-Boot and + * they are expected to support the typical networking commands. + * In general DSA switches require the use of tags, extra headers added both by + * software on Tx and by the switch on Rx. These tags carry at a minimum port + * information and switch information for cascaded set-ups. + * In U-Boot these tags are inserted and parsed by the DSA switch driver, the + * class code helps with headroom/tailroom for the extra headers. + * + * TODO: + * - handle switch cascading, for now U-Boot only supports stand-alone switches. + * - put master Eth in promisc mode, this isn't needed right now but will be + * sooner or later. + * + */ + +#define DSA_PORT_NAME_LENGTH 16 + +/* Maximum number of ports each DSA device can have */ +#define DSA_MAX_PORTS 12 +/* Used to size internal buffers, no support for jumbo yet */ +#define DSA_MAX_FRAME_SIZE 2048 + +/** + * struct dsa_ops - DSA operations + * + * @port_enable: Initialize a switch port for I/O + * @port_disable: Disable a port + * @xmit: Insert the DSA tag for transmission + * DSA drivers receive a copy of the packet with headroom and + * tailroom reserved and set to 0. + * Packet points to headroom and length is updated to include + * both headroom and tailroom + * @rcv: Process the DSA tag on reception + * Packet and length describe the frame as received from master + * including any additional headers + */ +struct dsa_ops { + int (*port_enable)(struct udevice *dev, int port, + struct phy_device *phy); + void (*port_disable)(struct udevice *dev, int port, + struct phy_device *phy); + int (*xmit)(struct udevice *dev, int port, void *packet, int length); + int (*rcv)(struct udevice *dev, int *port, void *packet, int length); +}; + +#define dsa_get_ops(dev) ((struct dsa_ops *)(dev)->driver->ops) + +/** + * struct dsa_port_platdata - DSA port platform data + * + * @dev : Port u-device + * Uclass code sets this field for all ports + * @phy: PHY device associated with this port + * Uclass code sets this field for all ports except CPU port, based on + * DT information. It may be NULL. + * @node: Port DT node, if any. Uclass code sets this field. + * @index: Port index in the DSA switch, set by class code. + * @name: Name of the port Eth device. If a label property is present in the + * port DT node, it is used as name. Drivers can use custom names by + * populating this field, otherwise class code generates a default. + */ +struct dsa_port_platdata { + struct udevice *dev; + struct phy_device *phy; + ofnode node; + int index; + char name[DSA_PORT_NAME_LENGTH]; +}; + +/** + * struct dsa_perdev_platdata - Per-device platform data for DSA DM + * + * @num_ports: Number of ports the device has, must be <= DSA_MAX_PORTS + * All DSA drivers must set this at _bind + * @headroom: Size, in bytes, of headroom needed for the DSA tag + * All DSA drivers must set this at _bind or _probe + * @tailroom: Size, in bytes, of tailroom needed for the DSA tag + * DSA class code allocates headroom and tailroom on Tx before + * calling DSA driver xmit function + * All DSA drivers must set this at _bind or _probe + * @master_node: DT node of the master Ethernet. DT is optional so this may be + * null. + * @master_dev: Ethernet device to be used as master. Uclass code sets this + * based on DT information if present, otherwise drivers must set + * this field in _probe. + * @cpu_port: Index of switch port linked to master Ethernet. + * Uclass code sets this based on DT information if present, + * otherwise drivers must set this field in _bind. + * @port: per-port data + */ +struct dsa_perdev_platdata { + int num_ports; + int headroom; + int tailroom; + + ofnode master_node; + struct udevice *master_dev; + int cpu_port; + struct dsa_port_platdata port[DSA_MAX_PORTS]; +}; + +#endif /* __DSA_H__ */ diff --git a/net/Makefile b/net/Makefile index 2a700c8401..fac8c8beb9 100644 --- a/net/Makefile +++ b/net/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_CMD_SNTP) += sntp.o obj-$(CONFIG_CMD_TFTPBOOT) += tftp.o obj-$(CONFIG_UDP_FUNCTION_FASTBOOT) += fastboot.o obj-$(CONFIG_CMD_WOL) += wol.o +obj-$(CONFIG_DM_DSA) += dsa-uclass.o

# Disable this warning as it is triggered by: # sprintf(buf, index ? "foo%d" : "foo", index) diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c new file mode 100644 index 0000000000..e5540c639d --- /dev/null +++ b/net/dsa-uclass.c @@ -0,0 +1,369 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019, NXP + */ + +#include <dsa.h> +#include <dm/lists.h> +#include <dm/device-internal.h> +#include <dm/uclass-internal.h> +#include <miiphy.h> + +#define DSA_PORT_CHILD_DRV_NAME "dsa-port" + +/* helper that returns the DSA master Ethernet device. */ +static struct udevice *dsa_port_get_master(struct udevice *pdev, bool probe) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + + if (probe) + device_probe(platdata->master_dev); + + return platdata->master_dev; +} + +/* + * Start the desired port, the CPU port and the master Eth interface. + * TODO: if cascaded we may need to _start ports in other switches too + */ +static int dsa_port_start(struct udevice *pdev) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + struct udevice *master = dsa_port_get_master(pdev, true); + struct dsa_port_platdata *ppriv = dev_get_priv(pdev); + struct dsa_ops *ops = dsa_get_ops(dev); + int err; + + if (!ppriv || !platdata) + return -EINVAL; + + if (!master) { + dev_err(pdev, "DSA master Ethernet device not found!\n"); + return -EINVAL; + } + + if (ops->port_enable) { + err = ops->port_enable(dev, ppriv->index, ppriv->phy); + if (err) + return err; + err = ops->port_enable(dev, platdata->cpu_port, + platdata->port[platdata->cpu_port].phy); + if (err) + return err; + } + + return eth_get_ops(master)->start(master); +} + +/* Stop the desired port, the CPU port and the master Eth interface */ +static void dsa_port_stop(struct udevice *pdev) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + struct udevice *master = dsa_port_get_master(pdev, false); + struct dsa_port_platdata *ppriv = dev_get_priv(pdev); + struct dsa_ops *ops = dsa_get_ops(dev); + + if (!ppriv || !platdata) + return; + + if (ops->port_disable) { + ops->port_disable(dev, ppriv->index, ppriv->phy); + ops->port_disable(dev, platdata->cpu_port, + platdata->port[platdata->cpu_port].phy); + } + + /* + * stop master only if it's active, don't probe it otherwise. + * Under normal usage it would be active because we're using it, but + * during tear-down it may have been removed ahead of us. + */ + if (master && device_active(master)) + eth_get_ops(master)->stop(master); +} + +/* + * Insert a DSA tag and call master Ethernet send on the resulting packet + * We copy the frame to a stack buffer where we have reserved headroom and + * tailroom space. Headroom and tailroom are set to 0. + */ +static int dsa_port_send(struct udevice *pdev, void *packet, int length) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + struct udevice *master = dsa_port_get_master(pdev, true); + struct dsa_port_platdata *ppriv = dev_get_priv(pdev); + struct dsa_ops *ops = dsa_get_ops(dev); + uchar dsa_packet[DSA_MAX_FRAME_SIZE]; + int head = platdata->headroom, tail = platdata->tailroom; + int err; + + if (!master) + return -EINVAL; + + if (length + head + tail > DSA_MAX_FRAME_SIZE) + return -EINVAL; + + memset(dsa_packet, 0, head); + memset(dsa_packet + head + length, 0, tail); + memcpy(dsa_packet + head, packet, length); + length += head + tail; + + err = ops->xmit(dev, ppriv->index, dsa_packet, length); + if (err) + return err; + + return eth_get_ops(master)->send(master, dsa_packet, length); +} + +/* Receive a frame from master Ethernet, process it and pass it on */ +static int dsa_port_recv(struct udevice *pdev, int flags, uchar **packetp) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + struct udevice *master = dsa_port_get_master(pdev, true); + struct dsa_port_platdata *ppriv = dev_get_priv(pdev); + struct dsa_ops *ops = dsa_get_ops(dev); + int head = platdata->headroom, tail = platdata->tailroom; + int length, port_index, err; + + if (!master) + return -EINVAL; + + length = eth_get_ops(master)->recv(master, flags, packetp); + if (length <= 0) + return length; + + /* + * if we receive frames from a different port or frames that DSA driver + * doesn't like we discard them here. + * In case of discard we return with no frame and expect to be called + * again instead of looping here, so upper layer can deal with timeouts + * and ctrl-c + */ + err = ops->rcv(dev, &port_index, *packetp, length); + if (err || port_index != ppriv->index || (length <= head + tail)) { + if (eth_get_ops(master)->free_pkt) + eth_get_ops(master)->free_pkt(master, *packetp, length); + return -EAGAIN; + } + + /* + * We move the pointer over headroom here to avoid a copy. If free_pkt + * gets called we move the pointer back before calling master free_pkt. + */ + *packetp += head; + + return length - head - tail; +} + +static int dsa_port_free_pkt(struct udevice *pdev, uchar *packet, int length) +{ + struct udevice *dev = dev_get_parent(pdev); + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + struct udevice *master = dsa_port_get_master(pdev, true); + + if (!master) + return -EINVAL; + + if (eth_get_ops(master)->free_pkt) { + /* return the original pointer and length to master Eth */ + packet -= platdata->headroom; + length += platdata->headroom - platdata->tailroom; + + return eth_get_ops(master)->free_pkt(master, packet, length); + } + + return 0; +} + +static const struct eth_ops dsa_port_ops = { + .start = dsa_port_start, + .send = dsa_port_send, + .recv = dsa_port_recv, + .stop = dsa_port_stop, + .free_pkt = dsa_port_free_pkt, +}; + +U_BOOT_DRIVER(dsa_port) = { + .name = DSA_PORT_CHILD_DRV_NAME, + .id = UCLASS_ETH, + .ops = &dsa_port_ops, + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; + +/* + * reads the DT properties of the given DSA port. + * If the return value is != 0 then the port is skipped + */ +static int dsa_port_parse_dt(struct udevice *dev, int port_index, + ofnode ports_node, bool *is_cpu) +{ + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + struct dsa_port_platdata *port = &platdata->port[port_index]; + ofnode temp_node; + u32 ethernet; + + /* + * if we don't have a DT we don't do anything here but the port is + * registered normally + */ + if (!ofnode_valid(ports_node)) + return 0; + + ofnode_for_each_subnode(temp_node, ports_node) { + const char *port_label; + u32 reg; + + if (ofnode_read_u32(temp_node, "reg", &reg) || + reg != port_index) + continue; + + /* if the port is explicitly disabled in DT skip it */ + if (!ofnode_is_available(temp_node)) + return -ENODEV; + + port->node = temp_node; + + dev_dbg(dev, "port %d node %s\n", port->index, + ofnode_get_name(port->node)); + + /* Use 'label' if present in DT */ + port_label = ofnode_read_string(port->node, "label"); + if (port_label) + strncpy(port->name, port_label, DSA_PORT_NAME_LENGTH); + + *is_cpu = !ofnode_read_u32(port->node, "ethernet", + &ethernet); + + if (*is_cpu) { + platdata->master_node = + ofnode_get_by_phandle(ethernet); + platdata->cpu_port = port_index; + + dev_dbg(dev, "master node %s on port %d\n", + ofnode_get_name(platdata->master_node), + port_index); + } + break; + } + + return 0; +} + +/** + * This function mostly deals with pulling information out of the device tree + * into the platdata structure. + * It goes through the list of switch ports, registers an Eth device for each + * front panel port and identifies the cpu port connected to master Eth device. + * TODO: support cascaded switches + */ +static int dm_dsa_post_bind(struct udevice *dev) +{ + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + ofnode ports_node = ofnode_null(); + int first_err = 0, err = 0, i; + + if (!platdata) { + dev_err(dev, "missing plaform data\n"); + return -EINVAL; + } + + if (platdata->num_ports <= 0 || platdata->num_ports > DSA_MAX_PORTS) { + dev_err(dev, "unexpected num_ports value (%d)\n", + platdata->num_ports); + return -EINVAL; + } + + platdata->master_node = ofnode_null(); + + if (!ofnode_valid(dev->node)) { + dev_dbg(dev, "Device doesn't have a valid DT node!\n"); + } else { + ports_node = ofnode_find_subnode(dev->node, "ports"); + if (!ofnode_valid(ports_node)) + dev_dbg(dev, + "ports node is missing under DSA device!\n"); + } + + for (i = 0; i < platdata->num_ports; i++) { + struct dsa_port_platdata *port = &platdata->port[i]; + bool skip_port, is_cpu = false; + + port->index = i; + + /* + * If the driver set up port names in _bind use those, otherwise + * use default ones. + * If present, DT label is used as name and overrides anything + * we may have here. + */ + if (!strlen(port->name)) + snprintf(port->name, DSA_PORT_NAME_LENGTH, "%s@%d", + dev->name, i); + + skip_port = !!dsa_port_parse_dt(dev, i, ports_node, &is_cpu); + + /* + * if this is the CPU port don't register it as an ETH device, + * we skip it on purpose since I/O to/from it from the CPU + * isn't useful + * TODO: cpu port may have a PHY and we don't handle that yet. + */ + if (is_cpu || skip_port) + continue; + + err = device_bind_driver_to_node(dev, DSA_PORT_CHILD_DRV_NAME, + port->name, port->node, + &port->dev); + + /* try to bind all ports but keep 1st error */ + if (err && !first_err) + first_err = err; + } + + if (!ofnode_valid(platdata->master_node)) + dev_dbg(dev, "DSA master Eth device is missing!\n"); + + return first_err; +} + +/** + * This function deals with additional devices around the switch as these should + * have been bound to drivers by now. + * TODO: pick up references to other switch devices here, if we're cascaded. + */ +static int dm_dsa_pre_probe(struct udevice *dev) +{ + struct dsa_perdev_platdata *platdata = dev_get_platdata(dev); + int i; + + if (!platdata) + return -EINVAL; + + if (ofnode_valid(platdata->master_node)) + uclass_find_device_by_ofnode(UCLASS_ETH, platdata->master_node, + &platdata->master_dev); + + for (i = 0; i < platdata->num_ports; i++) { + struct dsa_port_platdata *port = &platdata->port[i]; + + if (port->dev) { + port->dev->priv = port; + port->phy = dm_eth_phy_connect(port->dev); + } + } + + return 0; +} + +UCLASS_DRIVER(dsa) = { + .id = UCLASS_DSA, + .name = "dsa", + .post_bind = dm_dsa_post_bind, + .pre_probe = dm_dsa_pre_probe, + .per_device_platdata_auto_alloc_size = + sizeof(struct dsa_perdev_platdata), +};

The test pings the local IP address though different ports of a sandbox DSA device. Port traffic is filtered and the test verifies that ping works only on enabled ports. The additional interfaces require MAC addresses, these have been added to sandbox default environment.

Signed-off-by: Alex Marginean alexandru.marginean@nxp.com --- arch/Kconfig | 1 + arch/sandbox/dts/test.dts | 49 +++++++++++++++++++++++++++++++++ include/configs/sandbox.h | 4 +++ test/dm/Makefile | 1 + test/dm/dsa.c | 58 +++++++++++++++++++++++++++++++++++++++ test/dm/test-fdt.c | 2 +- 6 files changed, 114 insertions(+), 1 deletion(-) create mode 100644 test/dm/dsa.c

diff --git a/arch/Kconfig b/arch/Kconfig index 141e48bc43..70907d69a1 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -133,6 +133,7 @@ config SANDBOX imply PHYLIB imply DM_MDIO imply DM_MDIO_MUX + imply DM_DSA

config SH bool "SuperH architecture" diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index fdb08f2111..0f565f066a 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -40,6 +40,10 @@ usb2 = &usb_2; axi0 = &axi; osd0 = "/osd"; + eth8 = &swp_0; + eth9 = &swp_1; + eth10 = &swp_2; + eth11 = &dsa_eth0; };

audio: audio-codec { @@ -889,6 +893,51 @@ mdio: mdio-test { compatible = "sandbox,mdio"; }; + + dsa_eth0: dsa-test-eth { + compatible = "sandbox,dsa-eth"; + }; + + dsa-test { + compatible = "sandbox,dsa"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + swp_0: port@0 { + reg = <0>; + label = "lan0"; + }; + + swp_1: port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "rgmii-txid"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + swp_2: port@2 { + reg = <2>; + label = "lan2"; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + + port@3 { + reg = <3>; + ethernet = <&dsa_eth0>; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; };

#include "sandbox_pmic.dtsi" diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 5d75021ed6..a586a93415 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -102,6 +102,10 @@ "eth1addr=00:00:11:22:33:45\0" \ "eth3addr=00:00:11:22:33:46\0" \ "eth5addr=00:00:11:22:33:47\0" \ + "eth8addr=00:00:11:22:33:48\0" \ + "eth9addr=00:00:11:22:33:49\0" \ + "eth10addr=00:00:11:22:33:4a\0" \ + "eth11addr=00:00:11:22:33:4b\0" \ "ipaddr=1.2.3.4\0"

#define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/test/dm/Makefile b/test/dm/Makefile index 0c2fd5cb5e..69e9feed91 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o obj-$(CONFIG_DMA) += dma.o obj-$(CONFIG_DM_MDIO) += mdio.o obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o +obj-$(CONFIG_DM_DSA) += dsa.o endif diff --git a/test/dm/dsa.c b/test/dm/dsa.c new file mode 100644 index 0000000000..c8e76be16f --- /dev/null +++ b/test/dm/dsa.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 NXP + */ + +#include <dsa.h> +#include <dm/test.h> +#include <test/ut.h> + +extern int dsa_sandbox_port_mask; + +/* this test sends ping requests with the local address through each DSA port + * via the dummy DSA master Eth. + * The dummy Eth filters traffic based on DSA port used to Tx and the port + * mask set here, so we can check that port information gets trough correctly. + */ +static int dm_test_dsa(struct unit_test_state *uts) +{ + dsa_sandbox_port_mask = 0x5; + + env_set("ethrotate", "no"); + net_ping_ip = string_to_ip("1.2.3.4"); + + env_set("ethact", "dsa-test-eth"); + ut_assertok(net_loop(PING)); + + dsa_sandbox_port_mask = 0x7; + env_set("ethact", "lan0"); + ut_assertok(net_loop(PING)); + env_set("ethact", "lan1"); + ut_assertok(net_loop(PING)); + env_set("ethact", "lan2"); + ut_assertok(net_loop(PING)); + + dsa_sandbox_port_mask = 0x1; + env_set("ethact", "lan0"); + ut_assertok(net_loop(PING)); + env_set("ethact", "lan1"); + ut_assert(net_loop(PING) != 0); + env_set("ethact", "lan2"); + ut_assert(net_loop(PING) != 0); + + dsa_sandbox_port_mask = 0x6; + env_set("ethact", "lan0"); + ut_assert(net_loop(PING) != 0); + env_set("ethact", "lan1"); + ut_assertok(net_loop(PING)); + env_set("ethact", "lan2"); + ut_assertok(net_loop(PING)); + + dsa_sandbox_port_mask = 0; + env_set("ethact", ""); + env_set("ethrotate", "yes"); + + return 0; +} + +DM_TEST(dm_test_dsa, DM_TESTF_SCAN_FDT); diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 1fb8b5c248..0d7dd053e2 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -224,7 +224,7 @@ static int dm_test_alias_highest_id(struct unit_test_state *uts) int ret;

ret = dev_read_alias_highest_id("eth"); - ut_asserteq(5, ret); + ut_asserteq(11, ret);

ret = dev_read_alias_highest_id("gpio"); ut_asserteq(2, ret);

The definition follows the DSA binding in kernel and describes the switch, its ports and PHYs. ENETC PF6 is the 2nd Eth controller linked to the switch on LS1028A, it is not used in U-Boot and was disabled.

Signed-off-by: Alex Marginean alexandru.marginean@nxp.com Tested-by: Michael Walle michael@walle.cc --- arch/arm/dts/fsl-ls1028a-rdb.dts | 36 ++++++++++++++++++++++++++ arch/arm/dts/fsl-ls1028a.dtsi | 44 +++++++++++++++++++++++++++++++- 2 files changed, 79 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts index 3d5e8ade21..700fc067a4 100644 --- a/arch/arm/dts/fsl-ls1028a-rdb.dts +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -114,9 +114,45 @@ phy-handle = <&rdb_phy0>; };

+&ethsw_ports { + port@0 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&sw_phy0>; + }; + port@1 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&sw_phy1>; + }; + port@2 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&sw_phy2>; + }; + port@3 { + status = "okay"; + phy-mode = "qsgmii"; + phy-handle = <&sw_phy3>; + }; +}; + &mdio0 { status = "okay"; rdb_phy0: phy@2 { reg = <2>; }; + + sw_phy0: phy@10 { + reg = <0x10>; + }; + sw_phy1: phy@11 { + reg = <0x11>; + }; + sw_phy2: phy@12 { + reg = <0x12>; + }; + sw_phy3: phy@13 { + reg = <0x13>; + }; }; diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 43a154e8e7..97c7d4de4d 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -136,9 +136,51 @@ reg = <0x000300 0 0 0 0>; status = "disabled"; }; + ethsw: pci@0,5 { + #address-cells=<0>; + #size-cells=<1>; + reg = <0x000500 0 0 0 0>; + + ethsw_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + status = "disabled"; + label = "swp0"; + }; + port@1 { + reg = <1>; + status = "disabled"; + label = "swp1"; + }; + port@2 { + reg = <2>; + status = "disabled"; + label = "swp2"; + }; + port@3 { + reg = <3>; + status = "disabled"; + label = "swp3"; + }; + port@4 { + reg = <4>; + phy-mode = "internal"; + status = "okay"; + ethernet = <&enetc2>; + }; + port@5 { + reg = <5>; + phy-mode = "internal"; + status = "disabled"; + }; + }; + }; enetc6: pci@0,6 { reg = <0x000600 0 0 0 0>; - status = "okay"; + status = "disabled"; phy-mode = "internal"; }; };