[PATCH] arm: dts: k3-j721e: Remove ti,strobe-sel
HS400 speed mode is not supported for sdhci0 (eMMC) for J721E (errata of J721E: (i2024) 'MMCSD: Peripherals Do Not Support HS400'[1]). Thus, remove ti,strobe-sel property which is needed only for HS400 speed mode. This also helps sync kernel dts with u-boot dts.
[1] https://www.ti.com/lit/er/sprz455/sprz455.pdf
Fixes: e64665fa727e ("arm: dts: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") Signed-off-by: Bhavya Kapoor b-kapoor@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com --- arch/arm/dts/k3-j721e-main.dtsi | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi index cf3482376c..7dc6f923d1 100644 --- a/arch/arm/dts/k3-j721e-main.dtsi +++ b/arch/arm/dts/k3-j721e-main.dtsi @@ -1049,7 +1049,6 @@ ti,itap-del-sel-mmc-hs = <0xa>; ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>; - ti,strobe-sel = <0x77>; dma-coherent; };
On Tue, May 23, 2023 at 04:48:53PM +0530, Neha Malcom Francis wrote:
HS400 speed mode is not supported for sdhci0 (eMMC) for J721E (errata of J721E: (i2024) 'MMCSD: Peripherals Do Not Support HS400'[1]). Thus, remove ti,strobe-sel property which is needed only for HS400 speed mode. This also helps sync kernel dts with u-boot dts.
[1] https://www.ti.com/lit/er/sprz455/sprz455.pdf
Fixes: e64665fa727e ("arm: dts: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") Signed-off-by: Bhavya Kapoor b-kapoor@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com
arch/arm/dts/k3-j721e-main.dtsi | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi index cf3482376c..7dc6f923d1 100644 --- a/arch/arm/dts/k3-j721e-main.dtsi +++ b/arch/arm/dts/k3-j721e-main.dtsi @@ -1049,7 +1049,6 @@ ti,itap-del-sel-mmc-hs = <0xa>; ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>;
ti,strobe-sel = <0x77>;
Nishanth?
On 11:49-20230523, Tom Rini wrote:
On Tue, May 23, 2023 at 04:48:53PM +0530, Neha Malcom Francis wrote:
HS400 speed mode is not supported for sdhci0 (eMMC) for J721E (errata of J721E: (i2024) 'MMCSD: Peripherals Do Not Support HS400'[1]). Thus, remove ti,strobe-sel property which is needed only for HS400 speed mode. This also helps sync kernel dts with u-boot dts.
[1] https://www.ti.com/lit/er/sprz455/sprz455.pdf
Fixes: e64665fa727e ("arm: dts: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems") Signed-off-by: Bhavya Kapoor b-kapoor@ti.com Signed-off-by: Neha Malcom Francis n-francis@ti.com
arch/arm/dts/k3-j721e-main.dtsi | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi index cf3482376c..7dc6f923d1 100644 --- a/arch/arm/dts/k3-j721e-main.dtsi +++ b/arch/arm/dts/k3-j721e-main.dtsi @@ -1049,7 +1049,6 @@ ti,itap-del-sel-mmc-hs = <0xa>; ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>;
ti,strobe-sel = <0x77>;Nishanth?
NAK. not because this is wrong - but what is the reason we have to re-emphasise over and over and over again -> Please send to upstream kernel.org master branch AND then pick patches in backport to kernel.org.
participants (3)
-
Neha Malcom Francis -
Nishanth Menon -
Tom Rini