SPEAr Architecture support added. It contains the support for following SPEAr blocks - Timer - System controller - Misc registers

Signed-off-by: Vipin vipin.kumar@st.com --- cpu/arm926ejs/spear/Makefile | 52 ++++++++++ cpu/arm926ejs/spear/reset.c | 53 +++++++++++ cpu/arm926ejs/spear/timer.c | 150 ++++++++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_gpt.h | 83 ++++++++++++++++ include/asm-arm/arch-spear/spr_misc.h | 130 ++++++++++++++++++++++++++ include/asm-arm/arch-spear/spr_syscntl.h | 38 ++++++++ 6 files changed, 506 insertions(+), 0 deletions(-) create mode 100755 cpu/arm926ejs/spear/Makefile create mode 100755 cpu/arm926ejs/spear/reset.c create mode 100755 cpu/arm926ejs/spear/timer.c create mode 100755 include/asm-arm/arch-spear/spr_gpt.h create mode 100644 include/asm-arm/arch-spear/spr_misc.h create mode 100644 include/asm-arm/arch-spear/spr_syscntl.h

<snip> + +######################################################################### diff --git a/cpu/arm926ejs/spear/reset.c b/cpu/arm926ejs/spear/reset.c new file mode 100755 index 0000000..4df46a9 --- /dev/null +++ b/cpu/arm926ejs/spear/reset.c @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/spr_syscntl.h> + +void reset_cpu(ulong ignored) +{ + struct syscntl_regs *syscntl_regs_p = + (struct syscntl_regs *)CONFIG_SPEAR_SYSCNTLBASE; + This is not bi-sect able

CONFIG_SPEAR_SYSCNTLBASE is not defined until #7. This looks like a register base address. This should be defined in spr_syscntl.h

This also applies to CONFIG_SPEAR_MISCBASE. Should be in spr_misc.h

+ printf("System is going to reboot ...\n"); + + /* + * This 1 second delay will allow the above message + * to be printed before reset + */ + udelay((1000 * 1000)); + + /* Going into slow mode before resetting SOC */ + writel(0x02, &syscntl_regs_p->scctrl); + + /* + * Writing any value to the system status register will + * reset the SoC + */ + writel(0x00, &syscntl_regs_p->scsysstat); + + /* system will restart */ + while (1) + ; +} diff --git a/cpu/arm926ejs/spear/timer.c b/cpu/arm926ejs/spear/timer.c new file mode 100755 index 0000000..2a265fb --- /dev/null +++ b/cpu/arm926ejs/spear/timer.c @@ -0,0 +1,150 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/spr_gpt.h> +#include <asm/arch/spr_misc.h> + +#define GPT_RESOLUTION (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) +#define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING) + +static struct gpt_regs *const gpt_regs_p = + (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE; + +static struct misc_regs *const misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; ws convert leading spaces on these 2 defines to tabs +

See above comments on CONFIG_SPEAR_*

+static ulong timestamp; +static ulong lastdec; + +int timer_init(void) +{ + u32 synth; + + /* Prescaler setting */ +#if defined(CONFIG_SPEAR3XX) + writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg); + synth = MISC_GPT4SYNTH; +#elif defined(CONFIG_SPEAR600) + writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg); + synth = MISC_GPT3SYNTH;

Add an #else #error "Unknown Config"

Or something similar. +#endif + + writel(readl(&misc_regs_p->periph_clk_cfg) | synth, + &misc_regs_p->periph_clk_cfg); + + /* disable timers */ + writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control); + + /* load value for free running */ + writel(GPT_FREE_RUNNING, &gpt_regs_p->compare); + + /* auto reload, start timer */ + writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control); + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return (get_timer_masked() / GPT_RESOLUTION) - base; +} + +void set_timer(ulong t) +{ + timestamp = t; +} + +void __udelay(unsigned long usec) +{ + ulong tmo; + ulong start = get_timer_masked(); + ulong tenudelcnt = CONFIG_SYS_HZ_CLOCK / (1000 * 100); + ulong rndoff; + + rndoff = (usec % 10) ? 1 : 0; + + /* tenudelcnt timer tick gives 10 microsecconds delay */ + tmo = ((usec / 10) + rndoff) * tenudelcnt; + + while ((ulong) (get_timer_masked() - start) < tmo) + ; +} + +void reset_timer_masked(void) +{ + /* reset time */ + lastdec = READ_TIMER(); + timestamp = 0; +} + +ulong get_timer_masked(void) +{ + ulong now = READ_TIMER(); + + if (now >= lastdec) { + /* normal mode */ + timestamp += now - lastdec; + } else { + /* we have an overflow ... */ + timestamp += now + GPT_FREE_RUNNING - lastdec; + } + lastdec = now; + + return timestamp; +} + +void udelay_masked(unsigned long usec) +{ + return udelay(usec); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/include/asm-arm/arch-spear/spr_gpt.h b/include/asm-arm/arch-spear/spr_gpt.h new file mode 100755 index 0000000..8e62391 --- /dev/null +++ b/include/asm-arm/arch-spear/spr_gpt.h @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2009 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SPR_GPT_H +#define _SPR_GPT_H + +struct gpt_regs { + u8 reserved[0x80]; + u32 control; + u32 status; + u32 compare; + u32 count; + u32 capture_re; + u32 capture_fe; +}; + +/* + * TIMER_CONTROL register settings + */ + +#define GPT_PRESCALER_MASK 0x000F +#define GPT_PRESCALER_1 0x0000 +#define GPT_PRESCALER_2 0x0001 +#define GPT_PRESCALER_4 0x0002 +#define GPT_PRESCALER_8 0x0003 ws last 3 lines have trailing spaces before the tabs please only use tabs +#define GPT_PRESCALER_16 0x0004 +#define GPT_PRESCALER_32 0x0005 +#define GPT_PRESCALER_64 0x0006 +#define GPT_PRESCALER_128 0x0007 +#define GPT_PRESCALER_256 0x0008 + +#define GPT_MODE_SINGLE_SHOT 0x0010 +#define GPT_MODE_AUTO_RELOAD 0x0000 + +#define GPT_ENABLE 0x0020 + +#define GPT_CAPT_MODE_MASK 0x00C0 +#define GPT_CAPT_MODE_NONE 0x0000 +#define GPT_CAPT_MODE_RE 0x0040 +#define GPT_CAPT_MODE_FE 0x0080 +#define GPT_CAPT_MODE_BOTH 0x00C0 + +#define GPT_INT_MATCH 0x0100 + +#define GPT_INT_FE 0x0200 + +#define GPT_INT_RE 0x0400 ws last 9 lines have trailing spaces before the tabs The extra lines between GPT_INT's should be removed + +/* + * TIMER_STATUS register settings + */ + +#define GPT_STS_MATCH 0x0001 +#define GPT_STS_FE 0x0002 +#define GPT_STS_RE 0x0004 + +/* + * TIMER_COMPARE register settings + */ + +#define GPT_FREE_RUNNING 0xFFFF + +#endif diff --git a/include/asm-arm/arch-spear/spr_misc.h b/include/asm-arm/arch-spear/spr_misc.h new file mode 100644 index 0000000..8b96d9b --- /dev/null +++ b/include/asm-arm/arch-spear/spr_misc.h @@ -0,0 +1,130 @@ +/* <snip>

Tom