[U-Boot] [PATCH] x86: baytrail: Correct the comment of IACORE_VIDS bit ranges

The guaranteed vid bit ranges in IACORE_VIDS MSR is actually [22:16]. This corrects the comment for it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/x86/cpu/baytrail/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 29baf08..56e9813 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -80,7 +80,7 @@ static void set_max_freq(void) perf_ctl.lo = (msr.lo & 0x3f0000) >> 8;
/* - * Set guaranteed vid [21:16] from IACORE_VIDS to bits [7:0] of + * Set guaranteed vid [22:16] from IACORE_VIDS to bits [7:0] of * the PERF_CTL */ msr = msr_read(MSR_IACORE_VIDS);

On 24 May 2018 at 04:05, Bin Meng bmeng.cn@gmail.com wrote:
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually [22:16]. This corrects the comment for it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/baytrail/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org

On Fri, May 25, 2018 at 10:41 AM, Simon Glass sjg@chromium.org wrote:
On 24 May 2018 at 04:05, Bin Meng bmeng.cn@gmail.com wrote:
The guaranteed vid bit ranges in IACORE_VIDS MSR is actually [22:16]. This corrects the comment for it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
arch/x86/cpu/baytrail/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org
applied to u-boot-x86, thanks!
participants (2)
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Bin Meng
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Simon Glass