The following changes since commit 9e1d65f36b83c5422ece3c0ea28d07a2246cb07f:

configs: Resync with savedefconfig (2020-02-28 13:28:38 -0500)

are available in the Git repository at:

git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 468ba8d00b5af7828302e297736ae23d4873cfb0:

ARM: socfpga: Add initial support for the ABB SECU board (2020-03-03 22:11:36 +0100)

---------------------------------------------------------------- Holger Brunck (1): ARM: socfpga: Add initial support for the ABB SECU board

Marek Vasut (3): rtc: m41t62: add compatible for m41st87 ARM: socfpga: Permit overriding the default timer frequency ARM: socfpga: Add missing Denali NAND config options

arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_arria5_secu1.dts | 130 ++++++++++++++++++ arch/arm/mach-socfpga/Kconfig | 10 ++ board/keymile/Kconfig | 11 +- board/keymile/common/ivm.c | 19 ++- board/keymile/secu1/MAINTAINERS | 5 + board/keymile/secu1/Makefile | 7 + board/keymile/secu1/qts/iocsr_config.h | 694 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ board/keymile/secu1/qts/pinmux_config.h | 218 +++++++++++++++++++++++++++++ board/keymile/secu1/qts/pll_config.h | 83 ++++++++++++ board/keymile/secu1/qts/sdram_config.h | 327 ++++++++++++++++++++++++++++++++++++++++++++ board/keymile/secu1/socfpga.c | 67 +++++++++ configs/socfpga_secu1_defconfig | 84 ++++++++++++ drivers/rtc/m41t62.c | 1 + include/configs/socfpga_arria5_secu1.h | 131 ++++++++++++++++++ include/configs/socfpga_common.h | 4 +- 16 files changed, 1787 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/socfpga_arria5_secu1.dts create mode 100644 board/keymile/secu1/MAINTAINERS create mode 100644 board/keymile/secu1/Makefile create mode 100644 board/keymile/secu1/qts/iocsr_config.h create mode 100644 board/keymile/secu1/qts/pinmux_config.h create mode 100644 board/keymile/secu1/qts/pll_config.h create mode 100644 board/keymile/secu1/qts/sdram_config.h create mode 100644 board/keymile/secu1/socfpga.c create mode 100644 configs/socfpga_secu1_defconfig create mode 100644 include/configs/socfpga_arria5_secu1.h