IPG clock description is missing for I2C0 and I2C2 busses, add it. Otherwise we see -ENODATA error when trying to get I2C clock for these busses.

Signed-off-by: Anatolij Gustschin agust@denx.de Cc: Stefano Babic sbabic@denx.de --- arch/arm/dts/fsl-imx8dx.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/fsl-imx8dx.dtsi b/arch/arm/dts/fsl-imx8dx.dtsi index 0c33eee..ae1d1f4 100644 --- a/arch/arm/dts/fsl-imx8dx.dtsi +++ b/arch/arm/dts/fsl-imx8dx.dtsi @@ -268,8 +268,9 @@ reg = <0x0 0x5a800000 0x0 0x4000>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; - clocks = <&clk IMX8QXP_I2C0_CLK>; - clock-names = "per"; + clocks = <&clk IMX8QXP_I2C0_CLK>, + <&clk IMX8QXP_I2C0_IPG_CLK>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX8QXP_I2C0_CLK>; assigned-clock-rates = <24000000>; power-domains = <&pd_dma_lpi2c0>; @@ -299,8 +300,9 @@ reg = <0x0 0x5a820000 0x0 0x4000>; interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; - clocks = <&clk IMX8QXP_I2C2_CLK>; - clock-names = "per"; + clocks = <&clk IMX8QXP_I2C2_CLK>, + <&clk IMX8QXP_I2C2_IPG_CLK>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX8QXP_I2C2_CLK>; assigned-clock-rates = <24000000>; power-domains = <&pd_dma_lpi2c2>;

Subject: [PATCH 1/2] clk: imx8qxp: extend to support getting I2C IPG clock

Since commit d02be21d3004 ("i2c: imx_lpi2c: add ipg clk") getting I2C clocks doesn't work. Add I2C IPG clock IDs to related switch statements to fix it.

Signed-off-by: Anatolij Gustschin agust@denx.de Cc: Lukasz Majewski lukma@denx.de

Reviewed-by: Peng Fan peng.fan@nxp.com

---

drivers/clk/imx/clk-imx8qxp.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 1fca36a..0db4539 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -56,18 +56,22 @@ ulong imx8_clk_get_rate(struct clk *clk) pm_clk = SC_PM_CLK_CPU; break; case IMX8QXP_I2C0_CLK:

• case IMX8QXP_I2C0_IPG_CLK: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C1_CLK:
• case IMX8QXP_I2C1_IPG_CLK: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C2_CLK:
• case IMX8QXP_I2C2_IPG_CLK: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C3_CLK:
• case IMX8QXP_I2C3_IPG_CLK: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break;

@@ -145,18 +149,22 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate)

switch (clk->id) { case IMX8QXP_I2C0_CLK:

• case IMX8QXP_I2C0_IPG_CLK: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C1_CLK:
• case IMX8QXP_I2C1_IPG_CLK: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C2_CLK:
• case IMX8QXP_I2C2_IPG_CLK: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C3_CLK:
• case IMX8QXP_I2C3_IPG_CLK: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break;

@@ -234,18 +242,22 @@ int __imx8_clk_enable(struct clk *clk, bool enable)

switch (clk->id) { case IMX8QXP_I2C0_CLK:

• case IMX8QXP_I2C0_IPG_CLK: resource = SC_R_I2C_0; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C1_CLK:
• case IMX8QXP_I2C1_IPG_CLK: resource = SC_R_I2C_1; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C2_CLK:
• case IMX8QXP_I2C2_IPG_CLK: resource = SC_R_I2C_2; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_I2C3_CLK:
• case IMX8QXP_I2C3_IPG_CLK: resource = SC_R_I2C_3; pm_clk = SC_PM_CLK_PER; break;

-- 2.7.4