[U-Boot] [PATCH v2 0/4] x86: Convert all boards to DM MMC and SCSI

This series converts all x86 boards to use DM MMC and SCSI.
It is based on previous x86 kconfig clean up series, and is available at u-boot-x86/blk-working for testing.
Changes in v2: - Fix unmet direct dependencies on BLK
Bin Meng (3): dm: scsi: Add a generic PCI-based AHCI driver block: ide: Fix build error when CONFIG_BLK is on x86: Switch all boards to use DM SCSI
Simon Glass (1): x86: Convert MMC to driver model
arch/Kconfig | 3 ++ arch/x86/cpu/baytrail/Kconfig | 1 + arch/x86/cpu/baytrail/valleyview.c | 12 ----- arch/x86/cpu/broadwell/Kconfig | 1 + arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/ivybridge/Kconfig | 1 + arch/x86/cpu/qemu/Kconfig | 1 + arch/x86/cpu/quark/quark.c | 10 ---- arch/x86/cpu/queensbay/Kconfig | 1 + arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/topcliff.c | 20 ------- configs/chromebook_link64_defconfig | 2 - configs/chromebook_link_defconfig | 2 - configs/chromebox_panther_defconfig | 2 - configs/edison_defconfig | 1 - drivers/ata/Kconfig | 6 +++ drivers/ata/Makefile | 1 + drivers/ata/ahci-pci.c | 42 +++++++++++++++ drivers/block/ide.c | 2 + drivers/mmc/pci_mmc.c | 86 +++++++++++++++++++++---------- include/configs/bayleybay.h | 4 -- include/configs/conga-qeval20-qa3-e3845.h | 4 -- include/configs/cougarcanyon2.h | 3 -- include/configs/crownbay.h | 3 -- include/configs/dfi-bt700.h | 4 -- include/configs/minnowmax.h | 4 -- include/configs/qemu-x86.h | 10 ---- include/configs/som-6896.h | 3 -- include/configs/som-db5800-som-6867.h | 4 -- include/configs/x86-chromebook.h | 8 --- include/mmc.h | 12 ----- 31 files changed, 121 insertions(+), 135 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/topcliff.c create mode 100644 drivers/ata/ahci-pci.c

This adds support for PCI-based AHCI controller based on DM SCSI.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org
---
Changes in v2: - Fix unmet direct dependencies on BLK
drivers/ata/Kconfig | 6 ++++++ drivers/ata/Makefile | 1 + drivers/ata/ahci-pci.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 49 insertions(+) create mode 100644 drivers/ata/ahci-pci.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 6427f1b..db05160 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -40,6 +40,12 @@ config DM_SCSI
menu "SATA/SCSI device support"
+config AHCI_PCI + bool "Support for PCI-based AHCI controller" + depends on DM_SCSI + help + Enables support for the PCI-based AHCI controller. + config SATA_CEVA bool "Ceva Sata controller" depends on AHCI diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index c48184c..4e2de93 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -7,6 +7,7 @@
obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o obj-$(CONFIG_AHCI) += ahci-uclass.o +obj-$(CONFIG_AHCI_PCI) += ahci-pci.o obj-$(CONFIG_SCSI_AHCI) += ahci.o obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o obj-$(CONFIG_FSL_SATA) += fsl_sata.o diff --git a/drivers/ata/ahci-pci.c b/drivers/ata/ahci-pci.c new file mode 100644 index 0000000..f46fad8 --- /dev/null +++ b/drivers/ata/ahci-pci.c @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2017, Bin Meng bmeng.cn@gmail.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <ahci.h> +#include <dm.h> +#include <pci.h> + +static int ahci_pci_bind(struct udevice *dev) +{ + struct udevice *scsi_dev; + + return ahci_bind_scsi(dev, &scsi_dev); +} + +static int ahci_pci_probe(struct udevice *dev) +{ + return ahci_probe_scsi(dev); +} + +static const struct udevice_id ahci_pci_ids[] = { + { .compatible = "ahci-pci" }, + { } +}; + +U_BOOT_DRIVER(ahci_pci) = { + .name = "ahci_pci", + .id = UCLASS_AHCI, + .of_match = ahci_pci_ids, + .bind = ahci_pci_bind, + .probe = ahci_pci_probe, +}; + +static struct pci_device_id ahci_pci_supported[] = { + { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_SATA_AHCI, ~0) }, + {}, +}; + +U_BOOT_PCI_DEVICE(ahci_pci, ahci_pci_supported);

On Mon, Jul 31, 2017 at 10:23 AM, Bin Meng bmeng.cn@gmail.com wrote:
This adds support for PCI-based AHCI controller based on DM SCSI.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Tested-by: Simon Glass sjg@chromium.org
Changes in v2:
- Fix unmet direct dependencies on BLK
drivers/ata/Kconfig | 6 ++++++ drivers/ata/Makefile | 1 + drivers/ata/ahci-pci.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 49 insertions(+) create mode 100644 drivers/ata/ahci-pci.c
applied to u-boot-x86, thanks!

Add missing #ifndef CONFIG_BLK to wrap dev_desc->block_read.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
Changes in v2: None
drivers/block/ide.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/block/ide.c b/drivers/block/ide.c index 308ad73..edcf87b 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -469,7 +469,9 @@ static void atapi_inquiry(struct blk_desc *dev_desc)
device = dev_desc->devnum; dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */ +#ifndef CONFIG_BLK dev_desc->block_read = atapi_read; +#endif
memset(ccb, 0, sizeof(ccb)); memset(iobuf, 0, sizeof(iobuf));

On 30 July 2017 at 20:24, Bin Meng bmeng.cn@gmail.com wrote:
Add missing #ifndef CONFIG_BLK to wrap dev_desc->block_read.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
drivers/block/ide.c | 2 ++ 1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org

On Tue, Aug 1, 2017 at 5:12 PM, Simon Glass sjg@chromium.org wrote:
On 30 July 2017 at 20:24, Bin Meng bmeng.cn@gmail.com wrote:
Add missing #ifndef CONFIG_BLK to wrap dev_desc->block_read.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
drivers/block/ide.c | 2 ++ 1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
applied to u-boot-x86, thanks!

From: Simon Glass sjg@chromium.org
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it.
Signed-off-by: Simon Glass sjg@chromium.org Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com [bmeng: remove DM_MMC from edison_defconfig] Signed-off-by: Bin Meng bmeng.cn@gmail.com
---
Changes in v2: None
arch/Kconfig | 1 + arch/x86/cpu/baytrail/valleyview.c | 12 ------ arch/x86/cpu/quark/quark.c | 10 ----- arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/topcliff.c | 20 --------- configs/edison_defconfig | 1 - drivers/mmc/pci_mmc.c | 86 ++++++++++++++++++++++++++------------ include/mmc.h | 12 ------ 8 files changed, 62 insertions(+), 82 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/topcliff.c
diff --git a/arch/Kconfig b/arch/Kconfig index 99617b7..fdcf7cd 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -98,6 +98,7 @@ config X86 imply DM_ETH imply DM_GPIO imply DM_KEYBOARD + imply DM_MMC imply DM_RTC imply DM_SERIAL imply DM_SPI diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c index 87ba849..c58f6a8 100644 --- a/arch/x86/cpu/baytrail/valleyview.c +++ b/arch/x86/cpu/baytrail/valleyview.c @@ -11,18 +11,6 @@ #include <asm/mrccache.h> #include <asm/post.h>
-static struct pci_device_id mmc_supported[] = { - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO }, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD }, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2 }, - {}, -}; - -int cpu_mmc_init(bd_t *bis) -{ - return pci_mmc_init("ValleyView SDHCI", mmc_supported); -} - #ifndef CONFIG_EFI_APP int arch_cpu_init(void) { diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 0c2cea4..c36a589 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -16,11 +16,6 @@ #include <asm/arch/msg_port.h> #include <asm/arch/quark.h>
-static struct pci_device_id mmc_supported[] = { - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO }, - {}, -}; - static void quark_setup_mtrr(void) { u32 base, mask; @@ -328,11 +323,6 @@ int arch_early_init_r(void) return 0; }
-int cpu_mmc_init(bd_t *bis) -{ - return pci_mmc_init("Quark SDHCI", mmc_supported); -} - int arch_misc_init(void) { #ifdef CONFIG_ENABLE_MRC_CACHE diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile index af3ffad..c068199 100644 --- a/arch/x86/cpu/queensbay/Makefile +++ b/arch/x86/cpu/queensbay/Makefile @@ -5,4 +5,4 @@ #
obj-y += fsp_configs.o irq.o -obj-y += tnc.o topcliff.o +obj-y += tnc.o diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c deleted file mode 100644 index b76dd7d..0000000 --- a/arch/x86/cpu/queensbay/topcliff.c +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (C) 2014, Bin Meng bmeng.cn@gmail.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <mmc.h> -#include <pci_ids.h> - -static struct pci_device_id mmc_supported[] = { - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 }, - { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 }, - {}, -}; - -int cpu_mmc_init(bd_t *bis) -{ - return pci_mmc_init("Topcliff SDHCI", mmc_supported); -} diff --git a/configs/edison_defconfig b/configs/edison_defconfig index cefcfa8..85108ad 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -27,7 +27,6 @@ CONFIG_OF_EMBED=y CONFIG_CPU=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y -CONFIG_DM_MMC=y CONFIG_DM_PCI_COMPAT=y CONFIG_USB_DWC3_GADGET=y CONFIG_USB_GADGET=y diff --git a/drivers/mmc/pci_mmc.c b/drivers/mmc/pci_mmc.c index e39b476..6db8977 100644 --- a/drivers/mmc/pci_mmc.c +++ b/drivers/mmc/pci_mmc.c @@ -6,37 +6,71 @@ */
#include <common.h> +#include <dm.h> #include <errno.h> #include <malloc.h> +#include <mapmem.h> #include <sdhci.h> #include <asm/pci.h>
-int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported) +struct pci_mmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + +struct pci_mmc_priv { + struct sdhci_host host; + void *base; +}; + +static int pci_mmc_probe(struct udevice *dev) { - struct sdhci_host *mmc_host; - u32 iobase; + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct pci_mmc_plat *plat = dev_get_platdata(dev); + struct pci_mmc_priv *priv = dev_get_priv(dev); + struct sdhci_host *host = &priv->host; + u32 ioaddr; int ret; - int i; - - for (i = 0; ; i++) { - struct udevice *dev; - - ret = pci_find_device_id(mmc_supported, i, &dev); - if (ret) - return ret; - mmc_host = malloc(sizeof(struct sdhci_host)); - if (!mmc_host) - return -ENOMEM; - - mmc_host->name = name; - dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase); - mmc_host->ioaddr = (void *)(ulong)iobase; - mmc_host->quirks = 0; - mmc_host->max_clk = 0; - ret = add_sdhci(mmc_host, 0, 0); - if (ret) - return ret; - } - - return 0; + + dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &ioaddr); + host->ioaddr = map_sysmem(ioaddr, 0); + host->name = dev->name; + ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); + if (ret) + return ret; + host->mmc = &plat->mmc; + host->mmc->priv = &priv->host; + host->mmc->dev = dev; + upriv->mmc = host->mmc; + + return sdhci_probe(dev); } + +static int pci_mmc_bind(struct udevice *dev) +{ + struct pci_mmc_plat *plat = dev_get_platdata(dev); + + return sdhci_bind(dev, &plat->mmc, &plat->cfg); +} + +U_BOOT_DRIVER(pci_mmc) = { + .name = "pci_mmc", + .id = UCLASS_MMC, + .bind = pci_mmc_bind, + .probe = pci_mmc_probe, + .ops = &sdhci_ops, + .priv_auto_alloc_size = sizeof(struct pci_mmc_priv), + .platdata_auto_alloc_size = sizeof(struct pci_mmc_plat), +}; + +static struct pci_device_id mmc_supported[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SDIO) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_SD) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT_EMMC2) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1) }, + {}, +}; + +U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported); diff --git a/include/mmc.h b/include/mmc.h index 00576fa..6a0ea0a 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -585,18 +585,6 @@ int cpu_mmc_init(bd_t *bis); int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); int mmc_get_env_dev(void);
-struct pci_device_id; - -/** - * pci_mmc_init() - set up PCI MMC devices - * - * This finds all the matching PCI IDs and sets them up as MMC devices. - * - * @name: Name to use for devices - * @mmc_supported: PCI IDs to search for, terminated by {0, 0} - */ -int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported); - /* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535

On Mon, Jul 31, 2017 at 10:24 AM, Bin Meng bmeng.cn@gmail.com wrote:
From: Simon Glass sjg@chromium.org
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it.
Signed-off-by: Simon Glass sjg@chromium.org Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com [bmeng: remove DM_MMC from edison_defconfig] Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
arch/Kconfig | 1 + arch/x86/cpu/baytrail/valleyview.c | 12 ------ arch/x86/cpu/quark/quark.c | 10 ----- arch/x86/cpu/queensbay/Makefile | 2 +- arch/x86/cpu/queensbay/topcliff.c | 20 --------- configs/edison_defconfig | 1 - drivers/mmc/pci_mmc.c | 86 ++++++++++++++++++++++++++------------ include/mmc.h | 12 ------ 8 files changed, 62 insertions(+), 82 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/topcliff.c
applied to u-boot-x86, thanks!

After MMC is converted to DM, convert to use DM SCSI as well for all x86 boards and imply BLK for both MMC and SCSI drivers.
CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
---
Changes in v2: None
arch/Kconfig | 2 ++ arch/x86/cpu/baytrail/Kconfig | 1 + arch/x86/cpu/broadwell/Kconfig | 1 + arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/ivybridge/Kconfig | 1 + arch/x86/cpu/qemu/Kconfig | 1 + arch/x86/cpu/queensbay/Kconfig | 1 + configs/chromebook_link64_defconfig | 2 -- configs/chromebook_link_defconfig | 2 -- configs/chromebox_panther_defconfig | 2 -- include/configs/bayleybay.h | 4 ---- include/configs/conga-qeval20-qa3-e3845.h | 4 ---- include/configs/cougarcanyon2.h | 3 --- include/configs/crownbay.h | 3 --- include/configs/dfi-bt700.h | 4 ---- include/configs/minnowmax.h | 4 ---- include/configs/qemu-x86.h | 10 ---------- include/configs/som-6896.h | 3 --- include/configs/som-db5800-som-6867.h | 4 ---- include/configs/x86-chromebook.h | 8 -------- 20 files changed, 8 insertions(+), 53 deletions(-)
diff --git a/arch/Kconfig b/arch/Kconfig index fdcf7cd..e063ee0 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -95,12 +95,14 @@ config X86 select PCI select TIMER select X86_TSC_TIMER + imply BLK imply DM_ETH imply DM_GPIO imply DM_KEYBOARD imply DM_MMC imply DM_RTC imply DM_SERIAL + imply DM_SCSI imply DM_SPI imply DM_SPI_FLASH imply DM_USB diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig index 052d77f..9374c12 100644 --- a/arch/x86/cpu/baytrail/Kconfig +++ b/arch/x86/cpu/baytrail/Kconfig @@ -11,6 +11,7 @@ config INTEL_BAYTRAIL imply HAVE_INTEL_ME if !EFI imply ENABLE_MRC_CACHE imply ENV_IS_IN_SPI_FLASH + imply AHCI_PCI imply ICH_SPI imply INTEL_ICH6_GPIO imply MMC diff --git a/arch/x86/cpu/broadwell/Kconfig b/arch/x86/cpu/broadwell/Kconfig index 7e71325..b421f18 100644 --- a/arch/x86/cpu/broadwell/Kconfig +++ b/arch/x86/cpu/broadwell/Kconfig @@ -10,6 +10,7 @@ config INTEL_BROADWELL imply HAVE_INTEL_ME imply ENABLE_MRC_CACHE imply ENV_IS_IN_SPI_FLASH + imply AHCI_PCI imply ICH_SPI imply INTEL_BROADWELL_GPIO imply SCSI diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index 07d3fb8..d4e0587 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -4,6 +4,7 @@ config SYS_COREBOOT bool default y imply ENV_IS_NOWHERE + imply AHCI_PCI imply E1000 imply ICH_SPI imply MMC diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index 7bac4c5..00f99d6 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -11,6 +11,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE imply HAVE_INTEL_ME imply ENABLE_MRC_CACHE imply ENV_IS_IN_SPI_FLASH + imply AHCI_PCI imply ICH_SPI imply INTEL_ICH6_GPIO imply SCSI diff --git a/arch/x86/cpu/qemu/Kconfig b/arch/x86/cpu/qemu/Kconfig index b6297f7..fdf5ae3 100644 --- a/arch/x86/cpu/qemu/Kconfig +++ b/arch/x86/cpu/qemu/Kconfig @@ -8,6 +8,7 @@ config QEMU bool select ARCH_EARLY_INIT_R imply ENV_IS_NOWHERE + imply AHCI_PCI imply E1000 imply SYS_NS16550 imply USB diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig index 80b6bc5..d1b04c9 100644 --- a/arch/x86/cpu/queensbay/Kconfig +++ b/arch/x86/cpu/queensbay/Kconfig @@ -10,6 +10,7 @@ config INTEL_QUEENSBAY select HAVE_CMC select ARCH_EARLY_INIT_R imply ENV_IS_IN_SPI_FLASH + imply AHCI_PCI imply ICH_SPI imply INTEL_ICH6_GPIO imply MMC diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 8da05cd..3655a64 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -56,8 +56,6 @@ CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y -CONFIG_DM_SCSI=y -CONFIG_BLK=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 69cdc6c..e2bc9f7 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -38,8 +38,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_REGMAP=y CONFIG_SYSCON=y -CONFIG_DM_SCSI=y -CONFIG_BLK=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index f325ba4..34f57ad 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -34,8 +34,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_REGMAP=y CONFIG_SYSCON=y -CONFIG_DM_SCSI=y -CONFIG_BLK=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y CONFIG_RTL8169=y diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index 3efdbd2..f9ea907 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -19,10 +19,6 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} - /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x006ff000 diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index b4ea184..0c37407 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -19,10 +19,6 @@ "stdout=serial\0" \ "stderr=serial\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index 5f4800b..66e8006 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -17,9 +17,6 @@ "stdout=serial,vga\0" \ "stderr=serial,vga\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} - /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x5ff000 diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 5ec09ba..4181c06 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -21,9 +21,6 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA} - /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0 diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 6748b9c..949a581 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -24,10 +24,6 @@ "stdout=serial\0" \ "stderr=serial\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} - #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_USB_ETHER_SMSC95XX diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 5b24c2b..5b1660c 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -22,10 +22,6 @@ "stderr=vidconsole,serial\0" \ "usb_pgood_delay=40\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 033b5e2..01072f8 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -23,11 +23,7 @@ * ATA/SATA support for QEMU x86 targets * - Only legacy IDE controller is supported for QEMU '-M pc' target * - AHCI controller is supported for QEMU '-M q35' target - * - * Default configuraion is to support the QEMU default x86 target - * Undefine CONFIG_IDE to support q35 target */ -#ifdef CONFIG_IDE #define CONFIG_SYS_IDE_MAXBUS 2 #define CONFIG_SYS_IDE_MAXDEVICE 4 #define CONFIG_SYS_ATA_BASE_ADDR 0 @@ -38,12 +34,6 @@ #define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 #define CONFIG_ATAPI
-#undef CONFIG_SCSI_AHCI -#else -#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI} -#endif - /* SPI is not supported */
#define CONFIG_SPL_FRAMEWORK diff --git a/include/configs/som-6896.h b/include/configs/som-6896.h index af51c2a..509f23a 100644 --- a/include/configs/som-6896.h +++ b/include/configs/som-6896.h @@ -16,9 +16,6 @@
#define CONFIG_MISC_INIT_R
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI} - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index 17adf7e..927e1b6 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -19,10 +19,6 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0"
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT} - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 4d02cd4..27ba9ee 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -15,14 +15,6 @@ #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0
-#define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI} - #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS #define CONFIG_PCI_MEM_SIZE 0x10000000

On 30 July 2017 at 20:24, Bin Meng bmeng.cn@gmail.com wrote:
After MMC is converted to DM, convert to use DM SCSI as well for all x86 boards and imply BLK for both MMC and SCSI drivers.
CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
arch/Kconfig | 2 ++ arch/x86/cpu/baytrail/Kconfig | 1 + arch/x86/cpu/broadwell/Kconfig | 1 + arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/ivybridge/Kconfig | 1 + arch/x86/cpu/qemu/Kconfig | 1 + arch/x86/cpu/queensbay/Kconfig | 1 + configs/chromebook_link64_defconfig | 2 -- configs/chromebook_link_defconfig | 2 -- configs/chromebox_panther_defconfig | 2 -- include/configs/bayleybay.h | 4 ---- include/configs/conga-qeval20-qa3-e3845.h | 4 ---- include/configs/cougarcanyon2.h | 3 --- include/configs/crownbay.h | 3 --- include/configs/dfi-bt700.h | 4 ---- include/configs/minnowmax.h | 4 ---- include/configs/qemu-x86.h | 10 ---------- include/configs/som-6896.h | 3 --- include/configs/som-db5800-som-6867.h | 4 ---- include/configs/x86-chromebook.h | 8 -------- 20 files changed, 8 insertions(+), 53 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org

On Tue, Aug 1, 2017 at 5:12 PM, Simon Glass sjg@chromium.org wrote:
On 30 July 2017 at 20:24, Bin Meng bmeng.cn@gmail.com wrote:
After MMC is converted to DM, convert to use DM SCSI as well for all x86 boards and imply BLK for both MMC and SCSI drivers.
CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
arch/Kconfig | 2 ++ arch/x86/cpu/baytrail/Kconfig | 1 + arch/x86/cpu/broadwell/Kconfig | 1 + arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/ivybridge/Kconfig | 1 + arch/x86/cpu/qemu/Kconfig | 1 + arch/x86/cpu/queensbay/Kconfig | 1 + configs/chromebook_link64_defconfig | 2 -- configs/chromebook_link_defconfig | 2 -- configs/chromebox_panther_defconfig | 2 -- include/configs/bayleybay.h | 4 ---- include/configs/conga-qeval20-qa3-e3845.h | 4 ---- include/configs/cougarcanyon2.h | 3 --- include/configs/crownbay.h | 3 --- include/configs/dfi-bt700.h | 4 ---- include/configs/minnowmax.h | 4 ---- include/configs/qemu-x86.h | 10 ---------- include/configs/som-6896.h | 3 --- include/configs/som-db5800-som-6867.h | 4 ---- include/configs/x86-chromebook.h | 8 -------- 20 files changed, 8 insertions(+), 53 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
applied to u-boot-x86, thanks!
participants (2)
-
Bin Meng
-
Simon Glass