[U-Boot] [RFC PATCH 00/11] SPL support for RISC-V
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Lukas Auer (11): fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL Makefile: support building SPL FIT images without device trees spl: fit: use U-Boot device tree when FIT image has no device tree riscv: add run mode configuration for SPL spl: support booting via RISC-V OpenSBI riscv: add SPL support riscv: support SPL stack and global data relocation riscv: add a generic FIT generator script riscv: set default FIT generator script and build target for SPL builds riscv: qemu: add SPL configuration doc: update QEMU RISC-V documentation
Kconfig | 4 +- Makefile | 8 +- arch/Kconfig | 6 ++ arch/riscv/Kconfig | 36 +++++++-- arch/riscv/cpu/ax25/Kconfig | 6 +- arch/riscv/cpu/cpu.c | 6 +- arch/riscv/cpu/generic/Kconfig | 5 +- arch/riscv/cpu/start.S | 62 ++++++++++++++- arch/riscv/cpu/u-boot-spl.lds | 82 +++++++++++++++++++ arch/riscv/include/asm/encoding.h | 2 +- arch/riscv/include/asm/spl.h | 31 ++++++++ arch/riscv/lib/Makefile | 8 +- arch/riscv/lib/mkimage_fit_opensbi.sh | 100 ++++++++++++++++++++++++ arch/riscv/lib/spl.c | 48 ++++++++++++ board/emulation/qemu-riscv/Kconfig | 10 +++ board/emulation/qemu-riscv/MAINTAINERS | 2 + board/emulation/qemu-riscv/qemu-riscv.c | 17 ++++ common/image.c | 1 + common/spl/Kconfig | 17 ++++ common/spl/Makefile | 1 + common/spl/spl.c | 8 +- common/spl/spl_fit.c | 37 ++++++--- common/spl/spl_opensbi.c | 85 ++++++++++++++++++++ configs/qemu-riscv32_spl_defconfig | 11 +++ configs/qemu-riscv64_spl_defconfig | 12 +++ doc/README.qemu-riscv | 56 ++++++++++++- include/configs/qemu-riscv.h | 14 ++++ include/fdtdec.h | 2 +- include/image.h | 1 + include/opensbi.h | 40 ++++++++++ include/spl.h | 5 ++ lib/fdtdec.c | 6 +- 32 files changed, 687 insertions(+), 42 deletions(-) create mode 100644 arch/riscv/cpu/u-boot-spl.lds create mode 100644 arch/riscv/include/asm/spl.h create mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh create mode 100644 arch/riscv/lib/spl.c create mode 100644 common/spl/spl_opensbi.c create mode 100644 configs/qemu-riscv32_spl_defconfig create mode 100644 configs/qemu-riscv64_spl_defconfig create mode 100644 include/opensbi.h
The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
include/fdtdec.h | 2 +- lib/fdtdec.c | 6 ++---- 2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h index e6c22dd5cd..635f53083b 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -54,7 +54,7 @@ struct bd_info; #define SPL_BUILD 0 #endif
-#if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) +#ifdef CONFIG_OF_PRIOR_STAGE extern phys_addr_t prior_stage_fdt_address; #endif
diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 3ee786b579..569ffd5987 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1533,16 +1533,14 @@ int fdtdec_setup(void) puts("Failed to read control FDT\n"); return -1; } +# elif defined(CONFIG_OF_PRIOR_STAGE) + gd->fdt_blob = (void *)prior_stage_fdt_address; # endif # ifndef CONFIG_SPL_BUILD /* Allow the early environment to override the fdt address */ -# if CONFIG_IS_ENABLED(OF_PRIOR_STAGE) - gd->fdt_blob = (void *)prior_stage_fdt_address; -# else gd->fdt_blob = map_sysmem (env_get_ulong("fdtcontroladdr", 16, (unsigned long)map_to_sysmem(gd->fdt_blob)), 0); -# endif # endif
# if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
include/fdtdec.h | 2 +- lib/fdtdec.c | 6 ++---- 2 files changed, 3 insertions(+), 5 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
When building a U-Boot FIT image, the device trees specified by the board are unconditionally built for inclusion in the FIT image. However, not all device tree providers, such as CONFIG_OF_PRIOR_STAGE, require a device tree to be built and bundled with the U-Boot binary. They rely on other mechanisms to provide the device tree to U-Boot. Compilation on boards with these device tree providers fails, because they do not specify a device tree.
Change the makefile rules to conditionally build the device trees if either CONFIG_OF_SEPARATE or CONFIG_OF_EMBED is selected as device tree provider.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
Makefile | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 73fdf70cdd..23f4a73b7a 100644 --- a/Makefile +++ b/Makefile @@ -1263,7 +1263,9 @@ MKIMAGEFLAGS_u-boot.pbl = -n $(srctree)/$(CONFIG_SYS_FSL_PBL_RCW:"%"=%) \ -R $(srctree)/$(CONFIG_SYS_FSL_PBL_PBI:"%"=%) -T pblimage
u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \ - $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE + $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \ + $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED),dts/dt.dtb) \ + ,u-boot.bin) FORCE $(call if_changed,mkimage) $(BOARD_SIZE_CHECK)
@@ -1273,7 +1275,9 @@ else MKIMAGEFLAGS_u-boot.itb = -E endif
-u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE +u-boot.itb: u-boot-nodtb.bin \ + $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED),dts/dt.dtb) \ + $(U_BOOT_ITS) FORCE $(call if_changed,mkfitimage) $(BOARD_SIZE_CHECK)
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
When building a U-Boot FIT image, the device trees specified by the board are unconditionally built for inclusion in the FIT image. However, not all device tree providers, such as CONFIG_OF_PRIOR_STAGE, require a device tree to be built and bundled with the U-Boot binary. They rely on other mechanisms to provide the device tree to U-Boot. Compilation on boards with these device tree providers fails, because they do not specify a device tree.
Change the makefile rules to conditionally build the device trees if either CONFIG_OF_SEPARATE or CONFIG_OF_EMBED is selected as device tree provider.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
Makefile | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
As part of the SPL FIT boot flow, the device tree is appended to U-Boot proper. The device tree is used to record information on the loadables to make them available to the SPL framework and U-Boot proper. Depending on the U-Boot device tree provider, the FIT image might not include a device tree. Information on the loadables is missing in this case.
When booting via firmware bundled with the FIT image, U-Boot SPL loads the firmware binary and U-Boot proper before starting the firmware. The firmware, in turn, is responsible for starting U-Boot proper. Information on the memory location of the U-Boot proper loadable must be available to the SPL framework so that it can be passed to the firmware binary. To support this use case when no device tree is found in the FIT image, fall back to the U-Boot device tree in this situation.
At the same time, update the comment to remove the note that the destination address must be aligned to ARCH_DMA_MINALIGN. Alignment is only required as an intermediate step when reading external data. This is automatically handled by spl_fit_append_fdt(). After reading the external data, it is copied to the specified address, which does not have to be aligned to ARCH_DMA_MINALIGN.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
common/spl/spl_fit.c | 37 ++++++++++++++++++++++++------------- 1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 969f7775c1..0bfb91d686 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -11,6 +11,8 @@ #include <linux/libfdt.h> #include <spl.h>
+DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_SYS_BOOTM_LEN #define CONFIG_SYS_BOOTM_LEN (64 << 20) #endif @@ -278,25 +280,34 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image, void *fit, int images, ulong base_offset) { struct spl_image_info image_info; - int node, ret; + int node, ret = 0; + + /* + * Use the address following the image as target address for the + * device tree. + */ + image_info.load_addr = spl_image->load_addr + spl_image->size;
/* Figure out which device tree the board wants to use */ node = spl_fit_get_image_node(fit, images, FIT_FDT_PROP, 0); if (node < 0) { debug("%s: cannot find FDT node\n", __func__); - return node; - } - - /* - * Read the device tree and place it after the image. - * Align the destination address to ARCH_DMA_MINALIGN. - */ - image_info.load_addr = spl_image->load_addr + spl_image->size; - ret = spl_load_fit_image(info, sector, fit, base_offset, node, - &image_info);
- if (ret < 0) - return ret; + /* + * U-Boot did not find a device tree inside the FIT image. Use + * the U-Boot device tree instead. + */ + if (gd->fdt_blob) + memcpy((void *)image_info.load_addr, gd->fdt_blob, + fdt_totalsize(gd->fdt_blob)); + else + return node; + } else { + ret = spl_load_fit_image(info, sector, fit, base_offset, node, + &image_info); + if (ret < 0) + return ret; + }
/* Make the load-address of the FDT available for the SPL framework */ spl_image->fdt_addr = (void *)image_info.load_addr;
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
As part of the SPL FIT boot flow, the device tree is appended to U-Boot proper. The device tree is used to record information on the loadables to make them available to the SPL framework and U-Boot proper. Depending on the U-Boot device tree provider, the FIT image might not include a device tree. Information on the loadables is missing in this case.
When booting via firmware bundled with the FIT image, U-Boot SPL loads the firmware binary and U-Boot proper before starting the firmware. The firmware, in turn, is responsible for starting U-Boot proper. Information on the memory location of the U-Boot proper loadable must be available to the SPL framework so that it can be passed to the firmware binary. To support this use case when no device tree is found in the FIT image, fall back to the U-Boot device tree in this situation.
At the same time, update the comment to remove the note that the destination address must be aligned to ARCH_DMA_MINALIGN. Alignment is only required as an intermediate step when reading external data. This is automatically handled by spl_fit_append_fdt(). After reading the external data, it is copied to the specified address, which does not have to be aligned to ARCH_DMA_MINALIGN.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
common/spl/spl_fit.c | 37 ++++++++++++++++++++++++------------- 1 file changed, 24 insertions(+), 13 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
U-Boot SPL can be run in a different privilege mode from U-Boot proper. Add new configuration entries for SPL to allow the run mode to be configured independently of U-Boot proper.
Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE configuration symbols to also cover the SPL equivalents. Ensure that files compatible with only one privilege mode are not included in builds targeting an incompatible privilege mode.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
arch/riscv/Kconfig | 33 ++++++++++++++++++++++++++----- arch/riscv/cpu/ax25/Kconfig | 6 +++--- arch/riscv/cpu/cpu.c | 6 +++--- arch/riscv/cpu/generic/Kconfig | 2 +- arch/riscv/cpu/start.S | 6 +++--- arch/riscv/include/asm/encoding.h | 2 +- arch/riscv/lib/Makefile | 7 +++++-- 7 files changed, 44 insertions(+), 18 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 8cfc7d0faa..b8d01ba8e1 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -113,6 +113,23 @@ config RISCV_SMODE
endchoice
+choice + prompt "SPL Run Mode" + default SPL_RISCV_MMODE + depends on SPL + +config SPL_RISCV_MMODE + bool "Machine" + help + Choose this option to build U-Boot SPL for RISC-V M-Mode. + +config SPL_RISCV_SMODE + bool "Supervisor" + help + Choose this option to build U-Boot SPL for RISC-V S-Mode. + +endchoice + config RISCV_ISA_C bool "Emit compressed instructions" default y @@ -132,34 +149,40 @@ config 64BIT
config SIFIVE_CLINT bool - depends on RISCV_MMODE + depends on RISCV_MMODE || SPL_RISCV_MMODE select REGMAP select SYSCON + select SPL_REGMAP if SPL + select SPL_SYSCON if SPL help The SiFive CLINT block holds memory-mapped control and status registers associated with software and timer interrupts.
config ANDES_PLIC bool - depends on RISCV_MMODE + depends on RISCV_MMODE || SPL_RISCV_MMODE select REGMAP select SYSCON + select SPL_REGMAP if SPL + select SPL_SYSCON if SPL help The Andes PLIC block holds memory-mapped claim and pending registers associated with software interrupt.
config ANDES_PLMT bool - depends on RISCV_MMODE + depends on RISCV_MMODE || SPL_RISCV_MMODE select REGMAP select SYSCON + select SPL_REGMAP if SPL + select SPL_SYSCON if SPL help The Andes PLMT block holds memory-mapped mtime register associated with timer tick.
config RISCV_RDTIME bool - default y if RISCV_SMODE + default y if RISCV_SMODE || SPL_RISCV_SMODE help The provides the riscv_get_time() API that is implemented using the standard rdtime instruction. This is the case for S-mode U-Boot, and @@ -189,7 +212,7 @@ config NR_CPUS
config SBI_IPI bool - default y if RISCV_SMODE + default y if RISCV_SMODE || SPL_RISCV_SMODE depends on SMP
config XIP diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index 6b4b92e692..f4b59cb71d 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -4,8 +4,8 @@ config RISCV_NDS imply CPU imply CPU_RISCV imply RISCV_TIMER - imply ANDES_PLIC if RISCV_MMODE - imply ANDES_PLMT if RISCV_MMODE + imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE) + imply ANDES_PLMT if (RISCV_MMODE || SPL_RISCV_MMODE) help Run U-Boot on AndeStar V5 platforms and use some specific features which are provided by Andes Technology AndeStar V5 families. @@ -14,7 +14,7 @@ if RISCV_NDS
config RISCV_NDS_CACHE bool "AndeStar V5 families specific cache support" - depends on RISCV_MMODE + depends on RISCV_MMODE || SPL_RISCV_MMODE help Provide Andes Technology AndeStar V5 families specific cache support.
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index e9a8b437ed..ecf682c290 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -47,13 +47,13 @@ static inline bool supports_extension(char ext)
return false; #else /* !CONFIG_CPU */ -#ifdef CONFIG_RISCV_MMODE +#if CONFIG_IS_ENABLED(RISCV_MMODE) return csr_read(misa) & (1 << (ext - 'a')); -#else /* !CONFIG_RISCV_MMODE */ +#else /* !CONFIG_IS_ENABLED(RISCV_MMODE) */ #warning "There is no way to determine the available extensions in S-mode." #warning "Please convert your board to use the RISC-V CPU driver." return false; -#endif /* CONFIG_RISCV_MMODE */ +#endif /* CONFIG_IS_ENABLED(RISCV_MMODE) */ #endif /* CONFIG_CPU */ }
diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index 1d6ab5032d..b7552f539f 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -8,5 +8,5 @@ config GENERIC_RISCV imply CPU imply CPU_RISCV imply RISCV_TIMER - imply SIFIVE_CLINT if RISCV_MMODE + imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 60ac8c621e..08b9812c4d 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -40,7 +40,7 @@ secondary_harts_relocation_error: .section .text .globl _start _start: -#ifdef CONFIG_RISCV_MMODE +#if CONFIG_IS_ENABLED(RISCV_MMODE) csrr a0, mhartid #endif
@@ -63,7 +63,7 @@ _start:
#ifdef CONFIG_SMP /* set xSIE bit to receive IPIs */ -#ifdef CONFIG_RISCV_MMODE +#if CONFIG_IS_ENABLED(RISCV_MMODE) li t0, MIE_MSIE #else li t0, SIE_SSIE @@ -345,7 +345,7 @@ secondary_hart_loop:
#ifdef CONFIG_SMP csrr t0, MODE_PREFIX(ip) -#ifdef CONFIG_RISCV_MMODE +#if CONFIG_IS_ENABLED(RISCV_MMODE) andi t0, t0, MIE_MSIE #else andi t0, t0, SIE_SSIE diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h index 772668c74e..f5bf85ac19 100644 --- a/arch/riscv/include/asm/encoding.h +++ b/arch/riscv/include/asm/encoding.h @@ -7,7 +7,7 @@ #ifndef RISCV_CSR_ENCODING_H #define RISCV_CSR_ENCODING_H
-#ifdef CONFIG_RISCV_SMODE +#if CONFIG_IS_ENABLED(RISCV_SMODE) #define MODE_PREFIX(__suffix) s##__suffix #else #define MODE_PREFIX(__suffix) m##__suffix diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 6ae6ebbeaf..e4bc5df297 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -10,13 +10,16 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTI) += bootm.o image.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o -obj-$(CONFIG_RISCV_RDTIME) += rdtime.o +ifeq ($(CONFIG_$(SPL_)RISCV_MMODE),y) obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o obj-$(CONFIG_ANDES_PLIC) += andes_plic.o obj-$(CONFIG_ANDES_PLMT) += andes_plmt.o +else +obj-$(CONFIG_RISCV_RDTIME) += rdtime.o +obj-$(CONFIG_SBI_IPI) += sbi_ipi.o +endif obj-y += interrupts.o obj-y += reset.o -obj-$(CONFIG_SBI_IPI) += sbi_ipi.o obj-y += setjmp.o obj-$(CONFIG_SMP) += smp.o
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
U-Boot SPL can be run in a different privilege mode from U-Boot proper. Add new configuration entries for SPL to allow the run mode to be configured independently of U-Boot proper.
Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE configuration symbols to also cover the SPL equivalents. Ensure that files compatible with only one privilege mode are not included in builds targeting an incompatible privilege mode.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
arch/riscv/Kconfig | 33 ++++++++++++++++++++++++++----- arch/riscv/cpu/ax25/Kconfig | 6 +++--- arch/riscv/cpu/cpu.c | 6 +++--- arch/riscv/cpu/generic/Kconfig | 2 +- arch/riscv/cpu/start.S | 6 +++--- arch/riscv/include/asm/encoding.h | 2 +- arch/riscv/lib/Makefile | 7 +++++-- 7 files changed, 44 insertions(+), 18 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
RISC-V OpenSBI is an open-source implementation of the RISC-V Supervisor Binary Interface (SBI) specification. It is required by Linux and U-Boot running in supervisor mode. This patch adds support for booting via the OpenSBI FW_DYNAMIC firmware.
In this configuration, U-Boot SPL starts in machine mode. After loading OpenSBI and U-Boot proper, it will start OpenSBI. All necessary parameters are generated by U-Boot SPL and passed to OpenSBI. U-Boot proper is started in supervisor mode by OpenSBI. Support for OpenSBI is enabled with CONFIG_SPL_OPENSBI. An additional configuration entry, CONFIG_SPL_OPENSBI_LOAD_ADDR, is used to specify the load address of the OpenSBI firmware binary. It is not used directly in U-Boot and instead is intended to make the value available to scripts such as FIT configuration generators.
The header file include/opensbi.h is based on header files from the OpenSBI project. They are recent, as of commit bae54f764570 ("firmware: Add fw_dynamic firmware").
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
common/image.c | 1 + common/spl/Kconfig | 17 ++++++++ common/spl/Makefile | 1 + common/spl/spl.c | 6 +++ common/spl/spl_opensbi.c | 85 ++++++++++++++++++++++++++++++++++++++++ include/image.h | 1 + include/opensbi.h | 40 +++++++++++++++++++ include/spl.h | 5 +++ 8 files changed, 156 insertions(+) create mode 100644 common/spl/spl_opensbi.c create mode 100644 include/opensbi.h
diff --git a/common/image.c b/common/image.c index 9f9538fac2..7c7353a989 100644 --- a/common/image.c +++ b/common/image.c @@ -125,6 +125,7 @@ static const table_entry_t uimage_os[] = { #if defined(CONFIG_BOOTM_OPENRTOS) || defined(USE_HOSTCC) { IH_OS_OPENRTOS, "openrtos", "OpenRTOS", }, #endif + { IH_OS_OPENSBI, "opensbi", "RISC-V OpenSBI", },
{ -1, "", "", }, }; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 5978fb2934..9043f7b7ec 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1112,6 +1112,23 @@ config SPL_OPTEE OP-TEE is an open source Trusted OS which is loaded by SPL. More detail at: https://github.com/OP-TEE/optee_os
+config SPL_OPENSBI + bool "Support RISC-V OpenSBI" + depends on RISCV && SPL_RISCV_MMODE && RISCV_SMODE + help + OpenSBI is an open-source implementation of the RISC-V Supervisor Binary + Interface (SBI) specification. U-Boot supports the OpenSBI FW_DYNAMIC + firmware. It is loaded and started by U-Boot SPL. + + More details are available at https://github.com/riscv/opensbi and + https://github.com/riscv/riscv-sbi-doc + +config SPL_OPENSBI_LOAD_ADDR + hex "OpenSBI load address" + depends on SPL_OPENSBI + help + Load address of the OpenSBI binary. + config TPL bool depends on SUPPORT_TPL diff --git a/common/spl/Makefile b/common/spl/Makefile index d28de692dd..5ce6f4ae48 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o +obj-$(CONFIG_$(SPL_TPL_)OPENSBI) += spl_opensbi.o obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o obj-$(CONFIG_$(SPL_TPL_)FS_EXT4) += spl_ext.o diff --git a/common/spl/spl.c b/common/spl/spl.c index d5e3f680f4..1ed4741bdc 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -659,6 +659,12 @@ void board_init_r(gd_t *dummy1, ulong dummy2) (void *)spl_image.entry_point); break; #endif +#if CONFIG_IS_ENABLED(OPENSBI) + case IH_OS_OPENSBI: + debug("Jumping to U-Boot via RISC-V OpenSBI\n"); + spl_invoke_opensbi(&spl_image); + break; +#endif #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n"); diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c new file mode 100644 index 0000000000..a6b4480ed2 --- /dev/null +++ b/common/spl/spl_opensbi.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Fraunhofer AISEC, + * Lukas Auer lukas.auer@aisec.fraunhofer.de + * + * Based on common/spl/spl_atf.c + */ +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/smp.h> +#include <opensbi.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct fw_dynamic_info opensbi_info; + +static int spl_opensbi_find_uboot_node(void *blob, int *uboot_node) +{ + int fit_images_node, node; + const char *fit_os; + + fit_images_node = fdt_path_offset(blob, "/fit-images"); + if (fit_images_node < 0) + return -ENODEV; + + fdt_for_each_subnode(node, blob, fit_images_node) { + fit_os = fdt_getprop(blob, node, FIT_OS_PROP, NULL); + if (!fit_os) + continue; + + if (genimg_get_os_id(fit_os) == IH_OS_U_BOOT) { + *uboot_node = node; + return 0; + } + } + + return -ENODEV; +} + +void spl_invoke_opensbi(struct spl_image_info *spl_image) +{ + int ret, uboot_node; + ulong uboot_entry; + void (*opensbi_entry)(ulong hartid, ulong dtb, ulong info); + + if (!spl_image->fdt_addr) { + pr_err("No device tree specified in SPL image\n"); + hang(); + } + + /* Find U-Boot image in /fit-images */ + ret = spl_opensbi_find_uboot_node(spl_image->fdt_addr, &uboot_node); + if (ret) { + pr_err("Can't find U-Boot node, %d", ret); + hang(); + } + + /* Get U-Boot entry point */ + uboot_entry = fdt_getprop_u32(spl_image->fdt_addr, uboot_node, + "entry-point"); + if (uboot_entry == FDT_ERROR) + uboot_entry = fdt_getprop_u32(spl_image->fdt_addr, uboot_node, + "load-addr"); + + /* Prepare obensbi_info object */ + opensbi_info.magic = FW_DYNAMIC_INFO_MAGIC_VALUE; + opensbi_info.version = FW_DYNAMIC_INFO_VERSION; + opensbi_info.next_addr = uboot_entry; + opensbi_info.next_mode = FW_DYNAMIC_INFO_NEXT_MODE_S; + opensbi_info.options = SBI_SCRATCH_NO_BOOT_PRINTS; + + opensbi_entry = (void (*)(ulong, ulong, ulong))spl_image->entry_point; + invalidate_icache_all(); + +#ifdef CONFIG_SMP + ret = smp_call_function((ulong)spl_image->entry_point, + (ulong)spl_image->fdt_addr, + (ulong)&opensbi_info); + if (ret) + hang(); +#endif + opensbi_entry(gd->arch.boot_hart, (ulong)spl_image->fdt_addr, + (ulong)&opensbi_info); +} diff --git a/include/image.h b/include/image.h index 5f82194951..78a2dffe54 100644 --- a/include/image.h +++ b/include/image.h @@ -156,6 +156,7 @@ enum { IH_OS_OPENRTOS, /* OpenRTOS */ IH_OS_ARM_TRUSTED_FIRMWARE, /* ARM Trusted Firmware */ IH_OS_TEE, /* Trusted Execution Environment */ + IH_OS_OPENSBI, /* RISC-V OpenSBI */
IH_OS_COUNT, }; diff --git a/include/opensbi.h b/include/opensbi.h new file mode 100644 index 0000000000..9f1d62e7dd --- /dev/null +++ b/include/opensbi.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Based on include/sbi/{fw_dynamic.h,sbi_scratch.h} from the OpenSBI project. + */ +#ifndef OPENSBI_H +#define OPENSBI_H + +/** Expected value of info magic ('OSBI' ascii string in hex) */ +#define FW_DYNAMIC_INFO_MAGIC_VALUE 0x4942534f + +/** Maximum supported info version */ +#define FW_DYNAMIC_INFO_VERSION 0x1 + +/** Possible next mode values */ +#define FW_DYNAMIC_INFO_NEXT_MODE_U 0x0 +#define FW_DYNAMIC_INFO_NEXT_MODE_S 0x1 +#define FW_DYNAMIC_INFO_NEXT_MODE_M 0x3 + +enum sbi_scratch_options { + /** Disable prints during boot */ + SBI_SCRATCH_NO_BOOT_PRINTS = (1 << 0), +}; + +/** Representation dynamic info passed by previous booting stage */ +struct fw_dynamic_info { + /** Info magic */ + unsigned long magic; + /** Info version */ + unsigned long version; + /** Next booting stage address */ + unsigned long next_addr; + /** Next booting stage mode */ + unsigned long next_mode; + /** Options for OpenSBI library */ + unsigned long options; +} __packed; + +#endif diff --git a/include/spl.h b/include/spl.h index a90f971a23..e4640f3830 100644 --- a/include/spl.h +++ b/include/spl.h @@ -374,6 +374,11 @@ void spl_invoke_atf(struct spl_image_info *spl_image); */ void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3);
+/** + * spl_invoke_opensbi - boot using a RISC-V OpenSBI image + */ +void spl_invoke_opensbi(struct spl_image_info *spl_image); + /** * board_return_to_bootrom - allow for boards to continue with the boot ROM *
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
RISC-V OpenSBI is an open-source implementation of the RISC-V Supervisor Binary Interface (SBI) specification. It is required by Linux and U-Boot running in supervisor mode. This patch adds support for booting via the OpenSBI FW_DYNAMIC firmware.
In this configuration, U-Boot SPL starts in machine mode. After loading OpenSBI and U-Boot proper, it will start OpenSBI. All necessary parameters are generated by U-Boot SPL and passed to OpenSBI. U-Boot proper is started in supervisor mode by OpenSBI. Support for OpenSBI is enabled with CONFIG_SPL_OPENSBI. An additional configuration entry, CONFIG_SPL_OPENSBI_LOAD_ADDR, is used to specify the load address of the OpenSBI firmware binary. It is not used directly in U-Boot and instead is intended to make the value available to scripts such as FIT configuration generators.
The header file include/opensbi.h is based on header files from the OpenSBI project. They are recent, as of commit bae54f764570 ("firmware: Add fw_dynamic firmware").
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
common/image.c | 1 + common/spl/Kconfig | 17 ++++++++ common/spl/Makefile | 1 + common/spl/spl.c | 6 +++ common/spl/spl_opensbi.c | 85 ++++++++++++++++++++++++++++++++++++++++ include/image.h | 1 + include/opensbi.h | 40 +++++++++++++++++++ include/spl.h | 5 +++ 8 files changed, 156 insertions(+) create mode 100644 common/spl/spl_opensbi.c create mode 100644 include/opensbi.h
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode.
To be able to use SPL, boards have to provide a supported SPL boot device.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
arch/Kconfig | 6 +++ arch/riscv/Kconfig | 3 ++ arch/riscv/cpu/generic/Kconfig | 3 ++ arch/riscv/cpu/start.S | 23 +++++++++- arch/riscv/cpu/u-boot-spl.lds | 82 ++++++++++++++++++++++++++++++++++ arch/riscv/include/asm/spl.h | 31 +++++++++++++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/spl.c | 48 ++++++++++++++++++++ 8 files changed, 196 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/cpu/u-boot-spl.lds create mode 100644 arch/riscv/include/asm/spl.h create mode 100644 arch/riscv/lib/spl.c
diff --git a/arch/Kconfig b/arch/Kconfig index a946af816f..5462c9b933 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -76,6 +76,12 @@ config RISCV imply MTD imply TIMER imply CMD_DM + imply SPL_DM + imply SPL_OF_CONTROL + imply SPL_LIBCOMMON_SUPPORT + imply SPL_LIBGENERIC_SUPPORT + imply SPL_SERIAL_SUPPORT + imply SPL_TIMER
config SANDBOX bool "Sandbox" diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index b8d01ba8e1..01975d7c60 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -226,4 +226,7 @@ config STACK_SIZE_SHIFT int default 13
+config SPL_LDSCRIPT + default "arch/riscv/cpu/u-boot-spl.lds" + endmenu diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index b7552f539f..b2cb155d6d 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -10,3 +10,6 @@ config GENERIC_RISCV imply RISCV_TIMER imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU + imply SPL_CPU_SUPPORT + imply SPL_OPENSBI + imply SPL_LOAD_FIT diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 08b9812c4d..e053197645 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -76,7 +76,11 @@ _start: */ call_board_init_f: li t0, -16 +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) + li t1, CONFIG_SPL_STACK +#else li t1, CONFIG_SYS_INIT_SP_ADDR +#endif and sp, t1, t0 /* force 16 byte alignment */
call_board_init_f_0: @@ -160,7 +164,24 @@ wait_for_gd_init:
mv a0, zero /* a0 <-- boot_flags = 0 */ la t5, board_init_f - jr t5 /* jump to board_init_f() */ + jalr t5 /* jump to board_init_f() */ + +#ifdef CONFIG_SPL_BUILD +spl_clear_bss: + la t0, __bss_start + la t1, __bss_end + beq t0, t1, spl_call_board_init_r + +spl_clear_bss_loop: + SREG zero, 0(t0) + addi t0, t0, REGBYTES + bne t0, t1, spl_clear_bss_loop + +spl_call_board_init_r: + mv a0, zero + mv a1, zero + jal board_init_r +#endif
/* * void relocate_code (addr_sp, gd, addr_moni) diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds new file mode 100644 index 0000000000..32255d58de --- /dev/null +++ b/arch/riscv/cpu/u-boot-spl.lds @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Based on arch/riscv/cpu/u-boot.lds, which is + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation rick@andestech.com + * + * and arch/mips/cpu/u-boot-spl.lds. + */ +MEMORY { .spl_mem : ORIGIN = IMAGE_TEXT_BASE, LENGTH = IMAGE_MAX_SIZE } +MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \ + LENGTH = CONFIG_SPL_BSS_MAX_SIZE } + +OUTPUT_ARCH("riscv") +ENTRY(_start) + +SECTIONS +{ + . = ALIGN(4); + .text : { + arch/riscv/cpu/start.o (.text) + *(.text*) + } > .spl_mem + + . = ALIGN(4); + .rodata : { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } > .spl_mem + + . = ALIGN(4); + .data : { + *(.data*) + } > .spl_mem + . = ALIGN(4); + + .got : { + __got_start = .; + *(.got.plt) *(.got) + __got_end = .; + } > .spl_mem + + . = ALIGN(4); + + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } > .spl_mem + + . = ALIGN(4); + + .binman_sym_table : { + __binman_sym_start = .; + KEEP(*(SORT(.binman_sym*))); + __binman_sym_end = .; + } > .spl_mem + + . = ALIGN(4); + + /DISCARD/ : { *(.rela.plt*) } + .rela.dyn : { + __rel_dyn_start = .; + *(.rela*) + __rel_dyn_end = .; + } > .spl_mem + + . = ALIGN(4); + + .dynsym : { + __dyn_sym_start = .; + *(.dynsym) + __dyn_sym_end = .; + } > .spl_mem + + . = ALIGN(4); + + _end = .; + + .bss : { + __bss_start = .; + *(.bss*) + . = ALIGN(4); + __bss_end = .; + } > .bss_mem +} diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h new file mode 100644 index 0000000000..45c03fb9b6 --- /dev/null +++ b/arch/riscv/include/asm/spl.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Based on arch/mips/include/asm/spl.h. + * + * (C) Copyright 2012 + * Texas Instruments, <www.ti.com> + */ +#ifndef _ASM_RISCV_SPL_H_ +#define _ASM_RISCV_SPL_H_ + +enum { + BOOT_DEVICE_RAM, + BOOT_DEVICE_MMC1, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_MMC2_2, + BOOT_DEVICE_NAND, + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_NOR, + BOOT_DEVICE_UART, + BOOT_DEVICE_SPI, + BOOT_DEVICE_USB, + BOOT_DEVICE_SATA, + BOOT_DEVICE_I2C, + BOOT_DEVICE_BOARD, + BOOT_DEVICE_DFU, + BOOT_DEVICE_XIP, + BOOT_DEVICE_BOOTROM, + BOOT_DEVICE_NONE +}; + +#endif diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index e4bc5df297..c9179a5ff8 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -22,6 +22,7 @@ obj-y += interrupts.o obj-y += reset.o obj-y += setjmp.o obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_SPL_BUILD) += spl.o
# For building EFI apps CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI) diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c new file mode 100644 index 0000000000..bea8695987 --- /dev/null +++ b/arch/riscv/lib/spl.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Fraunhofer AISEC, + * Lukas Auer lukas.auer@aisec.fraunhofer.de + */ +#include <common.h> +#include <spl.h> +#include <asm/smp.h> + +DECLARE_GLOBAL_DATA_PTR; + +__weak void board_init_f(ulong dummy) +{ + int ret; + + ret = spl_early_init(); + if (ret) + panic("spl_early_init() failed: %d\n", ret); + + arch_cpu_init_dm(); + + preloader_console_init(); +} + +void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +{ + typedef void __noreturn (*image_entry_riscv_t)(ulong hart, void *dtb); + void *fdt_blob; + int ret; + +#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL) + fdt_blob = spl_image->fdt_addr; +#else + fdt_blob = (void *)gd->fdt_blob; +#endif + + image_entry_riscv_t image_entry = + (image_entry_riscv_t)spl_image->entry_point; + invalidate_icache_all(); + + debug("image entry point: 0x%lX\n", spl_image->entry_point); +#ifdef CONFIG_SMP + ret = smp_call_function(spl_image->entry_point, (ulong)fdt_blob, 0); + if (ret) + hang(); +#endif + image_entry(gd->arch.boot_hart, fdt_blob); +}
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly jumping to the image and via OpenSBI firmware. In the first case, both U-Boot SPL and proper must be compiled to run in the same privilege mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine mode and U-Boot proper for supervisor mode.
To be able to use SPL, boards have to provide a supported SPL boot device.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
arch/Kconfig | 6 +++ arch/riscv/Kconfig | 3 ++ arch/riscv/cpu/generic/Kconfig | 3 ++ arch/riscv/cpu/start.S | 23 +++++++++- arch/riscv/cpu/u-boot-spl.lds | 82 ++++++++++++++++++++++++++++++++++ arch/riscv/include/asm/spl.h | 31 +++++++++++++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/spl.c | 48 ++++++++++++++++++++ 8 files changed, 196 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/cpu/u-boot-spl.lds create mode 100644 arch/riscv/include/asm/spl.h create mode 100644 arch/riscv/lib/spl.c
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
To support relocation of the stack and global data on RISC-V, the secondary harts must be notified of the change using IPIs. We can reuse the hart relocation code for this purpose. It uses global data to store the new stack pointer and global data pointer for the secondary harts. This means that we cannot update the global data pointer of the main hart in spl_relocate_stack_gd(), because the secondary harts have not yet been relocated at this point. It is updated after the secondary harts have been notified.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
arch/riscv/cpu/start.S | 35 ++++++++++++++++++++++++++++++++++- common/spl/spl.c | 2 +- 2 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index e053197645..e8c65c887a 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -170,13 +170,46 @@ wait_for_gd_init: spl_clear_bss: la t0, __bss_start la t1, __bss_end - beq t0, t1, spl_call_board_init_r + beq t0, t1, spl_stack_gd_setup
spl_clear_bss_loop: SREG zero, 0(t0) addi t0, t0, REGBYTES bne t0, t1, spl_clear_bss_loop
+spl_stack_gd_setup: + jal spl_relocate_stack_gd + + /* skip setup if we did not relocate */ + beqz a0, spl_call_board_init_r + mv s0, a0 + + /* setup stack on main hart */ +#ifdef CONFIG_SMP + /* tp: hart id */ + slli t0, tp, CONFIG_STACK_SIZE_SHIFT + sub sp, s0, t0 +#else + mv sp, s0 +#endif + + /* set new stack and global data pointer on secondary harts */ +spl_secondary_hart_stack_gd_setup: + la a0, secondary_hart_relocate + mv a1, s0 + mv a2, s0 + jal smp_call_function + + /* hang if relocation of secondary harts has failed */ + beqz a0, 1f + mv a1, a0 + la a0, secondary_harts_relocation_error + jal printf + jal hang + + /* set new global data pointer on main hart */ +1: mv gp, s0 + spl_call_board_init_r: mv a0, zero mv a1, zero diff --git a/common/spl/spl.c b/common/spl/spl.c index 1ed4741bdc..834f39908b 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -756,7 +756,7 @@ ulong spl_relocate_stack_gd(void) #if CONFIG_IS_ENABLED(DM) dm_fixup_for_gd_move(new_gd); #endif -#if !defined(CONFIG_ARM) +#if !defined(CONFIG_ARM) && !defined(CONFIG_RISCV) gd = new_gd; #endif return ptr;
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
To support relocation of the stack and global data on RISC-V, the secondary harts must be notified of the change using IPIs. We can reuse the hart relocation code for this purpose. It uses global data to store the new stack pointer and global data pointer for the secondary harts. This means that we cannot update the global data pointer of the main hart in spl_relocate_stack_gd(), because the secondary harts have not yet been relocated at this point. It is updated after the secondary harts have been notified.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
arch/riscv/cpu/start.S | 35 ++++++++++++++++++++++++++++++++++- common/spl/spl.c | 2 +- 2 files changed, 35 insertions(+), 2 deletions(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
Add a generic FIT generator script for RISC-V to generate images containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or more device trees. The location of the OpenSBI firmware binary can be specified with the OPENSBI environment variable. By default, it is assumed to be "fw_dynamic.bin" and located in the U-Boot top-level. Device trees are passed as arguments to the generator script. A separate configuration entry is created for each device tree.
The load addresses of U-Boot and OpenSBI are parsed from the U-Boot configuration. They can be overwritten with the UBOOT_LOAD_ADDR and OPENSBI_LOAD_ADDR environment variables.
The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh) and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator scripts.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
arch/riscv/lib/mkimage_fit_opensbi.sh | 100 ++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh
diff --git a/arch/riscv/lib/mkimage_fit_opensbi.sh b/arch/riscv/lib/mkimage_fit_opensbi.sh new file mode 100755 index 0000000000..d6f95e5bfd --- /dev/null +++ b/arch/riscv/lib/mkimage_fit_opensbi.sh @@ -0,0 +1,100 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0+ +# +# script to generate FIT image source for RISC-V boards with OpenSBI +# and, optionally, multiple device trees (given on the command line). +# +# usage: $0 [<dt_name> [<dt_name] ...] + +[ -z "$OPENSBI" ] && OPENSBI="fw_dynamic.bin" + +if [ -z "$UBOOT_LOAD_ADDR" ]; then + UBOOT_LOAD_ADDR="$(grep "^CONFIG_SYS_TEXT_BASE=" .config | awk 'BEGIN{FS="="} {print $2}')" +fi + +if [ -z "$OPENSBI_LOAD_ADDR" ]; then + OPENSBI_LOAD_ADDR="$(grep "^CONFIG_SPL_OPENSBI_LOAD_ADDR=" .config | awk 'BEGIN{FS="="} {print $2}')" +fi + +if [ ! -f $OPENSBI ]; then + echo "WARNING: OpenSBI binary "$OPENSBI" not found, resulting binary is not functional." >&2 + OPENSBI=/dev/null +fi + +cat << __HEADER_EOF +/dts-v1/; + +/ { + description = "Configuration to load OpenSBI before U-Boot"; + + images { + uboot { + description = "U-Boot"; + data = /incbin/("u-boot-nodtb.bin"); + type = "standalone"; + os = "U-Boot"; + arch = "riscv"; + compression = "none"; + load = <$UBOOT_LOAD_ADDR>; + }; + opensbi { + description = "RISC-V OpenSBI"; + data = /incbin/("$OPENSBI"); + type = "firmware"; + os = "opensbi"; + arch = "riscv"; + compression = "none"; + load = <$OPENSBI_LOAD_ADDR>; + entry = <$OPENSBI_LOAD_ADDR>; + }; +__HEADER_EOF + +cnt=1 +for dtname in $* +do + cat << __FDT_IMAGE_EOF + fdt_$cnt { + description = "$(basename $dtname .dtb)"; + data = /incbin/("$dtname"); + type = "flat_dt"; + compression = "none"; + }; +__FDT_IMAGE_EOF +cnt=$((cnt+1)) +done + +cat << __CONF_HEADER_EOF + }; + configurations { + default = "config_1"; + +__CONF_HEADER_EOF + +if [ $# -eq 0 ]; then +cat << __CONF_SECTION_EOF + config_1 { + description = "U-Boot FIT"; + firmware = "opensbi"; + loadables = "uboot"; + }; +__CONF_SECTION_EOF +else +cnt=1 +for dtname in $* +do +cat << __CONF_SECTION_EOF + config_$cnt { + description = "$(basename $dtname .dtb)"; + firmware = "opensbi"; + loadables = "uboot"; + fdt = "fdt_$cnt"; + }; +__CONF_SECTION_EOF +cnt=$((cnt+1)) +done +fi + +cat << __ITS_EOF + }; +}; +__ITS_EOF
On Mon, Jul 22, 2019 at 2:01 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
Add a generic FIT generator script for RISC-V to generate images containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or more device trees. The location of the OpenSBI firmware binary can be specified with the OPENSBI environment variable. By default, it is assumed to be "fw_dynamic.bin" and located in the U-Boot top-level. Device trees are passed as arguments to the generator script. A separate configuration entry is created for each device tree.
The load addresses of U-Boot and OpenSBI are parsed from the U-Boot configuration. They can be overwritten with the UBOOT_LOAD_ADDR and OPENSBI_LOAD_ADDR environment variables.
The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh) and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator scripts.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
arch/riscv/lib/mkimage_fit_opensbi.sh | 100 ++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) create mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
Now that we have a generic FIT generator script for RISC-V, set it as the default. To also build the FIT image by default, set the default build target to "u-boot.itb" if CONFIG_SPL_LOAD_FIT is enabled.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Kconfig b/Kconfig index d2eb744e70..a78dd59a79 100644 --- a/Kconfig +++ b/Kconfig @@ -250,7 +250,8 @@ config BUILD_TARGET default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5 default "u-boot-spl.kwb" if ARCH_MVEBU && SPL default "u-boot-elf.srec" if RCAR_GEN3 - default "u-boot.itb" if SPL_LOAD_FIT && (ROCKCHIP_RK3399 || ARCH_SUNXI) + default "u-boot.itb" if SPL_LOAD_FIT && (ROCKCHIP_RK3399 || \ + ARCH_SUNXI || RISCV) default "u-boot.kwb" if KIRKWOOD default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT help @@ -463,6 +464,7 @@ config SPL_FIT_GENERATOR depends on SPL_FIT default "board/sunxi/mksunxi_fit_atf.sh" if SPL_LOAD_FIT && ARCH_SUNXI default "arch/arm/mach-rockchip/make_fit_atf.py" if SPL_LOAD_FIT && ARCH_ROCKCHIP + default "arch/riscv/lib/mkimage_fit_opensbi.sh" if SPL_LOAD_FIT && RISCV help Specifies a (platform specific) script file to generate the FIT source file used to build the U-Boot FIT image file. This gets
On Mon, Jul 22, 2019 at 2:01 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
Now that we have a generic FIT generator script for RISC-V, set it as the default. To also build the FIT image by default, set the default build target to "u-boot.itb" if CONFIG_SPL_LOAD_FIT is enabled.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must be loaded at address 0x80200000. In the default boot flow, U-Boot SPL starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
board/emulation/qemu-riscv/Kconfig | 10 ++++++++++ board/emulation/qemu-riscv/MAINTAINERS | 2 ++ board/emulation/qemu-riscv/qemu-riscv.c | 17 +++++++++++++++++ configs/qemu-riscv32_spl_defconfig | 11 +++++++++++ configs/qemu-riscv64_spl_defconfig | 12 ++++++++++++ include/configs/qemu-riscv.h | 14 ++++++++++++++ 6 files changed, 66 insertions(+) create mode 100644 configs/qemu-riscv32_spl_defconfig create mode 100644 configs/qemu-riscv64_spl_defconfig
diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 6cc7c31dc6..1928d6dda0 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,13 +13,21 @@ config SYS_CONFIG_NAME default "qemu-riscv"
config SYS_TEXT_BASE + default 0x81200000 if SPL default 0x80000000 if !RISCV_SMODE default 0x80200000 if RISCV_SMODE && ARCH_RV64I default 0x80400000 if RISCV_SMODE && ARCH_RV32I
+config SPL_TEXT_BASE + default 0x80000000 + +config SPL_OPENSBI_LOAD_ADDR + default 0x81000000 + config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select GENERIC_RISCV + select SUPPORT_SPL imply SYS_NS16550 imply VIRTIO_MMIO imply VIRTIO_NET @@ -43,5 +51,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply CMD_PCI imply E1000 imply NVME + imply SPL_RAM_SUPPORT + imply SPL_RAM_DEVICE
endif diff --git a/board/emulation/qemu-riscv/MAINTAINERS b/board/emulation/qemu-riscv/MAINTAINERS index c701c83d77..78969ed6bd 100644 --- a/board/emulation/qemu-riscv/MAINTAINERS +++ b/board/emulation/qemu-riscv/MAINTAINERS @@ -5,5 +5,7 @@ F: board/emulation/qemu-riscv/ F: include/configs/qemu-riscv.h F: configs/qemu-riscv32_defconfig F: configs/qemu-riscv32_smode_defconfig +F: configs/qemu-riscv32_spl_defconfig F: configs/qemu-riscv64_defconfig F: configs/qemu-riscv64_smode_defconfig +F: configs/qemu-riscv64_spl_defconfig diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index d6167aaef1..e04bd3001c 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <fdtdec.h> +#include <spl.h> #include <virtio_types.h> #include <virtio.h>
@@ -87,3 +88,19 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0; } + +#ifdef CONFIG_SPL +u32 spl_boot_device(void) +{ + /* RISC-V QEMU only supports RAM as SPL boot device */ + return BOOT_DEVICE_RAM; +} +#endif + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* boot using first FIT config */ + return 0; +} +#endif diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig new file mode 100644 index 0000000000..78e755b36a --- /dev/null +++ b/configs/qemu-riscv32_spl_defconfig @@ -0,0 +1,11 @@ +CONFIG_RISCV=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_TARGET_QEMU_VIRT=y +CONFIG_RISCV_SMODE=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_CMD_MII is not set +CONFIG_OF_PRIOR_STAGE=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig new file mode 100644 index 0000000000..a3f5e29d58 --- /dev/null +++ b/configs/qemu-riscv64_spl_defconfig @@ -0,0 +1,12 @@ +CONFIG_RISCV=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_TARGET_QEMU_VIRT=y +CONFIG_ARCH_RV64I=y +CONFIG_RISCV_SMODE=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_CMD_MII is not set +CONFIG_OF_PRIOR_STAGE=y diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index df22f780b0..69aa82d36a 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -8,6 +8,18 @@
#include <linux/sizes.h>
+#ifdef CONFIG_SPL + +#define CONFIG_SPL_MAX_SIZE 0x00100000 +#define CONFIG_SPL_BSS_START_ADDR 0x84000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 +#define CONFIG_SYS_SPL_MALLOC_START 0x84100000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 + +#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 + +#endif + #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
@@ -22,6 +34,7 @@ /* Environment options */ #define CONFIG_ENV_SIZE SZ_128K
+#ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(QEMU, qemu, na) \ func(VIRTIO, virtio, 0) \ @@ -51,5 +64,6 @@ #define CONFIG_PREBOOT \ "setenv fdt_addr ${fdtcontroladdr};" \ "fdt addr ${fdtcontroladdr};" +#endif
#endif /* __CONFIG_H */
On Mon, Jul 22, 2019 at 2:01 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must be loaded at address 0x80200000. In the default boot flow, U-Boot SPL starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
board/emulation/qemu-riscv/Kconfig | 10 ++++++++++ board/emulation/qemu-riscv/MAINTAINERS | 2 ++ board/emulation/qemu-riscv/qemu-riscv.c | 17 +++++++++++++++++ configs/qemu-riscv32_spl_defconfig | 11 +++++++++++ configs/qemu-riscv64_spl_defconfig | 12 ++++++++++++ include/configs/qemu-riscv.h | 14 ++++++++++++++ 6 files changed, 66 insertions(+) create mode 100644 configs/qemu-riscv32_spl_defconfig create mode 100644 configs/qemu-riscv64_spl_defconfig
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
The available defconfigs for RISC-V QEMU have changed. We now have configurations to compile U-Boot to run in supervisor mode and for U-Boot SPL. Update the QEMU RISC-V documentation to reflect these changes.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de ---
doc/README.qemu-riscv | 56 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)
diff --git a/doc/README.qemu-riscv b/doc/README.qemu-riscv index e2e4804917..5688084d36 100644 --- a/doc/README.qemu-riscv +++ b/doc/README.qemu-riscv @@ -7,7 +7,8 @@ U-Boot on QEMU's 'virt' machine on RISC-V
QEMU for RISC-V supports a special 'virt' machine designed for emulation and virtualization purposes. This document describes how to run U-Boot under it. -Both 32-bit 64-bit targets are supported. +Both 32-bit and 64-bit targets are supported, running in either machine or +supervisor mode.
The QEMU virt machine models a generic RISC-V virtual machine with support for the VirtIO standard networking and block storage devices. It has CLINT, PLIC, @@ -27,6 +28,11 @@ Set the CROSS_COMPILE environment variable as usual, and run: make qemu-riscv64_defconfig make
+This will compile U-Boot for machine mode. To build supervisor mode binaries, +use the configurations qemu-riscv32_smode_defconfig and +qemu-riscv64_smode_defconfig instead. Note that U-Boot running in supervisor +mode requires a supervisor binary interface (SBI), such as RISC-V OpenSBI. + Running U-Boot -------------- The minimal QEMU command line to get U-Boot up and running is: @@ -43,4 +49,52 @@ parameter. For example, '-m 2G' creates 2GiB memory for the target, and the memory node in the embedded DTB created by QEMU reflects the new setting.
+For instructions on how to run U-Boot in supervisor mode on QEMU +with OpenSBI, see the documentation available with OpenSBI: + +https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md + These have been tested in QEMU 3.0.0. + +Running U-Boot SPL +------------------ +In the default SPL configuration, U-Boot SPL starts in machine mode. U-Boot +proper and OpenSBI (FW_DYNAMIC firmware) are bundled as FIT image and made +available to U-Boot SPL. Both are then loaded by U-Boot SPL and the location +of U-Boot proper is passed to OpenSBI. After initialization, U-Boot proper is +started in supervisor mode by OpenSBI. + +OpenSBI must be compiled before compiling U-Boot. Clone the OpenSBI repository +and run the following command. + + git clone https://github.com/riscv/opensbi.git + cd opensbi + make PLATFORM=qemu/virt + +See the OpenSBI documentation for full details: + +https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md + +To make the FW_DYNAMIC binary (build/platform/qemu/virt/firmware/fw_dynamic.bin) +available to U-Boot, either copy it into the U-Boot root directory or specify +its location with the OPENSBI environment variable. Afterwards, compile U-Boot +with the following commands. + +- For 32-bit RISC-V: + make qemu-riscv32_spl_defconfig + make + +- For 64-bit RISC-V: + make qemu-riscv64_spl_defconfig + make + +The minimal QEMU commands to run U-Boot SPL in both 32-bit and 64-bit +configurations are: + +- For 32-bit RISC-V: + qemu-system-riscv32 -nographic -machine virt -kernel spl/u-boot-spl \ + -device loader,file=u-boot.itb,addr=0x80200000 + +- For 64-bit RISC-V: + qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ + -device loader,file=u-boot.itb,addr=0x80200000
On Mon, Jul 22, 2019 at 2:01 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
The available defconfigs for RISC-V QEMU have changed. We now have configurations to compile U-Boot to run in supervisor mode and for U-Boot SPL. Update the QEMU RISC-V documentation to reflect these changes.
Signed-off-by: Lukas Auer lukas.auer@aisec.fraunhofer.de
doc/README.qemu-riscv | 56 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-)
Reviewed-by: Bin Meng bmeng.cn@gmail.com Tested-by: Bin Meng bmeng.cn@gmail.com
Hi Lukas,
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Nice job done! It looks the SPL support was cleanly implemented.
I've tested this series, on qemu-riscv64 with UP and SMP, both work fine. However when testing on qemu-riscv32, the U-Boot proper does not boot. Please have a look.
Regards, Bin
Hi Bin,
On Tue, 2019-07-23 at 16:32 +0800, Bin Meng wrote:
Hi Lukas,
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Nice job done! It looks the SPL support was cleanly implemented.
Thank you very much! :)
I've tested this series, on qemu-riscv64 with UP and SMP, both work fine. However when testing on qemu-riscv32, the U-Boot proper does not boot. Please have a look.
Regards, Bin
Thank you for reviewing and testing the series!
Do you mean that the U-Boot prompt does not appear? Testing the series on qemu-riscv32, I get the U-Boot prompt from U-Boot proper. I did not try to boot Linux on qemu-riscv32, however. I will try that tomorrow.
Thanks, Lukas
Hi Lukas,
On Wed, Jul 24, 2019 at 5:34 AM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Tue, 2019-07-23 at 16:32 +0800, Bin Meng wrote:
Hi Lukas,
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Nice job done! It looks the SPL support was cleanly implemented.
Thank you very much! :)
I've tested this series, on qemu-riscv64 with UP and SMP, both work fine. However when testing on qemu-riscv32, the U-Boot proper does not boot. Please have a look.
Regards, Bin
Thank you for reviewing and testing the series!
Do you mean that the U-Boot prompt does not appear? Testing the series
I mean U-Boot proper, the S-mode payload that SPL loads.
on qemu-riscv32, I get the U-Boot prompt from U-Boot proper. I did not try to boot Linux on qemu-riscv32, however. I will try that tomorrow.
After debugging myself, it turns out to be a false alarm. Sorry about that.
I was using a 64-bit OpenSBI fw_dynamic.bin. Looks OpenSBI doc does not clearly mention how 32-bit build is to be done, and I will send a patch for that. After switching a 32-bit OpenSBI firmware now I am able to boot to 32-bit U-Boot proper.
Regards, Bin
Hi Bin,
On Wed, 2019-07-24 at 10:55 +0800, Bin Meng wrote:
Hi Lukas,
On Wed, Jul 24, 2019 at 5:34 AM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Tue, 2019-07-23 at 16:32 +0800, Bin Meng wrote:
Hi Lukas,
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Nice job done! It looks the SPL support was cleanly implemented.
Thank you very much! :)
I've tested this series, on qemu-riscv64 with UP and SMP, both work fine. However when testing on qemu-riscv32, the U-Boot proper does not boot. Please have a look.
Regards, Bin
Thank you for reviewing and testing the series!
Do you mean that the U-Boot prompt does not appear? Testing the series
I mean U-Boot proper, the S-mode payload that SPL loads.
on qemu-riscv32, I get the U-Boot prompt from U-Boot proper. I did not try to boot Linux on qemu-riscv32, however. I will try that tomorrow.
After debugging myself, it turns out to be a false alarm. Sorry about that.
I was using a 64-bit OpenSBI fw_dynamic.bin. Looks OpenSBI doc does not clearly mention how 32-bit build is to be done, and I will send a patch for that. After switching a 32-bit OpenSBI firmware now I am able to boot to 32-bit U-Boot proper.
No problem. You are right, that should be stated more clearly in the OpenSBI docs. Thanks for testing again!
Thanks, Lukas
Hi Lukas,
On Wed, Jul 24, 2019 at 5:23 PM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Wed, 2019-07-24 at 10:55 +0800, Bin Meng wrote:
Hi Lukas,
On Wed, Jul 24, 2019 at 5:34 AM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Tue, 2019-07-23 at 16:32 +0800, Bin Meng wrote:
Hi Lukas,
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Nice job done! It looks the SPL support was cleanly implemented.
Thank you very much! :)
I've tested this series, on qemu-riscv64 with UP and SMP, both work fine. However when testing on qemu-riscv32, the U-Boot proper does not boot. Please have a look.
Regards, Bin
Thank you for reviewing and testing the series!
Do you mean that the U-Boot prompt does not appear? Testing the series
I mean U-Boot proper, the S-mode payload that SPL loads.
on qemu-riscv32, I get the U-Boot prompt from U-Boot proper. I did not try to boot Linux on qemu-riscv32, however. I will try that tomorrow.
After debugging myself, it turns out to be a false alarm. Sorry about that.
I was using a 64-bit OpenSBI fw_dynamic.bin. Looks OpenSBI doc does not clearly mention how 32-bit build is to be done, and I will send a patch for that. After switching a 32-bit OpenSBI firmware now I am able to boot to 32-bit U-Boot proper.
No problem. You are right, that should be stated more clearly in the OpenSBI docs. Thanks for testing again!
One thing just occurred to me, is that did you try using binman to package SPL + OpenSBI + U-Boot proper into one image?
I am not sure whether this is the preferred way going forward, hence I added Simon for his comments.
Regards, Bin
Hi Bin,
On Wed, 2019-07-24 at 21:49 +0800, Bin Meng wrote:
Hi Lukas,
On Wed, Jul 24, 2019 at 5:23 PM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Wed, 2019-07-24 at 10:55 +0800, Bin Meng wrote:
Hi Lukas,
On Wed, Jul 24, 2019 at 5:34 AM Auer, Lukas lukas.auer@aisec.fraunhofer.de wrote:
Hi Bin,
On Tue, 2019-07-23 at 16:32 +0800, Bin Meng wrote:
Hi Lukas,
On Mon, Jul 22, 2019 at 2:00 AM Lukas Auer lukas.auer@aisec.fraunhofer.de wrote:
This series adds support for SPL to RISC-V U-Boot. Images can be booted via OpenSBI (FW_DYNAMIC firmware) or by directly jumping to them. In the former case, OpenSBI and U-Boot proper are bundled as a FIT image and made available to U-Boot SPL. Currently, only the QEMU board enables U-Boot SPL with a dedicated configuration. It uses RAM as SPL boot device.
On many RISC-V CPUs, the device tree is provided to U-Boot by the first stage bootloader. This requires changes to U-Boot SPL (patches 1, 2 and 3), which modify the behavior on other boards as well. To get feedback on this, I am therefore sending this series as RFC first.
To test this series, OpenSBI has to be compiled first. The fw_dynamic.bin binary must be copied into the U-Boot root directory. Alternatively, the location of the binary can be specified with the OPENSBI environment variable. U-Boot can then be build as normal using the configuration qemu-riscv64_spl_defconfig for 64-bit builds or qemu-riscv32_spl_defconfig for 32-bit builds. The outputs from the build process are the U-Boot SPL binary (spl/u-boot-spl.bin) and the U-Boot FIT image (u-boot.itb) containing U-Boot proper and OpenSBI.
U-Boot can be run in QEMU with the following command.
qemu-system-riscv64 -nographic -machine virt -kernel spl/u-boot-spl \ -device loader,file=u-boot.itb,addr=0x80200000
Nice job done! It looks the SPL support was cleanly implemented.
Thank you very much! :)
I've tested this series, on qemu-riscv64 with UP and SMP, both work fine. However when testing on qemu-riscv32, the U-Boot proper does not boot. Please have a look.
Regards, Bin
Thank you for reviewing and testing the series!
Do you mean that the U-Boot prompt does not appear? Testing the series
I mean U-Boot proper, the S-mode payload that SPL loads.
on qemu-riscv32, I get the U-Boot prompt from U-Boot proper. I did not try to boot Linux on qemu-riscv32, however. I will try that tomorrow.
After debugging myself, it turns out to be a false alarm. Sorry about that.
I was using a 64-bit OpenSBI fw_dynamic.bin. Looks OpenSBI doc does not clearly mention how 32-bit build is to be done, and I will send a patch for that. After switching a 32-bit OpenSBI firmware now I am able to boot to 32-bit U-Boot proper.
No problem. You are right, that should be stated more clearly in the OpenSBI docs. Thanks for testing again!
One thing just occurred to me, is that did you try using binman to package SPL + OpenSBI + U-Boot proper into one image?
I am not sure whether this is the preferred way going forward, hence I added Simon for his comments.
Yes, I did try it out, but decided not to include it in this series, because at least for QEMU it was easier to just use the QEMU device loader to load the FIT image into memory.
What I did was to use binman to package SPL and the U-Boot FIT image. Information on the location of the FIT image is then available to U-Boot SPL. This makes it possible for the SPL RAM driver to load the FIT image without knowing where it is located beforehand, which is really nice. I did not try to use binman to package the individual components instead of the FIT image.
We might be able to use binman on the HiFive Unleashed board. The bootloader already loads the complete image into memory. We would therefore not have to include any MMC code into U-Boot SPL and could just use the SPL RAM driver and binman to find the FIT image.
Thanks, Lukas
participants (3)
-
Auer, Lukas -
Bin Meng -
Lukas Auer