[U-Boot] [PATCH 1/6] esd/common: extend cpld command with address parameter
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
This patch adds support for an address parameter to esd's cpld command. This is in preparation to remove compiled-in binary cpld (xsvf) bitstreams.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/common/xilinx_jtag/micro.c | 24 ++++++++++++++++-------- board/esd/common/xilinx_jtag/ports.c | 10 ++++------ 2 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/board/esd/common/xilinx_jtag/micro.c b/board/esd/common/xilinx_jtag/micro.c index 9b2cf90..37ac0cc 100644 --- a/board/esd/common/xilinx_jtag/micro.c +++ b/board/esd/common/xilinx_jtag/micro.c @@ -66,10 +66,7 @@ #include "lenval.h" #include "ports.h"
- -extern const unsigned char fpgadata[]; -extern int filesize; - +const unsigned char *xsvfdata;
/*============================================================================ * XSVF #define @@ -1838,12 +1835,23 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) unsigned long duration; unsigned long long startClock, endClock;
+ if (argc == 2) + xsvfdata = (unsigned char *)simple_strtoul(argv[1], NULL, 16); + else { +#ifdef CONFIG_SYS_XSVF_DEFAULT_ADDR + xsvfdata = (unsigned char *)CONFIG_SYS_XSVF_DEFAULT_ADDR; +#else + printf("Usage:\ncpld %s\n", cmdtp->help); + return -1; +#endif + } + iErrorCode = XSVF_ERRORCODE( XSVF_ERROR_NONE ); pzXsvfFileName = 0; xsvf_iDebugLevel = 0;
printf("XSVF Player v%s, Xilinx, Inc.\n", XSVF_VERSION); - printf("XSVF Filesize = %d bytes\n", filesize); + printf("Reading XSVF data @ %p\n", xsvfdata);
/* Initialize the I/O. SetPort initializes I/O on first call */ setPort( TMS, 1 ); @@ -1858,7 +1866,7 @@ int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return( iErrorCode ); } U_BOOT_CMD( - cpld, 1, 1, do_cpld, - "Program onboard CPLD", - NULL + cpld, 2, 1, do_cpld, + "program onboard CPLD", + "<xsvf-addr>" ); diff --git a/board/esd/common/xilinx_jtag/ports.c b/board/esd/common/xilinx_jtag/ports.c index ac0d7ac..f039d04 100644 --- a/board/esd/common/xilinx_jtag/ports.c +++ b/board/esd/common/xilinx_jtag/ports.c @@ -42,9 +42,7 @@ static int oldstate = 0; static int newstate = 0; static int readptr = 0;
-extern long filesize; -extern const unsigned char fpgadata[]; - +extern const unsigned char *xsvfdata;
/* if in debugging mode, then just set the variables */ void setPort(short p,short val) @@ -86,10 +84,10 @@ void pulseClock(void) void readByte(unsigned char *data) { /* pretend reading using a file */ - *data = fpgadata[readptr++]; - newstate = (100 * filepos++) / filesize; + *data = xsvfdata[readptr++]; + newstate = filepos++ >> 10; if (newstate != oldstate) { - printf("%4d\r\r\r\r", newstate); + printf("%4d kB\r\r\r\r", newstate); oldstate = newstate; } }
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
This patch removes the cpld binary bitstream that is used by esd's cpld command on CMS700 boards.
Because u-boot with an external cpld bitstream may not take more space in flash than before the u-boot binary is shrinked a little bit. Some unused featues have been removed therefore.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/cms700/cms700.c | 8 - board/esd/cms700/config.mk | 7 +- board/esd/cms700/fpgadata.c | 1812 ------------------------------------------- include/configs/CMS700.h | 53 +-- 4 files changed, 6 insertions(+), 1874 deletions(-) delete mode 100644 board/esd/cms700/fpgadata.c
diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c index 9a522b2..658a267 100644 --- a/board/esd/cms700/cms700.c +++ b/board/esd/cms700/cms700.c @@ -31,14 +31,6 @@ DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-/* fpga configuration data - not compressed, generated by bin2c */ -const unsigned char fpgadata[] = -{ -#include "fpgadata.c" -}; -int filesize = sizeof(fpgadata); - - int board_early_init_f (void) { /* diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk index 5c3c01c..8e48bcd 100644 --- a/board/esd/cms700/config.mk +++ b/board/esd/cms700/config.mk @@ -20,9 +20,4 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # - -# -# esd CMS405 boards -# - -TEXT_BASE = 0xFFFC0000 +TEXT_BASE = 0xFFFC8000 diff --git a/board/esd/cms700/fpgadata.c b/board/esd/cms700/fpgadata.c deleted file mode 100644 index 08be5e7..0000000 --- a/board/esd/cms700/fpgadata.c +++ /dev/null @@ -1,1812 +0,0 @@ - 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, - 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, - 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, - 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, - 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0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00, diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 40fef88..ae8494d 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -80,8 +80,6 @@
#define CONFIG_CMD_DHCP #define CONFIG_CMD_BSP -#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF #define CONFIG_CMD_NAND #define CONFIG_CMD_I2C @@ -167,31 +165,6 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1
-/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------- - */ -#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ -#define PCI_HOST_FORCE 1 /* configure as pci host */ -#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ - -#define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ -#undef CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ - -#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ - -#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ -#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ -#define CONFIG_SYS_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ -#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ -#define CONFIG_SYS_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */ -#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ -#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is @@ -222,21 +195,16 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-#if 0 /* test-only */ -#define CONFIG_SYS_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ -#endif - /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
#if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) # define CONFIG_SYS_RAMBOOT 1 @@ -291,8 +259,7 @@ /*----------------------------------------------------------------------- * FPGA stuff */ -#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ -#define CONFIG_SYS_FPGA_MAX_SIZE 32*1024 /* 32kByte is enough for CPLD */ +#define CONFIG_SYS_XSVF_DEFAULT_ADDR 0xfffc0000
/* FPGA program pin configuration */ #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (ppc output) */ @@ -356,17 +323,7 @@ * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ -#if 0 -#define PLLMR0_DEFAULT PLLMR0_266_133_66_33 -#define PLLMR1_DEFAULT PLLMR1_266_133_66_33 -#endif -#if 0 -#define PLLMR0_DEFAULT PLLMR0_200_100_50_33 -#define PLLMR1_DEFAULT PLLMR1_200_100_50_33 -#endif -#if 1 #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 -#endif
#endif /* __CONFIG_H */
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
This patch removes the cpld binary bitstream that is used by esd's cpld command on PMC405 boards.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/pmc405/fpgadata.c | 2472 ------------------------------------------- board/esd/pmc405/pmc405.c | 7 - include/configs/PMC405.h | 3 - 3 files changed, 0 insertions(+), 2482 deletions(-) delete mode 100644 board/esd/pmc405/fpgadata.c
diff --git a/board/esd/pmc405/fpgadata.c b/board/esd/pmc405/fpgadata.c deleted file mode 100644 index ebdf71d..0000000 --- a/board/esd/pmc405/fpgadata.c +++ /dev/null @@ -1,2472 +0,0 @@ - 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, - 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, - 0xf9,0x60,0x20,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, - 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, - 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, - 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, - 0x08,0xea,0x08,0x00,0x00,0x00,0x22,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00,0x00, - 0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x09,0x00, - 0x00,0x04,0x38,0x01,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x08,0x00,0x01,0x00, - 0x00,0x00,0x00,0x01,0x09,0x00,0x00,0x0c,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x09, - 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0x35,0xcc,0x00,0x01,0x09,0x00,0x35,0xd0,0x00,0x03,0x00,0x35,0xd0,0x00,0x01,0x04, - 0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00,0x00,0x64,0x02,0x08,0xf0,0x04, - 0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x07,0x00,0x07,0x20,0x12,0x00,0x12,0x01,0x04, - 0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00, - 0x00,0x00, diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 94caa6c..192a642 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -34,13 +34,6 @@ DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-/* fpga configuration data - not compressed, generated by bin2c */ -const unsigned char fpgadata[] = -{ -#include "fpgadata.c" -}; -int filesize = sizeof(fpgadata); - int board_early_init_f (void) { /* diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index c598d00..a9e7134 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -282,9 +282,6 @@ /* * FPGA stuff */ -#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ -#define CONFIG_SYS_FPGA_MAX_SIZE (32 * 1024) /* 32kByte for CPLD */ - /* FPGA program pin configuration */ #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (output) */ #define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (output) */
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
This patch removes the cpld binary bitstream that is used by esd's cpld command on VOM405 boards.
Because u-boot with an external cpld bitstream may not take more space in flash than before the u-boot binary is shrinked a little bit.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/vom405/config.mk | 8 +- board/esd/vom405/fpgadata.c | 1812 ------------------------------------------- board/esd/vom405/vom405.c | 7 - include/configs/VOM405.h | 21 +- 4 files changed, 6 insertions(+), 1842 deletions(-) delete mode 100644 board/esd/vom405/fpgadata.c
diff --git a/board/esd/vom405/config.mk b/board/esd/vom405/config.mk index 3041b77..8e48bcd 100644 --- a/board/esd/vom405/config.mk +++ b/board/esd/vom405/config.mk @@ -20,10 +20,4 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # - -# -# esd VOH405 boards -# - -TEXT_BASE = 0xFFFC0000 -#TEXT_BASE = 0x00FC0000 +TEXT_BASE = 0xFFFC8000 diff --git a/board/esd/vom405/fpgadata.c b/board/esd/vom405/fpgadata.c deleted file mode 100644 index 1c3a963..0000000 --- a/board/esd/vom405/fpgadata.c +++ /dev/null @@ -1,1812 +0,0 @@ - 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, - 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, - 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, - 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, - 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, - 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, - 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0x85,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xac,0x00,0x00,0x48,0x01, - 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xb0,0xc0,0x00,0x14,0x01,0x00, - 0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x80,0x00,0x80,0x01,0x00,0x00, - 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x00,0x00,0x80,0x09,0x00,0x00,0x00, - 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x08,0x00,0x04,0x61,0x00,0x00,0x00,0x00, - 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x40,0x00,0x48,0x01,0x00,0x00,0x00,0x00,0x00, - 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, - 0x00,0x35,0xd0,0x88,0x00,0x04,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, - 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x88,0x00,0x04,0x01,0x00,0x00, - 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00, - 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff, - 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00, diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c index d67b23e..a481aca 100644 --- a/board/esd/vom405/vom405.c +++ b/board/esd/vom405/vom405.c @@ -31,13 +31,6 @@ DECLARE_GLOBAL_DATA_PTR;
extern void lxt971_no_sleep(void);
-/* fpga configuration data - not compressed, generated by bin2c */ -const unsigned char fpgadata[] = -{ -#include "fpgadata.c" -}; -int filesize = sizeof(fpgadata); - int board_early_init_f (void) { /* diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index db00c65..4717869 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -177,10 +177,10 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
#if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) # define CONFIG_SYS_RAMBOOT 1 @@ -231,8 +231,7 @@ /* * FPGA stuff */ -#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ -#define CONFIG_SYS_FPGA_MAX_SIZE 32*1024 /* 32kByte is enough for CPLD */ +#define CONFIG_SYS_XSVF_DEFAULT_ADDR 0xfffc0000
/* FPGA program pin configuration */ #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (ppc output) */ @@ -293,17 +292,7 @@ * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ -#if 0 -#define PLLMR0_DEFAULT PLLMR0_266_133_66_33 -#define PLLMR1_DEFAULT PLLMR1_266_133_66_33 -#endif -#if 0 -#define PLLMR0_DEFAULT PLLMR0_200_100_50_33 -#define PLLMR1_DEFAULT PLLMR1_200_100_50_33 -#endif -#if 1 #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 -#endif
#endif /* __CONFIG_H */
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
This patch removes the cpld binary bitstream that is used by esd's cpld command on DP405 boards.
Because u-boot with an external cpld bitstream may not take more space in flash than before the u-boot binary is shrinked a little bit. Some unused featues have been removed therefore.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/dp405/config.mk | 7 +- board/esd/dp405/dp405.c | 8 - board/esd/dp405/fpgadata.c | 1812 -------------------------------------------- include/configs/DP405.h | 86 +-- 4 files changed, 7 insertions(+), 1906 deletions(-) delete mode 100644 board/esd/dp405/fpgadata.c
diff --git a/board/esd/dp405/config.mk b/board/esd/dp405/config.mk index 3041b77..9b1a8be 100644 --- a/board/esd/dp405/config.mk +++ b/board/esd/dp405/config.mk @@ -21,9 +21,4 @@ # MA 02111-1307 USA #
-# -# esd VOH405 boards -# - -TEXT_BASE = 0xFFFC0000 -#TEXT_BASE = 0x00FC0000 +TEXT_BASE = 0xFFFD0000 diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c index c32c7c7..352b877 100644 --- a/board/esd/dp405/dp405.c +++ b/board/esd/dp405/dp405.c @@ -29,14 +29,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* fpga configuration data - not compressed, generated by bin2c */ -const unsigned char fpgadata[] = -{ -#include "fpgadata.c" -}; -int filesize = sizeof(fpgadata); - - int board_early_init_f (void) { /* diff --git a/board/esd/dp405/fpgadata.c b/board/esd/dp405/fpgadata.c deleted file mode 100644 index eae8457..0000000 --- a/board/esd/dp405/fpgadata.c +++ /dev/null @@ -1,1812 +0,0 @@ - 0x07,0x20,0x12,0x00,0x12,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08, - 0xfe,0x08,0x00,0x00,0x00,0x20,0x01,0x0f,0xff,0xff,0xff,0x09,0x00,0x00,0x00,0x00, - 0xf9,0x60,0x40,0x93,0x02,0x08,0xff,0x02,0x08,0xff,0x02,0x08,0xe8,0x08,0x00,0x00, - 0x00,0x06,0x01,0x00,0x09,0x05,0x00,0x02,0x08,0xed,0x04,0x00,0x03,0x0d,0x40,0x08, - 0x00,0x00,0x00,0x12,0x01,0x00,0x00,0x00,0x09,0x03,0xff,0xff,0x00,0x00,0x00,0x01, - 0x00,0x00,0x03,0x09,0x03,0xff,0xfd,0x03,0xff,0xfd,0x04,0x00,0x00,0x00,0x00,0x02, - 0x08,0xea,0x08,0x00,0x00,0x00,0x32,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, - 0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, - 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0x00,0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc0,0x08,0x00,0xc4,0x09,0x00,0x00, - 0x00,0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc4,0x08,0x00,0xc4,0x01,0x00,0x00,0x00, - 0x00,0x00,0x00,0x01,0x09,0x00,0x35,0xc8,0x08,0x00,0x00,0x01,0x00,0x00,0x00,0x00, - 0x00,0x00,0x01,0x09,0x00,0x35,0xcc,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x00, - 0x00,0x01,0x04,0x00,0x00,0x4e,0x20,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x09, - 0x00,0x35,0xd0,0x00,0x00,0x80,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00, - 0x00,0x00,0x00,0x00,0x00,0x03,0x09,0x00,0x35,0xd0,0x00,0x00,0x80,0x01,0x00,0x00, - 0x00,0x00,0x00,0x00,0x01,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x04,0x00,0x00, - 0x00,0x64,0x02,0x08,0xf0,0x04,0x00,0x00,0x00,0x00,0x02,0x08,0xff,0x02,0x08,0xff, - 0x08,0x00,0x00,0x00,0x01,0x01,0x00,0x09,0x00,0x00,0x00, diff --git a/include/configs/DP405.h b/include/configs/DP405.h index 187547d..49ecb6f 100644 --- a/include/configs/DP405.h +++ b/include/configs/DP405.h @@ -52,39 +52,20 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_PPC4xx_EMAC -#define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_PHY_ADDR 0 /* PHY address */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include <config_cmd_default.h>
#define CONFIG_CMD_BSP -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF -#define CONFIG_CMD_DATE #define CONFIG_CMD_I2C #define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_NET
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/ -#define CONFIG_SYS_RTC_REG_BASE_ADDR 0xF0000500 /* RTC Base Address */ - #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
#define CONFIG_PRAM 2 /* reserve 2 kB "protected RAM" */ @@ -134,33 +115,6 @@
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
-#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ - -/*----------------------------------------------------------------------- - * PCI stuff - *----------------------------------------------------------------------- - */ -#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */ -#define PCI_HOST_FORCE 1 /* configure as pci host */ -#define PCI_HOST_AUTO 2 /* detected via arbiter enable */ - -#define CONFIG_PCI /* include pci support */ -#define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ -#undef CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ - -#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ - -#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ -#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: CPCI-405 */ -#define CONFIG_SYS_PCI_CLASSCODE 0x0b20 /* PCI Class Code: Processor/PPC*/ -#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ -#define CONFIG_SYS_PCI_PTM1MS 0xfc000001 /* 64MB, enable hard-wired to 1 */ -#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ -#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is @@ -191,21 +145,16 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-#if 0 /* test-only */ -#define CONFIG_SYS_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ -#endif - /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 -#define CONFIG_SYS_MONITOR_BASE TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ +#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_MONITOR_BASE +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) +#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
#if (CONFIG_SYS_MONITOR_BASE < FLASH_BASE0_PRELIM) # define CONFIG_SYS_RAMBOOT 1 @@ -221,9 +170,6 @@ #define CONFIG_ENV_SIZE 0x700 /* 2048 bytes may be used for env vars*/ /* total size of a CAT24WC16 is 2048 bytes */
-#define CONFIG_SYS_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ -#define CONFIG_SYS_NVRAM_SIZE 242 /* NVRAM size */ - /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC16) for environment */ @@ -245,18 +191,11 @@ */
#define CAN_BA 0xF0000000 /* CAN Base Address */ -#define RTC_BA 0xF0000500 /* RTC Base Address */
/* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */ #define CONFIG_SYS_EBC_PB0AP 0x92015480 #define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 /* BAS=0xFFC,BS=4MB,BU=R/W,BW=16bit */
-#if 0 /* test-only */ -/* Memory Bank 1 (Flash Bank 1, NAND-FLASH) initialization */ -#define CONFIG_SYS_EBC_PB1AP 0x92015480 -#define CONFIG_SYS_EBC_PB1CR 0xF4018000 /* BAS=0xF40,BS=1MB,BU=R/W,BW=8bit */ -#endif - /* Memory Bank 2 (8 Bit Peripheral: CAN, UART, RTC) initialization */ #define CONFIG_SYS_EBC_PB2AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */ #define CONFIG_SYS_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ @@ -264,9 +203,6 @@ /*----------------------------------------------------------------------- * FPGA stuff */ -#define CONFIG_SYS_FPGA_XC95XL 1 /* using Xilinx XC95XL CPLD */ -#define CONFIG_SYS_FPGA_MAX_SIZE 32*1024 /* 32kByte is enough for CPLD */ - /* FPGA program pin configuration */ #define CONFIG_SYS_FPGA_PRG 0x04000000 /* JTAG TMS pin (ppc output) */ #define CONFIG_SYS_FPGA_CLK 0x02000000 /* JTAG TCK pin (ppc output) */ @@ -312,7 +248,7 @@ #define CONFIG_SYS_GPIO0_ISR1L 0x14000045 /* 16 ... 31 */ #define CONFIG_SYS_GPIO0_TSRH 0x00000000 /* 0 ... 15 */ #define CONFIG_SYS_GPIO0_TSRL 0x00000000 /* 16 ... 31 */ -#define CONFIG_SYS_GPIO0_TCR 0xF7FE0014 /* 0 ... 31 */ +#define CONFIG_SYS_GPIO0_TCR 0xB7FE0014 /* 0 ... 31 */
/* * Internal Definitions @@ -326,17 +262,7 @@ * Default speed selection (cpu_plb_opb_ebc) in mhz. * This value will be set if iic boot eprom is disabled. */ -#if 0 -#define PLLMR0_DEFAULT PLLMR0_266_133_66_33 -#define PLLMR1_DEFAULT PLLMR1_266_133_66_33 -#endif -#if 0 -#define PLLMR0_DEFAULT PLLMR0_200_100_50_33 -#define PLLMR1_DEFAULT PLLMR1_200_100_50_33 -#endif -#if 1 #define PLLMR0_DEFAULT PLLMR0_133_66_66_33 #define PLLMR1_DEFAULT PLLMR1_133_66_66_33 -#endif
#endif /* __CONFIG_H */
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/dp405/dp405.c | 32 ++++++++++++++++++++++++++------ 1 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c index 352b877..8f4b78d 100644 --- a/board/esd/dp405/dp405.c +++ b/board/esd/dp405/dp405.c @@ -89,20 +89,40 @@ int checkboard (void) int i = getenv_r ("serial#", str, sizeof(str)); unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe, 0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf}; - unsigned char id1, id2; + unsigned char id1, id2, rev;
puts ("Board: ");
- if (i == -1) { + if (i == -1) puts ("### No HW ID - assuming DP405"); - } else { + else puts(str); - }
id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f]; id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f]; - printf(" (ID=0x%1X%1X, PLD=0x%02X)\n", - id2, id1, in_8((void *)0xf0001000)); + + rev = in_8((void *)0xf0001000); + if (rev & 0x10) /* old DP405 compatibility */ + rev = in_8((void *)0xf0000800); + + switch (rev & 0xc0) { + case 0x00: + puts(" (HW=DP405"); + break; + case 0x80: + puts(" (HW=DP405/CO"); + break; + case 0xc0: + puts(" (HW=DN405"); + break; + } + printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f); + + if ((rev & 0xc0) == 0xc0) { + printf(", C5V=%s", + in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on"); + } + puts(")\n");
return 0; }
On Wednesday 29 April 2009, matthias.fuchs@esd.eu wrote:
From: Matthias Fuchs matthias.fuchs@esd-electronics.com
This patch adds support for an address parameter to esd's cpld command. This is in preparation to remove compiled-in binary cpld (xsvf) bitstreams.
Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu
All 6 patches applied to ppc4xx/next. Thanks.
Best regards, Stefan
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participants (2)
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matthias.fuchs＠esd.eu -
Stefan Roese