For i.MX6, the bootmode determine code is part of spl_boot_device, but there is might be a possibility for other part the code need to check the desired boot mode for adding new functionalities like modeboot env variable, or changing boot order etc.

So introduced imx6_src_get_boot_mode which actually reading the boot mode register for desired modes.

More cleanup will be add in future patches.

Cc: Stefano Babic sbabic@denx.de Cc: Tim Harvey tharvey@gateworks.com Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/init.c | 12 ++++++++++++ arch/arm/imx-common/spl.c | 4 ++-- arch/arm/include/asm/imx-common/sys_proto.h | 14 ++++++++++++++ 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index e5dbd93..036ebb2 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -115,3 +115,15 @@ void boot_mode_apply(unsigned cfg_val) writel(reg, &psrc->gpr10); } #endif + +#if defined(CONFIG_MX6) +u32 imx6_src_get_boot_mode(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + + if (imx6_is_bmode_from_gpr9()) + return readl(&psrc->gpr9); + else + return readl(&psrc->sbmr1); +} +#endif diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 46325ec..6c20f28 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> #include <asm/spl.h> #include <spl.h> #include <asm/imx-common/hab.h> @@ -19,9 +20,8 @@ u32 spl_boot_device(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28); - unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); unsigned int bmode = readl(&psrc->sbmr2); + u32 reg = imx6_src_get_boot_mode();

/* * Check for BMODE if serial downloader is enabled diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index 539d34b..99e3869 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -8,6 +8,7 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_

+#include <asm/io.h> #include <asm/imx-common/regs-common.h> #include <common.h> #include "../arch-imx/cpu.h" @@ -38,6 +39,19 @@ #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL)) #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))

+#ifdef CONFIG_MX6 +#define IMX6_SRC_GPR10_BMODE BIT(28) + +static inline u8 imx6_is_bmode_from_gpr9(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + + return readl(&psrc->gpr10) & IMX6_SRC_GPR10_BMODE; +} + +u32 imx6_src_get_boot_mode(void); +#endif /* CONFIG_MX6 */ + u32 get_nr_cpus(void); u32 get_cpu_rev(void); u32 get_cpu_speed_grade_hz(void);

BOOT_CFG1[7:4] the NAND boot mode selection is done only when BOOT_CFG1[7] is 1 hence update the NAND boot mode detection bit case. This information available on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey tharvey@gateworks.com Reviewed by: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 6c20f28..81fc0ca 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -63,8 +63,8 @@ u32 spl_boot_device(void) case 0x6: case 0x7: return BOOT_DEVICE_MMC1; - /* NAND Flash: 8.5.2 */ - case 0x8 ... 0xf: + /* NAND Flash: 8.5.2, Table 8-10 */ + case 0x8: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE;

Instead of initializing 'struct src' to SRC_BASE_ADDR on every function better to have global define macro.

Reviewed by: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/init.c | 6 ++---- arch/arm/imx-common/spl.c | 3 +-- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ arch/arm/include/asm/imx-common/sys_proto.h | 4 +--- 4 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index 036ebb2..5b4f828 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -119,11 +119,9 @@ void boot_mode_apply(unsigned cfg_val) #if defined(CONFIG_MX6) u32 imx6_src_get_boot_mode(void) { - struct src *psrc = (struct src *)SRC_BASE_ADDR; - if (imx6_is_bmode_from_gpr9()) - return readl(&psrc->gpr9); + return readl(&src_base->gpr9); else - return readl(&psrc->sbmr1); + return readl(&src_base->sbmr1); } #endif diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 614e05c..f392941 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -19,8 +19,7 @@ /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) { - struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int bmode = readl(&psrc->sbmr2); + unsigned int bmode = readl(&src_base->sbmr2); u32 reg = imx6_src_get_boot_mode();

/* diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 6727c56..646013d 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -473,6 +473,8 @@ struct src { u32 gpr10; };

+#define src_base ((struct src *)SRC_BASE_ADDR) + #define SRC_SCR_M4_ENABLE_OFFSET 22 #define SRC_SCR_M4_ENABLE_MASK (1 << 22) #define SRC_SCR_M4C_NON_SCLR_RST_OFFSET 4 diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h index e09caeb..2c13ced 100644 --- a/arch/arm/include/asm/imx-common/sys_proto.h +++ b/arch/arm/include/asm/imx-common/sys_proto.h @@ -79,9 +79,7 @@ enum imx6_bmode {

static inline u8 imx6_is_bmode_from_gpr9(void) { - struct src *psrc = (struct src *)SRC_BASE_ADDR; - - return readl(&psrc->gpr10) & IMX6_SRC_GPR10_BMODE; + return readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE; }

u32 imx6_src_get_boot_mode(void);

From: Jagan Teki jagan@amarulasolutions.com

Boot from eMMC: -------------- U-Boot SPL 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27) Trying to boot from MMC2

U-Boot 2017.01-00314-gd0cd9cd-dirty (Jan 25 2017 - 13:25:27 +0100)

CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 36C Reset cause: POR Model: Engicam Is.IoT MX6UL eMMC Starterkit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment

In: serial Out: serial Err: serial switch to partitions #0, OK mmc1(part 0) is current device

Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Reviewed by: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6ul-isiot-emmc.dts | 77 +++++++++++++++++++++++++++++++++++ board/engicam/isiotmx6ul/MAINTAINERS | 2 + board/engicam/isiotmx6ul/isiotmx6ul.c | 26 +++++++++++- configs/imx6ul_isiot_emmc_defconfig | 39 ++++++++++++++++++ include/configs/imx6ul_isiot.h | 2 +- 6 files changed, 145 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/imx6ul-isiot-emmc.dts create mode 100644 configs/imx6ul_isiot_emmc_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c5c8487..47389b1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -317,6 +317,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ imx6q-icore-rqs.dtb \ imx6sx-sabreauto.dtb \ imx6ul-geam-kit.dtb \ + imx6ul-isiot-emmc.dtb \ imx6ul-isiot-mmc.dtb \ imx6ul-isiot-nand.dtb

diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts new file mode 100644 index 0000000..677de96 --- /dev/null +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6ul-isiot.dtsi" + +/ { + model = "Engicam Is.IoT MX6UL eMMC Starterkit"; + compatible = "engicam,imx6ul-isiot", "fsl,imx6ul"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + bus-width = <8>; + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17070 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17070 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17070 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17070 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17070 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17070 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17070 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17070 + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17070 + >; + }; +}; diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/isiotmx6ul/MAINTAINERS index f4dcfbd..c30cfe7 100644 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ b/board/engicam/isiotmx6ul/MAINTAINERS @@ -4,7 +4,9 @@ S: Maintained F: board/engicam/isiotmx6ul F: include/configs/imx6ul_isiot.h F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_nand_defconfig F: arch/arm/dts/imx6ul-isiot.dtsi F: arch/arm/dts/imx6ul-isiot-mmc.dts +F: arch/arm/dts/imx6ul-isiot-emmc.dts F: arch/arm/dts/imx6ul-isiot-nand.dts diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 07dd501..9cde4fc 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -153,10 +153,24 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), };

+static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_ALE__USDHC2_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) +#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5)

-struct fsl_esdhc_cfg usdhc_cfg[1] = { +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, + {USDHC2_BASE_ADDR, 0, 8}, };

int board_mmc_getcd(struct mmc *mmc) @@ -168,6 +182,9 @@ int board_mmc_getcd(struct mmc *mmc) case USDHC1_BASE_ADDR: ret = !gpio_get_value(USDHC1_CD_GPIO); break; + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; }

return ret; @@ -181,6 +198,7 @@ int board_mmc_init(bd_t *bis) * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) * mmc0 USDHC1 + * mmc1 USDHC2 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -190,6 +208,12 @@ int board_mmc_init(bd_t *bis) gpio_direction_input(USDHC1_CD_GPIO); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig new file mode 100644 index 0000000..94fe808 --- /dev/null +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6ul-isiot-emmc.dtb" +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="isiotmx6ul> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 10311d0..1b0e436 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -145,7 +145,7 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_USDHC_NUM 2 # define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif

From: Jagan Teki jagan@amarulasolutions.com

Let the runtime code can set the mmcdev and mmcroot based on the devno using mmc_get_env_dev instead of defining separately in build-time configs using mmc_late_init func.

Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Reviewed by: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/isiotmx6ul/isiotmx6ul.c | 22 ++++++++++++++++++++++ include/configs/imx6ul_isiot.h | 2 -- 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c index 0e607e0..b96e4ce 100644 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ b/board/engicam/isiotmx6ul/isiotmx6ul.c @@ -7,6 +7,7 @@ */

#include <common.h> +#include <mmc.h>

#include <asm/io.h> #include <asm/gpio.h> @@ -103,6 +104,24 @@ static void setup_gpmi_nand(void) } #endif /* CONFIG_NAND_MXS */

+#ifdef CONFIG_ENV_IS_IN_MMC +static void mmc_late_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_dev(); + + setenv_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no); + setenv("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} +#endif + int board_late_init(void) { switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> @@ -111,6 +130,9 @@ int board_late_init(void) case IMX6_BMODE_ESD: case IMX6_BMODE_MMC: case IMX6_BMODE_EMMC: +#ifdef CONFIG_ENV_IS_IN_MMC + mmc_late_init(); +#endif setenv("modeboot", "mmcboot"); break; case IMX6_BMODE_NAND: diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 7258fed..4009648 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -45,9 +45,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_addr=0x87800000\0" \ "boot_fdt=try\0" \ - "mmcdev=0\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \

Add usdhc4 node, which is eMMC for Engicam i.CoreM6 RQS modules.

eMMC Log: -------- icorem6qdl-rqs> mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device icorem6qdl-rqs> mmcinfo Device: FSL_SDHC Manufacturer ID: fe OEM: 14e Name: MMC04 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.4.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 4-bit Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH

Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Reviewed by: Stefano Babic sbabic@denx.de Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)

diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 750229b..8b9d5b4 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -107,6 +107,13 @@ status = "okay"; };

+&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + no-1-8-v; + status = "okay"; +}; + &iomuxc { pinctrl_enet: enetgrp { fsl,pins = < @@ -167,4 +174,19 @@ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070 >; }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070 + >; + }; };

From: Jagan Teki jagan@amarulasolutions.com

Boot from eMMC: -------------- U-Boot SPL 2017.01-00318-g8e243f8 (Jan 26 2017 - 11:53:21) Trying to boot from MMC2

U-Boot 2017.01-00318-g8e243f8 (Jan 26 2017 - 11:53:21 +0100)

CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: POR Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment

In: serial Out: serial Err: serial switch to partitions #0, OK mmc1(part 0) is current device Net: No ethernet found. Hit any key to stop autoboot: 0 Booting from mmc ... switch to partitions #0, OK mmc1(part 0) is current device

Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 24 ++++++++++++++++++++++-- include/configs/imx6qdl_icore_rqs.h | 2 +- 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index e3c520f..175bda5 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -77,8 +77,22 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), };

-struct fsl_esdhc_cfg usdhc_cfg[1] = { +static iomux_v3_cfg_t const usdhc4_pads[] = { + IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR, 1, 4}, + {USDHC4_BASE_ADDR, 1, 8}, };

int board_mmc_getcd(struct mmc *mmc) @@ -88,6 +102,7 @@ int board_mmc_getcd(struct mmc *mmc)

switch (cfg->esdhc_base) { case USDHC3_BASE_ADDR: + case USDHC4_BASE_ADDR: ret = 1; break; } @@ -102,7 +117,8 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) - * mmc0 USDHC3 + * mmc0 USDHC3 + * mmc1 USDHC4 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -110,6 +126,10 @@ int board_mmc_init(bd_t *bis) SETUP_IOMUX_PADS(usdhc3_pads); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; + case 1: + SETUP_IOMUX_PADS(usdhc4_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index 6f7195d..cd94c5f 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -124,7 +124,7 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_USDHC_NUM 2 # define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif

From: Jagan Teki jagan@amarulasolutions.com

Let the runtime code can set the mmcdev and mmcroot based on the devno using mmc_get_env_dev instead of defining separately in build-time configs using mmc_late_init func.

Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 22 ++++++++++++++++++++++ include/configs/imx6qdl_icore_rqs.h | 2 -- 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index cc7f897..04fb0c2 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -7,6 +7,7 @@ */

#include <common.h> +#include <mmc.h>

#include <asm/io.h> #include <asm/gpio.h> @@ -45,6 +46,24 @@ int board_init(void) return 0; }

+#ifdef CONFIG_ENV_IS_IN_MMC +static void mmc_late_init(void) +{ + char cmd[32]; + char mmcblk[32]; + u32 dev_no = mmc_get_env_dev(); + + setenv_ulong("mmcdev", dev_no); + + /* Set mmcblk env */ + sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no); + setenv("mmcroot", mmcblk); + + sprintf(cmd, "mmc dev %d", dev_no); + run_command(cmd, 0); +} +#endif + int board_late_init(void) { switch ((imx6_src_get_boot_mode() & IMX6_BMODE_MASK) >> @@ -53,6 +72,9 @@ int board_late_init(void) case IMX6_BMODE_ESD: case IMX6_BMODE_MMC: case IMX6_BMODE_EMMC: +#ifdef CONFIG_ENV_IS_IN_MMC + mmc_late_init(); +#endif setenv("modeboot", "mmcboot"); break; default: diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index c62c1d4..3358320 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -40,9 +40,7 @@ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ - "mmcdev=0\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \