[U-Boot] [PATCH 1/2] i.MX6Q: spl: Fix falcon to use dram_init_banksize
From: Jagan Teki jagan@amarulasolutions.com
Memory dt node update introduced by spl_fixup_fdt() in below commit was making DDR configuration in-appropriate to boot falcon mode. Hence added dram_init_banksize for explicit assignment of proper base and size of DDR.
"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot" (sha1: 6e7585bb64b12f632681c80c4b193349e1985d92)
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/mach-imx/spl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 75698c4..0979458 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -15,6 +15,8 @@ #include <spl.h> #include <asm/mach-imx/hab.h>
+DECLARE_GLOBAL_DATA_PTR; + #if defined(CONFIG_MX6) /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) @@ -126,3 +128,13 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) }
#endif + +#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT) +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = imx_ddr_size(); + + return 0; +} +#endif
From: Jagan Teki jagan@amarulasolutions.com
Add Falcon mode support in Engicam i.CoreM6 board.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/common/spl.c | 11 +++++++++++ configs/imx6qdl_icore_mmc_defconfig | 1 + include/configs/imx6-engicam.h | 14 ++++++++++++++ 3 files changed, 26 insertions(+)
diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index a8a7cf3..6dc9851 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -39,6 +39,17 @@ static iomux_v3_cfg_t const uart_pads[] = { #endif };
+#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + + return 0; +} +#endif + #ifdef CONFIG_MX6QDL /* * Driving strength: diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 9d61c48..4baed1c 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -48,3 +48,4 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_VIDEO_IPUV3=y +CONFIG_SPL_OS_BOOT=y diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index e0bdb656..a1b7036 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -183,6 +183,20 @@ # define CONFIG_MII #endif
+/* Falcon Mode */ +#ifdef CONFIG_SPL_OS_BOOT +# define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" +# define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +# define CONFIG_CMD_SPL +# define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 +# define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + +/* MMC support: args@1MB kernel@2MB */ +# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +# define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +# define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ +#endif + /* Framebuffer */ #ifdef CONFIG_VIDEO_IPUV3 # define CONFIG_IPUV3_CLK 260000000
Hi Stefano,
On Mon, Aug 28, 2017 at 4:45 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
Memory dt node update introduced by spl_fixup_fdt() in below commit was making DDR configuration in-appropriate to boot falcon mode. Hence added dram_init_banksize for explicit assignment of proper base and size of DDR.
"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot" (sha1: 6e7585bb64b12f632681c80c4b193349e1985d92)
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/mach-imx/spl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 75698c4..0979458 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -15,6 +15,8 @@ #include <spl.h> #include <asm/mach-imx/hab.h>
+DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_MX6) /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) @@ -126,3 +128,13 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) }
#endif
+#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT) +int dram_init_banksize(void) +{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;gd->bd->bi_dram[0].size = imx_ddr_size();return 0;+} +#endif
I think these should be in-tree for the release? otherwise falcon broke.
thanks!
Hi Jagan,
On 29/08/2017 11:09, Jagan Teki wrote:
Hi Stefano,
On Mon, Aug 28, 2017 at 4:45 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
Memory dt node update introduced by spl_fixup_fdt() in below commit was making DDR configuration in-appropriate to boot falcon mode. Hence added dram_init_banksize for explicit assignment of proper base and size of DDR.
"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot" (sha1: 6e7585bb64b12f632681c80c4b193349e1985d92)
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/mach-imx/spl.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 75698c4..0979458 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -15,6 +15,8 @@ #include <spl.h> #include <asm/mach-imx/hab.h>
+DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_MX6) /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) @@ -126,3 +128,13 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) }
#endif
+#if defined(CONFIG_MX6) && defined(CONFIG_SPL_OS_BOOT) +int dram_init_banksize(void) +{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;gd->bd->bi_dram[0].size = imx_ddr_size();return 0;+} +#endif
I think these should be in-tree for the release? otherwise falcon broke.
I pick it up.
Regards, Stefano
participants (2)
-
Jagan Teki -
Stefano Babic