Fix the offset of TCNT0 register, which is 0xc on SH4.

Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/sh/include/asm/config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h index df38c82abc..406156dff5 100644 --- a/arch/sh/include/asm/config.h +++ b/arch/sh/include/asm/config.h @@ -10,7 +10,7 @@

/* Timer */ #define CONFIG_SYS_TIMER_COUNTS_DOWN -#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */ +#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ #define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)

#endif