[U-Boot] [PATCH] i.MX28: digctrl registers added
From: Robert Delien robert@delien.nl
This patch adds the digctrl registers, eliminating the need of using magic numbers for their addresses.
Signed-off-by: Robert Delien (robert@delien.nl)
Robert Delien (1): Elimintated magic numbers for scratch register addresses
arch/arm/cpu/arm926ejs/mx28/mx28.c | 8 +- arch/arm/include/asm/arch-mx28/imx-regs.h | 1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++++++++++++++++++++++++++ 3 files changed, 160 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
From: Robert Delien robert@delien.nl
--- arch/arm/cpu/arm926ejs/mx28/mx28.c | 8 +- arch/arm/include/asm/arch-mx28/imx-regs.h | 1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++++++++++++++++++++++++++ 3 files changed, 160 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 0e69193..9bfd83b 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -261,14 +261,14 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif
-#define HW_DIGCTRL_SCRATCH0 0x8001c280 -#define HW_DIGCTRL_SCRATCH1 0x8001c290 int mx28_dram_init(void) { + struct mx28_digctl_regs *digctl_regs = + (struct mx28_digctl_regs *)MXS_DIGCTL_BASE; uint32_t sz[2];
- sz[0] = readl(HW_DIGCTRL_SCRATCH0); - sz[1] = readl(HW_DIGCTRL_SCRATCH1); + sz[0] = readl(&digctl_regs->hw_digctl_scratch0); + sz[1] = readl(&digctl_regs->hw_digctl_scratch1);
if (sz[0] != sz[1]) { printf("MX28:\n" diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h b/arch/arm/include/asm/arch-mx28/imx-regs.h index 9561b5e..f9e6c53 100644 --- a/arch/arm/include/asm/arch-mx28/imx-regs.h +++ b/arch/arm/include/asm/arch-mx28/imx-regs.h @@ -27,6 +27,7 @@ #include <asm/arch/regs-base.h> #include <asm/arch/regs-bch.h> #include <asm/arch/regs-clkctrl.h> +#include <asm/arch/regs-digctl.h> #include <asm/arch/regs-gpmi.h> #include <asm/arch/regs-i2c.h> #include <asm/arch/regs-ocotp.h> diff --git a/arch/arm/include/asm/arch-mx28/regs-digctl.h b/arch/arm/include/asm/arch-mx28/regs-digctl.h new file mode 100644 index 0000000..9a63594 --- /dev/null +++ b/arch/arm/include/asm/arch-mx28/regs-digctl.h @@ -0,0 +1,155 @@ +/* + * Freescale i.MX28 DIGCTL Register Definitions + * + * Copyright (C) 2012 Robert Delien robert@delien.nl + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __MX28_REGS_DIGCTL_H__ +#define __MX28_REGS_DIGCTL_H__ + +#include <asm/arch/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mx28_digctl_regs { + mx28_reg_32(hw_digctl_ctrl) /* 0x000 */ + mx28_reg_32(hw_digctl_status) /* 0x010 */ + mx28_reg_32(hw_digctl_hclkcount) /* 0x020 */ + mx28_reg_32(hw_digctl_ramctrl) /* 0x030 */ + mx28_reg_32(hw_digctl_emi_status) /* 0x040 */ + mx28_reg_32(hw_digctl_read_margin) /* 0x050 */ + uint32_t hw_digctl_writeonce; /* 0x060 */ + uint32_t reserved_writeonce[3]; + mx28_reg_32(hw_digctl_bist_ctl) /* 0x070 */ + mx28_reg_32(hw_digctl_bist_status) /* 0x080 */ + uint32_t hw_digctl_entropy; /* 0x090 */ + uint32_t reserved_entropy[3]; + uint32_t hw_digctl_entropy_latched; /* 0x0a0 */ + uint32_t reserved_entropy_latched[3]; + + uint32_t reserved1[4]; + + mx28_reg_32(hw_digctl_microseconds) /* 0x0c0 */ + uint32_t hw_digctl_dbgrd; /* 0x0d0 */ + uint32_t reserved_hw_digctl_dbgrd[3]; + uint32_t hw_digctl_dbg; /* 0x0e0 */ + uint32_t reserved_hw_digctl_dbg[3]; + + uint32_t reserved2[4]; + + mx28_reg_32(hw_digctl_usb_loopback) /* 0x100 */ + mx28_reg_32(hw_digctl_ocram_status0) /* 0x110 */ + mx28_reg_32(hw_digctl_ocram_status1) /* 0x120 */ + mx28_reg_32(hw_digctl_ocram_status2) /* 0x130 */ + mx28_reg_32(hw_digctl_ocram_status3) /* 0x140 */ + mx28_reg_32(hw_digctl_ocram_status4) /* 0x150 */ + mx28_reg_32(hw_digctl_ocram_status5) /* 0x160 */ + mx28_reg_32(hw_digctl_ocram_status6) /* 0x170 */ + mx28_reg_32(hw_digctl_ocram_status7) /* 0x180 */ + mx28_reg_32(hw_digctl_ocram_status8) /* 0x190 */ + mx28_reg_32(hw_digctl_ocram_status9) /* 0x1a0 */ + mx28_reg_32(hw_digctl_ocram_status10) /* 0x1b0 */ + mx28_reg_32(hw_digctl_ocram_status11) /* 0x1c0 */ + mx28_reg_32(hw_digctl_ocram_status12) /* 0x1d0 */ + mx28_reg_32(hw_digctl_ocram_status13) /* 0x1e0 */ + + uint32_t reserved3[36]; + + uint32_t hw_digctl_scratch0; /* 0x280 */ + uint32_t reserved_hw_digctl_scratch0[3]; + uint32_t hw_digctl_scratch1; /* 0x290 */ + uint32_t reserved_hw_digctl_scratch1[3]; + uint32_t hw_digctl_armcache; /* 0x2a0 */ + uint32_t reserved_hw_digctl_armcache[3]; + mx28_reg_32(hw_digctl_debug_trap) /* 0x2b0 */ + uint32_t hw_digctl_debug_trap_l0_addr_low; /* 0x2c0 */ + uint32_t reserved_hw_digctl_debug_trap_l0_addr_low[3]; + uint32_t hw_digctl_debug_trap_l0_addr_high; /* 0x2d0 */ + uint32_t reserved_hw_digctl_debug_trap_l0_addr_high[3]; + uint32_t hw_digctl_debug_trap_l3_addr_low; /* 0x2e0 */ + uint32_t reserved_hw_digctl_debug_trap_l3_addr_low[3]; + uint32_t hw_digctl_debug_trap_l3_addr_high; /* 0x2f0 */ + uint32_t reserved_hw_digctl_debug_trap_l3_addr_high[3]; + uint32_t hw_digctl_fsl; /* 0x300 */ + uint32_t reserved_hw_digctl_fsl[3]; + uint32_t hw_digctl_chipid; /* 0x310 */ + uint32_t reserved_hw_digctl_chipid[3]; + + uint32_t reserved4[4]; + + uint32_t hw_digctl_ahb_stats_select; /* 0x330 */ + uint32_t reserved_hw_digctl_ahb_stats_select[3]; + + uint32_t reserved5[12]; + + uint32_t hw_digctl_l1_ahb_active_cycles; /* 0x370 */ + uint32_t reserved_hw_digctl_l1_ahb_active_cycles[3]; + uint32_t hw_digctl_l1_ahb_data_stalled; /* 0x380 */ + uint32_t reserved_hw_digctl_l1_ahb_data_stalled[3]; + uint32_t hw_digctl_l1_ahb_data_cycles; /* 0x390 */ + uint32_t reserved_hw_digctl_l1_ahb_data_cycles[3]; + uint32_t hw_digctl_l2_ahb_active_cycles; /* 0x3a0 */ + uint32_t reserved_hw_digctl_l2_ahb_active_cycles[3]; + uint32_t hw_digctl_l2_ahb_data_stalled; /* 0x3b0 */ + uint32_t reserved_hw_digctl_l2_ahb_data_stalled[3]; + uint32_t hw_digctl_l2_ahb_data_cycles; /* 0x3c0 */ + uint32_t reserved_hw_digctl_l2_ahb_data_cycles[3]; + uint32_t hw_digctl_l3_ahb_active_cycles; /* 0x3d0 */ + uint32_t reserved_hw_digctl_l3_ahb_active_cycles[3]; + uint32_t hw_digctl_l3_ahb_data_stalled; /* 0x3e0 */ + uint32_t reserved_hw_digctl_l3_ahb_data_stalled[3]; + uint32_t hw_digctl_l3_ahb_data_cycles; /* 0x3f0 */ + uint32_t reserved_hw_digctl_l3_ahb_data_cycles[3]; + + uint32_t reserved6[64]; + + uint32_t hw_digctl_mpte0_loc; /* 0x500 */ + uint32_t reserved_hw_digctl_mpte0_loc[3]; + uint32_t hw_digctl_mpte1_loc; /* 0x510 */ + uint32_t reserved_hw_digctl_mpte1_loc[3]; + uint32_t hw_digctl_mpte2_loc; /* 0x520 */ + uint32_t reserved_hw_digctl_mpte2_loc[3]; + uint32_t hw_digctl_mpte3_loc; /* 0x530 */ + uint32_t reserved_hw_digctl_mpte3_loc[3]; + uint32_t hw_digctl_mpte4_loc; /* 0x540 */ + uint32_t reserved_hw_digctl_mpte4_loc[3]; + uint32_t hw_digctl_mpte5_loc; /* 0x550 */ + uint32_t reserved_hw_digctl_mpte5_loc[3]; + uint32_t hw_digctl_mpte6_loc; /* 0x560 */ + uint32_t reserved_hw_digctl_mpte6_loc[3]; + uint32_t hw_digctl_mpte7_loc; /* 0x570 */ + uint32_t reserved_hw_digctl_mpte7_loc[3]; + uint32_t hw_digctl_mpte8_loc; /* 0x580 */ + uint32_t reserved_hw_digctl_mpte8_loc[3]; + uint32_t hw_digctl_mpte9_loc; /* 0x590 */ + uint32_t reserved_hw_digctl_mpte9_loc[3]; + uint32_t hw_digctl_mpte10_loc; /* 0x5a0 */ + uint32_t reserved_hw_digctl_mpte10_loc[3]; + uint32_t hw_digctl_mpte11_loc; /* 0x5b0 */ + uint32_t reserved_hw_digctl_mpte11_loc[3]; + uint32_t hw_digctl_mpte12_loc; /* 0x5c0 */ + uint32_t reserved_hw_digctl_mpte12_loc[3]; + uint32_t hw_digctl_mpte13_loc; /* 0x5d0 */ + uint32_t reserved_hw_digctl_mpte13_loc[3]; + uint32_t hw_digctl_mpte14_loc; /* 0x5e0 */ + uint32_t reserved_hw_digctl_mpte14_loc[3]; + uint32_t hw_digctl_mpte15_loc; /* 0x5f0 */ + uint32_t reserved_hw_digctl_mpte15_loc[3]; +}; +#endif + +#endif /* __MX28_REGS_DIGCTL_H__ */
On 2/6/12, robert@delien.nl robert@delien.nl wrote:
From: Robert Delien robert@delien.nl
Put a commit message and a Signed-off-by line.
arch/arm/cpu/arm926ejs/mx28/mx28.c | 8 +- arch/arm/include/asm/arch-mx28/imx-regs.h | 1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++++++++++++++++++++++++++ 3 files changed, 160 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 0e69193..9bfd83b 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -261,14 +261,14 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif
-#define HW_DIGCTRL_SCRATCH0 0x8001c280 -#define HW_DIGCTRL_SCRATCH1 0x8001c290
Please remove HW_DIGCTRL_SCRATCHx from spl_mem_init.c as well.
Thanks,
Fabio Estevam
From: Robert Delien robert@delien.nl
arch/arm/cpu/arm926ejs/mx28/mx28.c | 8 +- arch/arm/include/asm/arch-mx28/imx-regs.h | 1 + arch/arm/include/asm/arch-mx28/regs-digctl.h | 155 ++++++++++++++++++++++++++ 3 files changed, 160 insertions(+), 4 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/regs-digctl.h
diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 0e69193..9bfd83b 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -261,14 +261,14 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif
-#define HW_DIGCTRL_SCRATCH0 0x8001c280 -#define HW_DIGCTRL_SCRATCH1 0x8001c290 int mx28_dram_init(void) {
- struct mx28_digctl_regs *digctl_regs =
(struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
- sz[0] = readl(HW_DIGCTRL_SCRATCH0);
- sz[1] = readl(HW_DIGCTRL_SCRATCH1);
sz[0] = readl(&digctl_regs->hw_digctl_scratch0);
sz[1] = readl(&digctl_regs->hw_digctl_scratch1);
if (sz[0] != sz[1]) { printf("MX28:\n"
diff --git a/arch/arm/include/asm/arch-mx28/imx-regs.h b/arch/arm/include/asm/arch-mx28/imx-regs.h index 9561b5e..f9e6c53 100644 --- a/arch/arm/include/asm/arch-mx28/imx-regs.h +++ b/arch/arm/include/asm/arch-mx28/imx-regs.h @@ -27,6 +27,7 @@ #include <asm/arch/regs-base.h> #include <asm/arch/regs-bch.h> #include <asm/arch/regs-clkctrl.h> +#include <asm/arch/regs-digctl.h> #include <asm/arch/regs-gpmi.h> #include <asm/arch/regs-i2c.h> #include <asm/arch/regs-ocotp.h> diff --git a/arch/arm/include/asm/arch-mx28/regs-digctl.h b/arch/arm/include/asm/arch-mx28/regs-digctl.h new file mode 100644 index 0000000..9a63594 --- /dev/null +++ b/arch/arm/include/asm/arch-mx28/regs-digctl.h @@ -0,0 +1,155 @@ +/*
- Freescale i.MX28 DIGCTL Register Definitions
- Copyright (C) 2012 Robert Delien robert@delien.nl
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
USA + *
- */
+#ifndef __MX28_REGS_DIGCTL_H__ +#define __MX28_REGS_DIGCTL_H__
+#include <asm/arch/regs-common.h>
+#ifndef __ASSEMBLY__ +struct mx28_digctl_regs {
- mx28_reg_32(hw_digctl_ctrl) /* 0x000 */
- mx28_reg_32(hw_digctl_status) /* 0x010 */
- mx28_reg_32(hw_digctl_hclkcount) /* 0x020 */
- mx28_reg_32(hw_digctl_ramctrl) /* 0x030 */
- mx28_reg_32(hw_digctl_emi_status) /* 0x040 */
- mx28_reg_32(hw_digctl_read_margin) /* 0x050 */
- uint32_t hw_digctl_writeonce; /* 0x060 */
- uint32_t reserved_writeonce[3];
Just mark all this crap as "reserved" and be done with it.
- mx28_reg_32(hw_digctl_bist_ctl) /* 0x070 */
- mx28_reg_32(hw_digctl_bist_status) /* 0x080 */
- uint32_t hw_digctl_entropy; /* 0x090 */
- uint32_t reserved_entropy[3];
- uint32_t hw_digctl_entropy_latched; /* 0x0a0 */
- uint32_t reserved_entropy_latched[3];
- uint32_t reserved1[4];
- mx28_reg_32(hw_digctl_microseconds) /* 0x0c0 */
- uint32_t hw_digctl_dbgrd; /* 0x0d0 */
- uint32_t reserved_hw_digctl_dbgrd[3];
- uint32_t hw_digctl_dbg; /* 0x0e0 */
- uint32_t reserved_hw_digctl_dbg[3];
- uint32_t reserved2[4];
Just like this :)
- mx28_reg_32(hw_digctl_usb_loopback) /* 0x100 */
- mx28_reg_32(hw_digctl_ocram_status0) /* 0x110 */
- mx28_reg_32(hw_digctl_ocram_status1) /* 0x120 */
- mx28_reg_32(hw_digctl_ocram_status2) /* 0x130 */
- mx28_reg_32(hw_digctl_ocram_status3) /* 0x140 */
- mx28_reg_32(hw_digctl_ocram_status4) /* 0x150 */
- mx28_reg_32(hw_digctl_ocram_status5) /* 0x160 */
- mx28_reg_32(hw_digctl_ocram_status6) /* 0x170 */
- mx28_reg_32(hw_digctl_ocram_status7) /* 0x180 */
- mx28_reg_32(hw_digctl_ocram_status8) /* 0x190 */
- mx28_reg_32(hw_digctl_ocram_status9) /* 0x1a0 */
- mx28_reg_32(hw_digctl_ocram_status10) /* 0x1b0 */
- mx28_reg_32(hw_digctl_ocram_status11) /* 0x1c0 */
- mx28_reg_32(hw_digctl_ocram_status12) /* 0x1d0 */
- mx28_reg_32(hw_digctl_ocram_status13) /* 0x1e0 */
- uint32_t reserved3[36];
- uint32_t hw_digctl_scratch0; /* 0x280 */
- uint32_t reserved_hw_digctl_scratch0[3];
- uint32_t hw_digctl_scratch1; /* 0x290 */
- uint32_t reserved_hw_digctl_scratch1[3];
- uint32_t hw_digctl_armcache; /* 0x2a0 */
- uint32_t reserved_hw_digctl_armcache[3];
- mx28_reg_32(hw_digctl_debug_trap) /* 0x2b0 */
- uint32_t hw_digctl_debug_trap_l0_addr_low; /* 0x2c0 */
- uint32_t reserved_hw_digctl_debug_trap_l0_addr_low[3];
- uint32_t hw_digctl_debug_trap_l0_addr_high; /* 0x2d0 */
- uint32_t reserved_hw_digctl_debug_trap_l0_addr_high[3];
- uint32_t hw_digctl_debug_trap_l3_addr_low; /* 0x2e0 */
- uint32_t reserved_hw_digctl_debug_trap_l3_addr_low[3];
- uint32_t hw_digctl_debug_trap_l3_addr_high; /* 0x2f0 */
- uint32_t reserved_hw_digctl_debug_trap_l3_addr_high[3];
- uint32_t hw_digctl_fsl; /* 0x300 */
- uint32_t reserved_hw_digctl_fsl[3];
- uint32_t hw_digctl_chipid; /* 0x310 */
- uint32_t reserved_hw_digctl_chipid[3];
- uint32_t reserved4[4];
- uint32_t hw_digctl_ahb_stats_select; /* 0x330 */
- uint32_t reserved_hw_digctl_ahb_stats_select[3];
- uint32_t reserved5[12];
- uint32_t hw_digctl_l1_ahb_active_cycles; /* 0x370 */
- uint32_t reserved_hw_digctl_l1_ahb_active_cycles[3];
- uint32_t hw_digctl_l1_ahb_data_stalled; /* 0x380 */
- uint32_t reserved_hw_digctl_l1_ahb_data_stalled[3];
- uint32_t hw_digctl_l1_ahb_data_cycles; /* 0x390 */
- uint32_t reserved_hw_digctl_l1_ahb_data_cycles[3];
- uint32_t hw_digctl_l2_ahb_active_cycles; /* 0x3a0 */
- uint32_t reserved_hw_digctl_l2_ahb_active_cycles[3];
- uint32_t hw_digctl_l2_ahb_data_stalled; /* 0x3b0 */
- uint32_t reserved_hw_digctl_l2_ahb_data_stalled[3];
- uint32_t hw_digctl_l2_ahb_data_cycles; /* 0x3c0 */
- uint32_t reserved_hw_digctl_l2_ahb_data_cycles[3];
- uint32_t hw_digctl_l3_ahb_active_cycles; /* 0x3d0 */
- uint32_t reserved_hw_digctl_l3_ahb_active_cycles[3];
- uint32_t hw_digctl_l3_ahb_data_stalled; /* 0x3e0 */
- uint32_t reserved_hw_digctl_l3_ahb_data_stalled[3];
- uint32_t hw_digctl_l3_ahb_data_cycles; /* 0x3f0 */
- uint32_t reserved_hw_digctl_l3_ahb_data_cycles[3];
- uint32_t reserved6[64];
- uint32_t hw_digctl_mpte0_loc; /* 0x500 */
- uint32_t reserved_hw_digctl_mpte0_loc[3];
- uint32_t hw_digctl_mpte1_loc; /* 0x510 */
- uint32_t reserved_hw_digctl_mpte1_loc[3];
- uint32_t hw_digctl_mpte2_loc; /* 0x520 */
- uint32_t reserved_hw_digctl_mpte2_loc[3];
- uint32_t hw_digctl_mpte3_loc; /* 0x530 */
- uint32_t reserved_hw_digctl_mpte3_loc[3];
- uint32_t hw_digctl_mpte4_loc; /* 0x540 */
- uint32_t reserved_hw_digctl_mpte4_loc[3];
- uint32_t hw_digctl_mpte5_loc; /* 0x550 */
- uint32_t reserved_hw_digctl_mpte5_loc[3];
- uint32_t hw_digctl_mpte6_loc; /* 0x560 */
- uint32_t reserved_hw_digctl_mpte6_loc[3];
- uint32_t hw_digctl_mpte7_loc; /* 0x570 */
- uint32_t reserved_hw_digctl_mpte7_loc[3];
- uint32_t hw_digctl_mpte8_loc; /* 0x580 */
- uint32_t reserved_hw_digctl_mpte8_loc[3];
- uint32_t hw_digctl_mpte9_loc; /* 0x590 */
- uint32_t reserved_hw_digctl_mpte9_loc[3];
- uint32_t hw_digctl_mpte10_loc; /* 0x5a0 */
- uint32_t reserved_hw_digctl_mpte10_loc[3];
- uint32_t hw_digctl_mpte11_loc; /* 0x5b0 */
- uint32_t reserved_hw_digctl_mpte11_loc[3];
- uint32_t hw_digctl_mpte12_loc; /* 0x5c0 */
- uint32_t reserved_hw_digctl_mpte12_loc[3];
- uint32_t hw_digctl_mpte13_loc; /* 0x5d0 */
- uint32_t reserved_hw_digctl_mpte13_loc[3];
- uint32_t hw_digctl_mpte14_loc; /* 0x5e0 */
- uint32_t reserved_hw_digctl_mpte14_loc[3];
- uint32_t hw_digctl_mpte15_loc; /* 0x5f0 */
- uint32_t reserved_hw_digctl_mpte15_loc[3];
+}; +#endif
+#endif /* __MX28_REGS_DIGCTL_H__ */
Yep, looks fine.
btw you don't have to send a cover letter for a single patch. Though this series should contain a subsequent patch that'll fix all usage of DIGCTL registers.
Thanks!
M
uint32_t hw_digctl_writeonce; /* 0x060 */uint32_t reserved_writeonce[3];Just mark all this crap as "reserved" and be done with it.
If that's good enought, that will save me some work next time.
uint32_t hw_digctl_dbg; /* 0x0e0 */uint32_t reserved_hw_digctl_dbg[3];uint32_t reserved2[4];Just like this :)
I copied it from how it's done in regs-power.h: "Reserverd" for whole areas not being used, "reserved_name[3]" where one might expect to find a set, clear and toggle register.
Yep, looks fine.
btw you don't have to send a cover letter for a single patch.
The cover letter was an accident. I'm still in the process of learning how git send-email works. There's a lot of clever things in there, working for you if you know how it works, but against you if you don't.
Though this series should contain a subsequent patch that'll fix all usage of DIGCTL registers.
Nobody was using DICTL registers yet. I could have sent the magic address repair (where macros are replaced with registers defined here) as a separate patch but I didn't expeact that to be necessary.
Is this patch approved?
________________________________________ From: u-boot-bounces@lists.denx.de [u-boot-bounces@lists.denx.de] on behalf of Robert Deliën [robert@delien.nl] Sent: 07 February 2012 10:15 To: Marek Vasut Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH] Elimintated magic numbers for scratch register addresses
uint32_t hw_digctl_writeonce; /* 0x060 */uint32_t reserved_writeonce[3];Just mark all this crap as "reserved" and be done with it.
If that's good enought, that will save me some work next time.
uint32_t hw_digctl_dbg; /* 0x0e0 */uint32_t reserved_hw_digctl_dbg[3];uint32_t reserved2[4];Just like this :)
I copied it from how it's done in regs-power.h: "Reserverd" for whole areas not being used, "reserved_name[3]" where one might expect to find a set, clear and toggle register.
Yep, looks fine.
btw you don't have to send a cover letter for a single patch.
The cover letter was an accident. I'm still in the process of learning how git send-email works. There's a lot of clever things in there, working for you if you know how it works, but against you if you don't.
Though this series should contain a subsequent patch that'll fix all usage of DIGCTL registers.
Nobody was using DICTL registers yet. I could have sent the magic address repair (where macros are replaced with registers defined here) as a separate patch but I didn't expeact that to be necessary. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
participants (4)
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Fabio Estevam -
Marek Vasut -
Robert Deliën -
robert＠delien.nl