[U-Boot] [RFC 0/5] MX31: NAND boot for phyCORE and PDK boards.
Hi all,
The following patches add NAND boot support for the i.MX31. I have cleaned up Maxim Artamonov's latest patch (which was for the phyCORE module) and also added i.MX31 PDK support.
The series applies on top of Wolfgang's main tree as of yesterday.
The original NAND SPL patch has been split into two patches, one that adds the NAND SPL framework for i.MX31 and one that contains only the phyCORE parts.
The last two patches first add i.MX31 PDK support and then NAND boot.
I haven't taken care of all comments that were presented to Maxim's latest patch so there's more work to be done before this can be added to the main U-boot tree. So this is a work in progress presented "as is" since some people on the list are interested in booting the PDK from NAND.
The code for i.MX31 PDK has been tested on real hardware and boots Linux from ethernet. phyCORE has only been compiled.
Regards, Magnus
Magnus Lilja (5): MX31: Add NAND SPL for i.MX31. MX31: Add NAND SPL support for phycore i.MX31 board. Add NAND SPL entries to gitignore. MX31: Add basic support for Freescale i.MX31 PDK board. MX31: Add NAND SPL boot support to i.MX31 PDK board.
.gitignore | 1 + MAKEALL | 3 + Makefile | 19 +++- board/freescale/mx31pdk/Makefile | 53 +++++++ board/freescale/mx31pdk/config.mk | 5 + board/freescale/mx31pdk/lowlevel_init.S | 123 ++++++++++++++++ board/freescale/mx31pdk/mx31pdk.c | 76 ++++++++++ board/freescale/mx31pdk/u-boot-nand.lds | 33 +++++ board/freescale/mx31pdk/u-boot.lds | 59 ++++++++ board/imx31_phycore/config.mk | 10 ++ board/imx31_phycore/lowlevel_init.S | 26 ++++ cpu/arm1136/start.S | 36 ++++-- include/asm-arm/arch-mx31/mx31-regs.h | 98 +++++++++++++ include/configs/imx31_phycore.h | 33 +++++ include/configs/mx31pdk.h | 175 +++++++++++++++++++++++ nand_spl/.gitignore | 7 + nand_spl/board/freescale/mx31pdk/.gitignore | 8 + nand_spl/board/freescale/mx31pdk/Makefile | 66 +++++++++ nand_spl/board/freescale/mx31pdk/config.mk | 5 + nand_spl/board/freescale/mx31pdk/u-boot.lds | 36 +++++ nand_spl/nand_boot_mx31.c | 204 +++++++++++++++++++++++++++ 21 files changed, 1066 insertions(+), 10 deletions(-) create mode 100644 board/freescale/mx31pdk/Makefile create mode 100644 board/freescale/mx31pdk/config.mk create mode 100644 board/freescale/mx31pdk/lowlevel_init.S create mode 100644 board/freescale/mx31pdk/mx31pdk.c create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds create mode 100644 board/freescale/mx31pdk/u-boot.lds create mode 100644 include/configs/mx31pdk.h create mode 100644 nand_spl/.gitignore create mode 100644 nand_spl/board/freescale/mx31pdk/.gitignore create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds create mode 100644 nand_spl/nand_boot_mx31.c
This patch adds the NAND SPL framework needed to boot i.MX31 boards from NAND.
The patch is based on the work by Maxim Artamonov <scn1874 at yandex.ru > (which was signed-off-by him).
--
Changes since V3 (original author's latest post): * Updated to apply on the main U-boot tree as of 2009-04-02 * Split the patch into two parts, one with the NAND SPL framework and one which activates the NAND boot for the phycore board. * Coding style corrections. --- cpu/arm1136/start.S | 36 +++++-- include/asm-arm/arch-mx31/mx31-regs.h | 96 +++++++++++++++ nand_spl/nand_boot_mx31.c | 204 +++++++++++++++++++++++++++++++++ 3 files changed, 327 insertions(+), 9 deletions(-) create mode 100644 nand_spl/nand_boot_mx31.c
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index e622338..e87bf99 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -1,6 +1,9 @@ /* * armboot - Startup Code for OMP2420/ARM1136 CPU-core * + * + * Copyright (c) 2008 Maxim Artamonov, <scn1874 at yandex.ru> + * * Copyright (c) 2004 Texas Instruments r-woodruff2@ti.com * * Copyright (c) 2001 Marius Gröger mag@sysgo.de @@ -32,6 +35,15 @@ #include <version.h> .globl _start _start: b reset +#ifdef CONFIG_NAND_SPL + nop + nop + nop + nop + nop + nop + nop +#else #ifdef CONFIG_ONENAND_IPL ldr pc, _hang ldr pc, _hang @@ -68,6 +80,7 @@ _irq: .word irq _fiq: .word fiq _pad: .word 0x12345678 /* now 16*4=64 */ #endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_NAND_SPL */ .global _end_vect _end_vect:
@@ -156,9 +169,9 @@ relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ cmp r0, r1 /* don't reloc during debug */ -#ifndef CONFIG_ONENAND_IPL +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL) beq stack_setup -#endif /* CONFIG_ONENAND_IPL */ +#endif /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
ldr r2, _armboot_start ldr r3, _bss_start @@ -175,7 +188,7 @@ copy_loop: /* Set up the stack */ stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ -#ifdef CONFIG_ONENAND_IPL +#if defined(CONFIG_ONENAND_IPL) || defined (CONFIG_NAND_SPL) sub sp, r0, #128 /* leave 32 words for abort-stack */ #else sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ @@ -184,14 +197,14 @@ stack_setup: sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif sub sp, r0, #12 /* leave 3 words for abort-stack */ -#endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_ONENAND_IPL || CONFIG_NAND_SPL*/
clear_bss: ldr r0, _bss_start /* find start of bss segment */ ldr r1, _bss_end /* stop here */ mov r2, #0x00000000 /* clear */
-#ifndef CONFIG_ONENAND_IPL +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL) clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 @@ -200,12 +213,15 @@ clbss_l:str r2, [r0] /* clear loop... */
ldr pc, _start_armboot
+#ifdef CONFIG_NAND_SPL +_start_armboot: .word nand_boot +#else #ifdef CONFIG_ONENAND_IPL _start_armboot: .word start_oneboot #else _start_armboot: .word start_armboot -#endif - +#endif /* CONFIG_ONENAND_IPL */ +#endif /* CONFIG_NAND_SPL */
/* ************************************************************************* @@ -244,7 +260,7 @@ cpu_init_crit: mov lr, ip /* restore link */ mov pc, lr /* back to my caller */
-#ifndef CONFIG_ONENAND_IPL +#if !defined(CONFIG_ONENAND_IPL) && !defined(CONFIG_NAND_SPL) /* ************************************************************************* * @@ -357,11 +373,12 @@ cpu_init_crit: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_ONENAND_IPL */ +#endif /* !CONFIG_ONENAND_IPL && !CONFIG_NAND_SPL*/
/* * exception handlers */ +#ifndef CONFIG_NAND_SPL #ifdef CONFIG_ONENAND_IPL .align 5 do_hang: @@ -436,3 +453,4 @@ arm1136_cache_flush: mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache mov pc, lr @ back to caller #endif /* CONFIG_ONENAND_IPL */ +#endif /* !CONFIG_NAND_SPL*/ diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index a8a05c8..45f2ae3 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -194,4 +194,100 @@ #define CS5_BASE 0xB6000000 #define PCMCIA_MEM_BASE 0xC0000000
+/* + * NAND controller + */ +#define NFC_BASE_ADDR 0xB8000000 + +/* + * Addresses for NFC registers + */ +#define NFC_BUF_SIZE (*((volatile u16 *)(NFC_BASE_ADDR + 0xE00))) +#define NFC_BUF_ADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE04))) +#define NFC_FLASH_ADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE06))) +#define NFC_FLASH_CMD (*((volatile u16 *)(NFC_BASE_ADDR + 0xE08))) +#define NFC_CONFIG (*((volatile u16 *)(NFC_BASE_ADDR + 0xE0A))) +#define NFC_ECC_STATUS_RESULT (*((volatile u16 *)(NFC_BASE_ADDR + 0xE0C))) +#define NFC_RSLTMAIN_AREA (*((volatile u16 *)(NFC_BASE_ADDR + 0xE0E))) +#define NFC_RSLTSPARE_AREA (*((volatile u16 *)(NFC_BASE_ADDR + 0xE10))) +#define NFC_WRPROT (*((volatile u16 *)(NFC_BASE_ADDR + 0xE12))) +#define NFC_UNLOCKSTART_BLKADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE14))) +#define NFC_UNLOCKEND_BLKADDR (*((volatile u16 *)(NFC_BASE_ADDR + 0xE16))) +#define NFC_NF_WRPRST (*((volatile u16 *)(NFC_BASE_ADDR + 0xE18))) +#define NFC_CONFIG1 (*((volatile u16 *)(NFC_BASE_ADDR + 0xE1A))) +#define NFC_CONFIG2 (*((volatile u16 *)(NFC_BASE_ADDR + 0xE1C))) + +/* + * Addresses for NFC RAM BUFFER Main area 0 + */ +#define MAIN_AREA0 (volatile u16 *)(NFC_BASE_ADDR + 0x000) +#define MAIN_AREA1 (volatile u16 *)(NFC_BASE_ADDR + 0x200) +#define MAIN_AREA2 (volatile u16 *)(NFC_BASE_ADDR + 0x400) +#define MAIN_AREA3 (volatile u16 *)(NFC_BASE_ADDR + 0x600) + +/* + * Addresses for NFC SPARE BUFFER Spare area 0 + */ +#define SPARE_AREA0 (volatile u16 *)(NFC_BASE_ADDR + 0x800) +#define SPARE_AREA1 (volatile u16 *)(NFC_BASE_ADDR + 0x810) +#define SPARE_AREA2 (volatile u16 *)(NFC_BASE_ADDR + 0x820) +#define SPARE_AREA3 (volatile u16 *)(NFC_BASE_ADDR + 0x830) + +/* + * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command + * operation + */ +#define NFC_CMD 0x1 + +/* + * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address + * operation + */ +#define NFC_ADDR 0x2 + +/* + * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input + * operation + */ +#define NFC_INPUT 0x4 + +/* + * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data + * Output operation + */ +#define NFC_OUTPUT 0x8 + +/* + * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID + * operation + */ +#define NFC_ID 0x10 + +/* + * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read + * Status operation + */ +#define NFC_STATUS 0x20 + +/* + * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status + * operation + */ +#define NFC_INT 0x8000 + +#define NFC_SP_EN (1 << 2) +#define NFC_ECC_EN (1 << 3) +#define NFC_INT_MSK (1 << 4) +#define NFC_BIG (1 << 5) +#define NFC_RST (1 << 6) +#define NFC_CE (1 << 7) +#define NFC_ONE_CYCLE (1 << 8) + +/* + * NFMS bit in RCSR register for pagesize of nandflash + */ +#define NFMS (*((volatile u32 *)CCM_RCSR)) +#define NFMS_BIT 30 + #endif /* __ASM_ARCH_MX31_REGS_H */ + diff --git a/nand_spl/nand_boot_mx31.c b/nand_spl/nand_boot_mx31.c new file mode 100644 index 0000000..a772756 --- /dev/null +++ b/nand_spl/nand_boot_mx31.c @@ -0,0 +1,204 @@ +/* + * (C) Copyright 2008 + * Maxim Artamonov, <scn1874 at yandex.ru> + * + * (C) Copyright 2006-2008 + * Stefan Roese, DENX Software Engineering, sr at denx.de. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <nand.h> +#include <asm-arm/arch/mx31-regs.h> + +static void mx31_wait_ready(void) +{ + while (1) { + if (NFC_CONFIG2 & NFC_INT) { + /* Reset interrupt flag */ + NFC_CONFIG2 = NFC_CONFIG2 & (~NFC_INT); + break; + } + } +} + +static void mx31_nand_init(void) +{ + /* unlocking RAM Buff */ + NFC_CONFIG = 0x2; + + /* hardware ECC checking and correct */ + NFC_CONFIG1 = NFC_ECC_EN; +} + +static void mx31_nand_command(unsigned short command) +{ + NFC_FLASH_CMD = command; + NFC_CONFIG2 = NFC_CMD; + mx31_wait_ready(); +} + +static void mx31_nand_page_address(unsigned int page_address) +{ + unsigned int page_count; + + NFC_FLASH_ADDR = 0x00; + NFC_CONFIG2 = NFC_ADDR; + mx31_wait_ready(); + + /* code only for 2kb flash */ + if (CFG_NAND_PAGE_SIZE == 0x800) { + NFC_FLASH_ADDR = 0x00; + NFC_CONFIG2 = NFC_ADDR; + mx31_wait_ready(); + } + + page_count = CFG_NAND_CHIP_SIZE / CFG_NAND_PAGE_SIZE; + + if (page_address <= page_count){ + page_count--; /* transform 0x01000000 to 0x00ffffff */ + do { + NFC_FLASH_ADDR = (unsigned short)(page_address & 0xff); + NFC_CONFIG2 = NFC_ADDR; + mx31_wait_ready(); + page_address = page_address >> 8; + page_count = page_count >> 8; + } while (page_count); + } +} + +static void mx31_nand_data_output(void) +{ + int i; + + /* + * The NAND controller requires four output commands for + * large page devices. + */ + for (i = 0; i < (CFG_NAND_PAGE_SIZE / 512); i++) { + NFC_CONFIG1 = NFC_ECC_EN; + NFC_BUF_ADDR = i; /* read in i:th buffer */ + NFC_CONFIG2 = NFC_OUTPUT; + mx31_wait_ready(); + } +} + +static int mx31_nand_check_ecc(void) +{ + unsigned short ecc_status_register; + + ecc_status_register = NFC_ECC_STATUS_RESULT; + + if (ecc_status_register != 0) + return 1; /* error */ + return 0; +} + +static int mx31_read_page(unsigned int page_address, unsigned char *buf) +{ + int i; + volatile u32 *p1; + volatile u32 *p2; + u32 a; + + mx31_nand_init(); + NFC_BUF_ADDR = 0; /* read in first 0 buffer */ + mx31_nand_command(NAND_CMD_READ0); + mx31_nand_page_address(page_address); + + if (CFG_NAND_CHIP_SIZE >= 0x08000000) + mx31_nand_command(NAND_CMD_READSTART); + + mx31_nand_data_output(); /* fill the main buffer 0 */ + + if (mx31_nand_check_ecc()) { + while (1) { + /* hang-loop in case of ecc-error */ + } + } + + p1 = (u32 *)MAIN_AREA0; + p2 = (u32 *)buf; + + /* main copy loop from NAND-buffer to SDRAM memory */ + for (i = 0; i < (CFG_NAND_PAGE_SIZE / 4); i++) { + *p2 = *p1; + p1++; + p2++; + } + + p1 = (u32 *)SPARE_AREA0; + + /* it is hardware specific code for 8-bit 512 B NAND-flash spare area */ + p1++; + a = *p1; + a = (a & 0x0000ff00) >> 8; + + if (a != 0xff) /* bad block marker verify */ + return 1; /* potential bad block */ + + return 0; +} + +static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) +{ + int i, bb; + + mx31_nand_init(); + + /* convert from to page number */ + from = from / CFG_NAND_PAGE_SIZE; + + i = 0; + + while (i < (size/CFG_NAND_PAGE_SIZE)) { + if ((from * CFG_NAND_PAGE_SIZE) >= CFG_NAND_CHIP_SIZE) + return 2; /* memory segment violation */ + + bb = mx31_read_page(from, buf); + + /* checking first page of each block */ + /* if this page has bb marker, then skip whole block */ + if ((!(from % CFG_NAND_PAGES_PER_BLOCK)) && bb) { + from = from + CFG_NAND_PAGES_PER_BLOCK; + } + else { + i++; + from++; + buf = buf + CFG_NAND_PAGE_SIZE; + } + } + + return 0; +} + +/* + * The main entry for NAND booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from NAND into SDRAM and starts it from there. + */ +void nand_boot(void) +{ + __attribute__((noreturn)) void (*uboot)(void); + + /* CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must */ + /* be aligned to full pages */ + nand_load(CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE, + (uchar *)CFG_NAND_U_BOOT_DST); + + uboot = (void *)CFG_NAND_U_BOOT_START; + uboot(); +}
This patch is the phycore part of Maxim Artamonov's NAND SPL on phycore patch.
The note below is from the original patch.
Note: By default, Phytec phyCORE-i.MX31 board (pcm-037 and pcm-970) is not suitable for nand-bootloading, because of SW5 switchers block haven't appropriate modes (8-bit, 2k page or 16-bit, 512 page) for BOOTPINS[4:0] and nand-flash (8-bit mode, 512B page) contemporary. There is require to make RESOLDER for really nand-booting either BOOTPIN state or JN1/2 and RN41/42.
The original patch was signed-off-by Maxim Artamonov <scn1874 at yandex.ru >. --- MAKEALL | 1 + Makefile | 9 ++++++++- board/imx31_phycore/config.mk | 10 ++++++++++ board/imx31_phycore/lowlevel_init.S | 26 ++++++++++++++++++++++++++ include/configs/imx31_phycore.h | 33 +++++++++++++++++++++++++++++++++ 5 files changed, 78 insertions(+), 1 deletions(-)
diff --git a/MAKEALL b/MAKEALL index 854f303..94ad389 100755 --- a/MAKEALL +++ b/MAKEALL @@ -547,6 +547,7 @@ LIST_ARM11=" \ imx31_litekit \ imx31_phycore \ imx31_phycore_eet \ + imx31_phycore_nand \ mx31ads \ qong \ smdk6400 \ diff --git a/Makefile b/Makefile index f857641..f0981ce 100644 --- a/Makefile +++ b/Makefile @@ -367,7 +367,7 @@ $(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C nand_spl/board/$(BOARDDIR) all
$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk - cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin + cat $(obj)nand_spl/u-boot-spl-aligned.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all @@ -3071,6 +3071,13 @@ imx31_phycore_config : unconfig fi @$(MKCONFIG) -a imx31_phycore arm arm1136 imx31_phycore NULL mx31
+imx31_phycore_nand_config : unconfig + @mkdir -p $(obj)include $(obj)board/imx31_phycore + @mkdir -p $(obj)nand_spl/board/imx31_phycore + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h + @$(MKCONFIG) -n $@ -a imx31_phycore arm arm1136 imx31_phycore NULL mx31 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + mx31ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
diff --git a/board/imx31_phycore/config.mk b/board/imx31_phycore/config.mk index d34dc02..412defc 100644 --- a/board/imx31_phycore/config.mk +++ b/board/imx31_phycore/config.mk @@ -1 +1,11 @@ +# +# (C) Copyright 2008 +# was changed by Maxim Artamonov, <scn1874 at yandex.ru> +# + +ifndef CONFIG_NAND_SPL TEXT_BASE = 0x87f00000 +else +TEXT_BASE = 0x87ec0000 +endif + diff --git a/board/imx31_phycore/lowlevel_init.S b/board/imx31_phycore/lowlevel_init.S index c5d6eb0..0733240 100644 --- a/board/imx31_phycore/lowlevel_init.S +++ b/board/imx31_phycore/lowlevel_init.S @@ -1,5 +1,8 @@ /* * + * (C) Copyright 2008 + * Maxim Artamonov, <scn1874 at yandex.ru> + * * (c) 2007 Pengutronix, Sascha Hauer s.hauer@pengutronix.de * * See file CREDITS for list of people who contributed to this @@ -43,6 +46,20 @@ bcs 1b .endm
+#ifdef CONFIG_NAND_SPL +/* somewhat macro to reduce bin size for CONFIG_NAND_SPL*/ +.macro FILLREGS begreg, val, count, step + ldr r2, =\begreg + ldr r3, =\val + ldr r4, =\count +2: + str r3, [r2] + add r2, r2, #\step + subs r4, r4, #1 + bcs 2b +.endm +#endif + .globl lowlevel_init lowlevel_init:
@@ -60,10 +77,18 @@ lowlevel_init:
REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1)
+#ifdef CONFIG_NAND_SPL + FILLREGS 0x43FAC26C, 0, 0x3, 0x4 +#else REG 0x43FAC26C, 0 /* SDCLK */ REG 0x43FAC270, 0 /* CAS */ REG 0x43FAC274, 0 /* RAS */ +#endif /* CONFIG_NAND_SPL */ REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */ + +#ifdef CONFIG_NAND_SPL + FILLREGS 0x43FAC284, 0, 0x17, 0x4 +#else REG 0x43FAC284, 0 /* DQM3 */ REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */ REG 0x43FAC28C, 0 @@ -87,6 +112,7 @@ lowlevel_init: REG 0x43FAC2D4, 0 REG 0x43FAC2D8, 0 REG 0x43FAC2DC, 0 +#endif /* CONFIG_NAND_SPL */ REG 0xB8001010, 0x00000004 REG 0xB8001004, 0x006ac73a REG 0xB8001000, 0x92100000 diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index cbc0b92..dbe415b 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -1,4 +1,7 @@ /* + * (C) Copyright 2008 + * Maxim Artamonov, <scn1874 at yandex.ru> + * * (C) Copyright 2004 * Texas Instruments. * Richard Woodruff r-woodruff2@ti.com @@ -34,6 +37,11 @@ #define CONFIG_MX31_HCLK_FREQ 26000000 #define CONFIG_MX31_CLK32 32000
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT +#endif + #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
@@ -172,6 +180,31 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
+/*----------------------------------------------------------------------- + * NAND flash + */ + +#define NAND_MAX_CHIPS 1 +#define CFG_MAX_NAND_DEVICE 1 +#define CFG_NAND_BASE 0x40000000 + +/* + * Because of small buffer size of NFC in iMX31, SPL has to fit into 2kB. + */ + +/*CFG_NAND_U_BOOT_OFFS and CFG_NAND_U_BOOT_SIZE must be align to full pages*/ +#define CFG_NAND_U_BOOT_OFFS 0x800 +#define CFG_NAND_U_BOOT_SIZE 0x30000 +#define CFG_NAND_U_BOOT_DST 0x87f00000 /* Load big U-Boot to this addr */ +#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST /* Start big U-Boot from */ +#define CFG_NAND_SPL_DST CFG_NAND_U_BOOT_DST-0x40000 /* Relocate NAND_SPL to this adress*/ + +#define CFG_NAND_PAGE_SIZE 0x200 +#define CFG_NAND_BLOCK_SIZE 0x4000 +#define CFG_NAND_PAGES_PER_BLOCK 0x20 +/*for NAND_SPL*/ +#define CFG_NAND_CHIP_SIZE 0x4000000 + /* * JFFS2 partitions */
--- .gitignore | 1 + nand_spl/.gitignore | 7 +++++++ 2 files changed, 8 insertions(+), 0 deletions(-) create mode 100644 nand_spl/.gitignore
diff --git a/.gitignore b/.gitignore index e13fc96..6c7406d 100644 --- a/.gitignore +++ b/.gitignore @@ -29,6 +29,7 @@ /u-boot.ldr.srec /u-boot-onenand.bin /u-boot-flexonenand.bin +/u-boot-nand.bin
# # Generated files diff --git a/nand_spl/.gitignore b/nand_spl/.gitignore new file mode 100644 index 0000000..af5f02b --- /dev/null +++ b/nand_spl/.gitignore @@ -0,0 +1,7 @@ +# NAND-SPL files +/u-boot-spl +/u-boot-spl-aligned.bin +/u-boot-spl.bin +/u-boot-spl.map +/board/imx31_phycore/nand_boot_mx31.c +/board/imx31_phycore/*.S
Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).
This patch assumes that some other program performs the actual NAND boot. --- MAKEALL | 1 + Makefile | 3 + board/freescale/mx31pdk/Makefile | 53 ++++++++++ board/freescale/mx31pdk/config.mk | 1 + board/freescale/mx31pdk/lowlevel_init.S | 30 ++++++ board/freescale/mx31pdk/mx31pdk.c | 76 ++++++++++++++ board/freescale/mx31pdk/u-boot.lds | 59 +++++++++++ include/asm-arm/arch-mx31/mx31-regs.h | 2 + include/configs/mx31pdk.h | 162 +++++++++++++++++++++++++++++++ 9 files changed, 387 insertions(+), 0 deletions(-) create mode 100644 board/freescale/mx31pdk/Makefile create mode 100644 board/freescale/mx31pdk/config.mk create mode 100644 board/freescale/mx31pdk/lowlevel_init.S create mode 100644 board/freescale/mx31pdk/mx31pdk.c create mode 100644 board/freescale/mx31pdk/u-boot.lds create mode 100644 include/configs/mx31pdk.h
diff --git a/MAKEALL b/MAKEALL index 94ad389..b581608 100755 --- a/MAKEALL +++ b/MAKEALL @@ -549,6 +549,7 @@ LIST_ARM11=" \ imx31_phycore_eet \ imx31_phycore_nand \ mx31ads \ + mx31pdk \ qong \ smdk6400 \ " diff --git a/Makefile b/Makefile index f0981ce..40f3465 100644 --- a/Makefile +++ b/Makefile @@ -3081,6 +3081,9 @@ imx31_phycore_nand_config : unconfig mx31ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
+mx31pdk_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31 + omap2420h4_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile new file mode 100644 index 0000000..b64cec8 --- /dev/null +++ b/board/freescale/mx31pdk/Makefile @@ -0,0 +1,53 @@ +# +# (C) Copyright 2008 Magnus Lilja lilja.magnus@gmail.com +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := mx31pdk.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk new file mode 100644 index 0000000..d34dc02 --- /dev/null +++ b/board/freescale/mx31pdk/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x87f00000 diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S new file mode 100644 index 0000000..ec5eedb --- /dev/null +++ b/board/freescale/mx31pdk/lowlevel_init.S @@ -0,0 +1,30 @@ +/* + * (C) Copyright 2008 Magnus Lilja lilja.magnus@gmail.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This is just to keep the linker happy. + */ + +.globl lowlevel_init + +lowlevel_init: + mov pc, lr diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c new file mode 100644 index 0000000..9eed979 --- /dev/null +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -0,0 +1,76 @@ +/* + * + * (C) Copyright 2008 Magnus Lilja lilja.magnus@gmail.com + * + * (c) 2007 Pengutronix, Sascha Hauer s.hauer@pengutronix.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include <common.h> +#include <asm/arch/mx31.h> +#include <asm/arch/mx31-regs.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +int board_init(void) +{ + /* CS5: CPLD incl. network controller */ + __REG(CSCR_U(5)) = 0x0000d843; + __REG(CSCR_L(5)) = 0x22252521; + __REG(CSCR_A(5)) = 0x22220a00; + + /* setup pins for UART1 */ + mx31_gpio_mux(MUX_RXD1__UART1_RXD_MUX); + mx31_gpio_mux(MUX_TXD1__UART1_TXD_MUX); + mx31_gpio_mux(MUX_RTS1__UART1_RTS_B); + mx31_gpio_mux(MUX_CTS1__UART1_CTS_B); + + /* SPI2 */ + mx31_gpio_mux(MUX_CSPI2_SS2__CSPI2_SS2_B); + mx31_gpio_mux(MUX_CSPI2_SCLK__CSPI2_CLK); + mx31_gpio_mux(MUX_CSPI2_SPI_RDY__CSPI2_DATAREADY_B); + mx31_gpio_mux(MUX_CSPI2_MOSI__CSPI2_MOSI); + mx31_gpio_mux(MUX_CSPI2_MISO__CSPI2_MISO); + mx31_gpio_mux(MUX_CSPI2_SS0__CSPI2_SS0_B); + mx31_gpio_mux(MUX_CSPI2_SS1__CSPI2_SS1_B); + + /* start SPI2 clock */ + __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4); + + gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */ + gd->bd->bi_boot_params = 0x80000100; /* adress of boot parameters */ + + return 0; +} + +int checkboard(void) +{ + printf("Board: i.MX31 MAX PDK (3DS)\n"); + return 0; +} diff --git a/board/freescale/mx31pdk/u-boot.lds b/board/freescale/mx31pdk/u-boot.lds new file mode 100644 index 0000000..e96509a --- /dev/null +++ b/board/freescale/mx31pdk/u-boot.lds @@ -0,0 +1,59 @@ +/* + * January 2004 - Changed to support H4 device + * Copyright (c) 2004 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, gj@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm1136/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/include/asm-arm/arch-mx31/mx31-regs.h b/include/asm-arm/arch-mx31/mx31-regs.h index 45f2ae3..34da648 100644 --- a/include/asm-arm/arch-mx31/mx31-regs.h +++ b/include/asm-arm/arch-mx31/mx31-regs.h @@ -84,6 +84,8 @@ #define IPU_CONF_IC_EN (1<<1) #define IPU_CONF_SCI_EN (1<<0)
+#define ARM_PPMRR 0x40000015 + #define WDOG_BASE 0x53FDC000
/* diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h new file mode 100644 index 0000000..deda70d --- /dev/null +++ b/include/configs/mx31pdk.h @@ -0,0 +1,162 @@ +/* + * (C) Copyright 2008 Magnus Lilja lilja.magnus@gmail.com + * + * (C) Copyright 2004 + * Texas Instruments. + * Richard Woodruff r-woodruff2@ti.com + * Kshitij Gupta kshitij@ti.com + * + * Configuration settings for the Freescale i.MX31 PDK board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/mx31-regs.h> + +/* High Level Configuration Options */ +#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ +#define CONFIG_MX31 1 /* in a mx31 */ +#define CONFIG_MX31_HCLK_FREQ 26000000 +#define CONFIG_MX31_CLK32 32768 + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other + * program to initialize the SDRAM. + */ +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +/* Bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Hardware drivers + */ + +#define CONFIG_MX31_UART 1 +#define CONFIG_SYS_MX31_UART1 1 + +#define CONFIG_HARD_SPI 1 +#define CONFIG_MXC_SPI 1 +#define CONFIG_DEFAULT_SPI_BUS 1 +#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) + +#define CONFIG_RTC_MC13783 1 + +/* MC13783 connected to CSPI2 and SS2 */ +#define CONFIG_MC13783_SPI_BUS 1 +#define CONFIG_MC13783_SPI_CS 2 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/*********************************************************** + * Command definition + ***********************************************************/ + +#include <config_cmd_default.h> + +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SPI +#define CONFIG_CMD_DATE + +/* Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require + * that CFG_NO_FLASH is undefined). + */ +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ + "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ + "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ + "bootcmd=run bootcmd_net\0" \ + "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \ + "tftpboot 0x81000000 uImage-mx31; bootm\0" + +#define CONFIG_DRIVER_SMC911X 1 +#define CONFIG_DRIVER_SMC911X_BASE CS5_BASE +#define CONFIG_DRIVER_SMC911X_32_BIT 1 + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "uboot> " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT)+16) +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x10000 + +#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ + +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMDLINE_EDITING 1 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE +#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +/* No NOR flash present */ +#define CONFIG_SYS_NO_FLASH 1 + +#define CONFIG_ENV_IS_NOWHERE 1 + +#define CONFIG_ENV_SIZE (128 * 1024) + +#endif /* __CONFIG_H */ +
--- MAKEALL | 3 +- Makefile | 7 ++ board/freescale/mx31pdk/config.mk | 4 + board/freescale/mx31pdk/lowlevel_init.S | 93 +++++++++++++++++++++++++++ board/freescale/mx31pdk/u-boot-nand.lds | 33 ++++++++++ include/configs/mx31pdk.h | 19 +++++- nand_spl/board/freescale/mx31pdk/.gitignore | 8 ++ nand_spl/board/freescale/mx31pdk/Makefile | 66 +++++++++++++++++++ nand_spl/board/freescale/mx31pdk/config.mk | 5 ++ nand_spl/board/freescale/mx31pdk/u-boot.lds | 36 ++++++++++ 10 files changed, 270 insertions(+), 4 deletions(-) create mode 100644 board/freescale/mx31pdk/u-boot-nand.lds create mode 100644 nand_spl/board/freescale/mx31pdk/.gitignore create mode 100644 nand_spl/board/freescale/mx31pdk/Makefile create mode 100644 nand_spl/board/freescale/mx31pdk/config.mk create mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
diff --git a/MAKEALL b/MAKEALL index b581608..2f55060 100755 --- a/MAKEALL +++ b/MAKEALL @@ -549,7 +549,8 @@ LIST_ARM11=" \ imx31_phycore_eet \ imx31_phycore_nand \ mx31ads \ - mx31pdk \ + mx31pdk \ + mx31pdk_nand \ qong \ smdk6400 \ " diff --git a/Makefile b/Makefile index 40f3465..9706cb2 100644 --- a/Makefile +++ b/Makefile @@ -3084,6 +3084,13 @@ mx31ads_config : unconfig mx31pdk_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 mx31pdk freescale mx31
+mx31pdk_nand_config : unconfig + @mkdir -p $(obj)include $(obj)board/mx31pdk + @mkdir -p $(obj)nand_spl/board/mx31pdk + @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h + @$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31 + @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk + omap2420h4_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk index d34dc02..dcaa09f 100644 --- a/board/freescale/mx31pdk/config.mk +++ b/board/freescale/mx31pdk/config.mk @@ -1 +1,5 @@ +ifdef CONFIG_NAND_SPL +TEXT_BASE = 0x87ec0000 +else TEXT_BASE = 0x87f00000 +endif diff --git a/board/freescale/mx31pdk/lowlevel_init.S b/board/freescale/mx31pdk/lowlevel_init.S index ec5eedb..602eb53 100644 --- a/board/freescale/mx31pdk/lowlevel_init.S +++ b/board/freescale/mx31pdk/lowlevel_init.S @@ -26,5 +26,98 @@
.globl lowlevel_init
+#ifdef CONFIG_NAND_SPL +#include <asm/arch/mx31-regs.h> + +.macro REG reg, val + ldr r2, =\reg + ldr r3, =\val + str r3, [r2] +.endm + +.macro REG8 reg, val + ldr r2, =\reg + ldr r3, =\val + strb r3, [r2] +.endm + +.macro DELAY loops + ldr r2, =\loops +1: + subs r2, r2, #1 + nop + bcs 1b +.endm + +.globl lowlevel_init +lowlevel_init: + /* Also setup the Peripheral Port Remap register inside the core */ + ldr r0, =ARM_PPMRR /* start from AIPS 2GB region */ + mcr p15, 0, r0, c15, c2, 4 + + REG IPU_CONF, IPU_CONF_DI_EN + REG CCM_CCMR, 0x074B0BF5 + + DELAY 0x40000 + + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS + + /* Set up clock to 532MHz */ + REG CCM_PDR0, 0xFF871D58 + REG CCM_MPCTL, 0x0033280C + + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1) + + /* Set up CPLD on CS5 */ + REG CSCR_U(5), 0x0000D843 + REG CSCR_L(5), 0x22252521 + REG CSCR_A(5), 0x22220A00 + + /* Set up MX31 DDR Memory Controller */ + REG 0x43FAC26C, 0 /* SDCLK */ + REG 0x43FAC270, 0 /* CAS */ + REG 0x43FAC274, 0 /* RAS */ + REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ + REG 0x43FAC284, 0 /* DQM3 */ + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ + REG 0x43FAC28C, 0 + REG 0x43FAC290, 0 + REG 0x43FAC294, 0 + REG 0x43FAC298, 0 + REG 0x43FAC29C, 0 + REG 0x43FAC2A0, 0 + REG 0x43FAC2A4, 0 + REG 0x43FAC2A8, 0 + REG 0x43FAC2AC, 0 + REG 0x43FAC2B0, 0 + REG 0x43FAC2B4, 0 + REG 0x43FAC2B8, 0 + REG 0x43FAC2BC, 0 + REG 0x43FAC2C0, 0 + REG 0x43FAC2C4, 0 + REG 0x43FAC2C8, 0 + REG 0x43FAC2CC, 0 + REG 0x43FAC2D0, 0 + REG 0x43FAC2D4, 0 + REG 0x43FAC2D8, 0 + REG 0x43FAC2DC, 0 + REG 0xB8001010, 0x00000004 + REG 0xB8001004, 0x006ac73a + REG 0xB8001000, 0x92100000 + REG 0x80000f00, 0x12344321 + REG 0xB8001000, 0xa2100000 + REG 0x80000000, 0x12344321 + REG 0x80000000, 0x12344321 + REG 0xB8001000, 0xb2100000 + REG8 0x80000033, 0xda + REG8 0x81000000, 0xff + REG 0xB8001000, 0x82226080 + REG 0x80000000, 0xDEADBEEF + REG 0xB8001010, 0x0000000c + + mov pc, lr +#else lowlevel_init: mov pc, lr +#endif diff --git a/board/freescale/mx31pdk/u-boot-nand.lds b/board/freescale/mx31pdk/u-boot-nand.lds new file mode 100644 index 0000000..b604480 --- /dev/null +++ b/board/freescale/mx31pdk/u-boot-nand.lds @@ -0,0 +1,33 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm1136/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index deda70d..29b1574 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -45,10 +45,10 @@ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_INITRD_TAG 1
-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other - * program to initialize the SDRAM. - */ +#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT +#endif
/* * Size of malloc() pool @@ -158,5 +158,18 @@
#define CONFIG_ENV_SIZE (128 * 1024)
+#define CFG_NAND_U_BOOT_OFFS 0x800 +#define CFG_NAND_U_BOOT_SIZE 0x30000 +#define CFG_NAND_U_BOOT_DST 0x87f00000 /* Load U-Boot to this address */ +#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST +#define CFG_NAND_SPL_DST (CFG_NAND_U_BOOT_DST-0x40000) + +#define CFG_NAND_PAGE_SIZE 0x800 +#define CFG_NAND_BLOCK_SIZE (128 * 1024) +#define CFG_NAND_PAGE_COUNT 64 +/* for NAND_SPL */ +#define CFG_NAND_CHIP_SIZE (256 * 1024 * 1024) +#define CFG_NAND_PAGES_PER_BLOCK CFG_NAND_PAGE_COUNT + #endif /* __CONFIG_H */
diff --git a/nand_spl/board/freescale/mx31pdk/.gitignore b/nand_spl/board/freescale/mx31pdk/.gitignore new file mode 100644 index 0000000..f3c743e --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/.gitignore @@ -0,0 +1,8 @@ +# +# Linked files. +# + +/lowlevel_init.S +/nand_boot_mx31.c +/start.S + diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile new file mode 100644 index 0000000..f3ef669 --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/Makefile @@ -0,0 +1,66 @@ +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o lowlevel_init.o +COBJS = nand_boot_mx31.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-aligned.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-aligned.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +# create symbolic links for common files + +# from cpu directory +$(obj)start.S: + @rm -f $@ + @ln -s $(TOPDIR)/cpu/arm1136/start.S $@ + +# from board directory +$(obj)lowlevel_init.S: + @rm -f $@ + @ln -s $(TOPDIR)/board/freescale/mx31pdk/lowlevel_init.S $@ + +# from nand_spl directory +$(obj)nand_boot_mx31.c: + @rm -f $@ + @ln -s $(TOPDIR)/nand_spl/nand_boot_mx31.c $@ + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/freescale/mx31pdk/config.mk b/nand_spl/board/freescale/mx31pdk/config.mk new file mode 100644 index 0000000..119934b --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/config.mk @@ -0,0 +1,5 @@ +PAD_TO := $(shell expr $$[$(TEXT_BASE) + 2048]) + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds b/nand_spl/board/freescale/mx31pdk/u-boot.lds new file mode 100644 index 0000000..2780e11 --- /dev/null +++ b/nand_spl/board/freescale/mx31pdk/u-boot.lds @@ -0,0 +1,36 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + start.o (.text) + lowlevel_init.o (.text) + nand_boot_mx31.o (.text) + *(.text) + . = 2K; + } + + . = ALIGN(4); + .rodata : { *(.rodata) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss : { *(.bss) } + _end = .; +}
Magnus Lilja wrote:
diff --git a/nand_spl/.gitignore b/nand_spl/.gitignore new file mode 100644 index 0000000..af5f02b --- /dev/null +++ b/nand_spl/.gitignore @@ -0,0 +1,7 @@ +# NAND-SPL files +/u-boot-spl +/u-boot-spl-aligned.bin +/u-boot-spl.bin +/u-boot-spl.map +/board/imx31_phycore/nand_boot_mx31.c +/board/imx31_phycore/*.S
Hmm, can we create a directory for board-specific temporary files to go, so we don't need board-specific stuff in .gitignore?
Or better, add some makefile rules so we can produce nand_spl versions of .o files without having to symlink the source anywhere.
-Scott
Hi
2009/4/3 Scott Wood scottwood@freescale.com:
Magnus Lilja wrote:
diff --git a/nand_spl/.gitignore b/nand_spl/.gitignore new file mode 100644 index 0000000..af5f02b --- /dev/null +++ b/nand_spl/.gitignore @@ -0,0 +1,7 @@ +# NAND-SPL files +/u-boot-spl +/u-boot-spl-aligned.bin +/u-boot-spl.bin +/u-boot-spl.map +/board/imx31_phycore/nand_boot_mx31.c +/board/imx31_phycore/*.S
Hmm, can we create a directory for board-specific temporary files to go, so we don't need board-specific stuff in .gitignore?
Or better, add some makefile rules so we can produce nand_spl versions of .o files without having to symlink the source anywhere.
Sounds like a good idea. I have one solution for this now, I'll see if there's a better one before posting a suggestion tomorrow evening.
/Magnus
Hi
+++ b/nand_spl/.gitignore @@ -0,0 +1,7 @@ +# NAND-SPL files +/u-boot-spl +/u-boot-spl-aligned.bin +/u-boot-spl.bin +/u-boot-spl.map +/board/imx31_phycore/nand_boot_mx31.c +/board/imx31_phycore/*.S
Hmm, can we create a directory for board-specific temporary files to go, so we don't need board-specific stuff in .gitignore?
Or better, add some makefile rules so we can produce nand_spl versions of .o files without having to symlink the source anywhere.
Sounds like a good idea. I have one solution for this now, I'll see if there's a better one before posting a suggestion tomorrow evening.
Ok, I have an updated nand_spl/board/freescale/mx31pdk/Makefile below. It works for both in-tree and out of tree builds. I'm not particularly happy with the "$(obj)%.o: $(SRCTREE)..." lines but I couldn't make it work otherwise. Perhaps someone has a better solution.
I know gmail will mangle at least one long line, but I'll update my patch series later as well.
Thanks, Magnus
--- /dev/null 2009-04-06 20:44:51.328125000 +0200 +++ Makefile 2009-04-06 20:43:55.687500000 +0200 @@ -0,0 +1,54 @@ +CONFIG_NAND_SPL = y + +include $(TOPDIR)/config.mk +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o lowlevel_init.o +COBJS = nand_boot_mx31.o + +SRCS := $(SRCTREE)/nand_spl/nand_boot_mx31.c +SRCS += $(SRCTREE)/cpu/arm1136/start.S +SRCS += $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-aligned.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-aligned.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +######################################################################### + +$(obj)%.o: $(SRCTREE)/cpu/arm1136/%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(SRCTREE)/board/freescale/mx31pdk/%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(SRCTREE)/nand_spl/%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
participants (2)
-
Magnus Lilja -
Scott Wood