Add support for Lattice FPGA parts programmed using JTAG.

--- Signed-off-by: Pantelis Antoniou pantelis@embeddedalley.com ---

common/lattice_ivm_core.c | 750 ++++++++++++++++++++++++++++++++++++++++++++ include/lattice_ivm_core.h | 214 +++++++++++++ include/lattice_vmopcode.h | 286 +++++++++++++++++ 3 files changed, 1250 insertions(+), 0 deletions(-)

diff --git a/common/lattice_ivm_core.c b/common/lattice_ivm_core.c new file mode 100644 index 0000000..419b269 --- /dev/null +++ b/common/lattice_ivm_core.c @@ -0,0 +1,750 @@ +/* + * (C) Copyright 2006 - Embedded Alley Solutions Inc. + * by Pantelis Antoniou, pantelis@embeddedalley.com + * + * Based on redboot's lattice_ivm_core.c + * + * This file was based on ASP8347DB's redboot sources + * with the same name. The file was not carrying any copyright + * markings while RedBoot is clearly GPL licensed. + + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <malloc.h> +#include <lattice.h> +#include <lattice_ec.h> + +#include <lattice_ivm_core.h> +#include <lattice_vmopcode.h> + +#if (CONFIG_FPGA & CFG_FPGA_LATTICE) + +/* Enable/Disable debug console messages */ +#ifdef FPGA_DEBUG +#define PRINTF(fmt,args...) printf (fmt ,##args) +#else +#define PRINTF(fmt,args...) +#endif + +/* + * Reset all global variables to a known state, as this code may be + * reused (but not reloaded) + */ +void ispvm_reset(struct ispvm_desc *d, void *input_cookie) +{ + d->cookie = input_cookie; + + d->flow_control = 0x0000; + d->data_type = 0x0000; + d->end_DR = DRPAUSE; + d->end_IR = IRPAUSE; + d->head_DR = 0; + d->head_IR = 0; + d->tail_DR = 0; + d->tail_IR = 0; + d->data_size = 0; + d->frequency = 1000; + d->max_size = 0; + d->shift_value = 0; + d->repeat_loops = 0; + d->vendor = LATTICE; + d->current_jtag_state = 0; + d->heap_memory = NULL; + d->heap_counter = 0; + d->intel_data_idx = 0; + d->intel_buffer_size = 0; + d->TDO_size = 0; + d->MASK_size = 0; + d->TDI_size = 0; + d->DMASK_size = 0; + d->LCOUNT_size = 0; + d->HDR_size = 0; + d->TDR_size = 0; + d->HIR_size = 0; + d->TIR_size = 0; + d->HEAP_size = 0; + + if (d->out_MASK_data) + free(d->out_MASK_data); + if (d->in_TDI_data) + free(d->in_TDI_data); + if (d->out_TDO_data) + free(d->out_TDO_data); + if (d->HIR_data) + free(d->HIR_data); + if (d->TIR_data) + free(d->TIR_data); + if (d->HDR_data) + free(d->HDR_data); + if (d->TDR_data) + free(d->TDR_data); + if (d->intel_buffer) + free(d->intel_buffer); + if (d->out_DMASK_data) + free(d->out_DMASK_data); + if (d->LVDS_list) + free(d->LVDS_list); + + d->out_MASK_data = NULL; + d->in_TDI_data = NULL; + d->out_TDO_data = NULL; + d->HIR_data = NULL; + d->TIR_data = NULL; + d->HDR_data = NULL; + d->TDR_data = NULL; + d->intel_buffer = NULL; + d->out_DMASK_data = NULL; + d->LVDS_list = NULL; + + d->out_MASK_data_size = 0; + d->in_TDI_data_size = 0; + d->out_TDO_data_size = 0; + d->HIR_data_size = 0; + d->TIR_data_size = 0; + d->HDR_data_size = 0; + d->TDR_data_size = 0; + d->intel_buffer_alloc_size = 0; + d->out_DMASK_data_size = 0; + d->LVDS_list_size = 0; + + d->LVDS_pair_count = 0; +} + +/* Enable the port to the device and set the state to RESET (TLR). */ +void ispvm_start(struct ispvm_desc *d) +{ + /* turn the Lattice Cable on */ + lattice_ec_write_port(d->cookie, LATTICE_JTAG_CE, 1); + /* step devices to RESET state */ + ispvm_state_machine(d, RESET); +} + +/* + * Set the state of devices to RESET to enable the devices and disable + * the port. + */ +void ispvm_end(struct ispvm_desc *d) +{ + /* step devices to RESET state */ + ispvm_state_machine(d, RESET); + /* wake up devices */ + udelay(1000); + /* disable the Lattice Cable */ + lattice_ec_write_port(d->cookie, LATTICE_JTAG_CE, 0); +} + +/* Calculate the 32-bit CRC. */ +u16 ispvm_crc(struct ispvm_desc *d, u8 data, u16 ccrc) +{ + int i; + u8 fdata = 0; + u16 crce; + static const u16 crc_table[16] = { + 0x0000, 0xCC01, 0xD801, 0x1400, + 0xF001, 0x3C00, 0x2800, 0xE401, + 0xA001, 0x6C00, 0x7800, 0xB401, + 0x5000, 0x9C01, 0x8801, 0x4400 + }; + + for (i = 0; i < 8; i++) { + fdata <<= 1; + if (data & 0x01) + fdata |= 0x01; + data >>= 1; + } + + crce = crc_table[ccrc & 0xF]; + ccrc = (ccrc >> 4) & 0x0FFF; + ccrc = ccrc ^ crce ^ crc_table[fdata & 0xF]; + crce = crc_table[ccrc & 0xF]; + ccrc = (ccrc >> 4) & 0x0FFF; + ccrc = ccrc ^ crce ^ crc_table[(fdata >> 4) & 0xF]; + + return ccrc; +} + +int ispvm_validate_version(struct ispvm_desc *d, const char *version) +{ + static const char *vertab[] = { + "__VME2.0", + "__VME3.0", + "____12.0", + NULL + }; + int i, j, ret; + + ret = 0; + for (i = 0; vertab[i] != NULL; i++) { + for (j = 0; j < 8; j++) { + if (version[j] != vertab[i][j]) { + ret = VME_VERSION_FAILURE; + break; + } + ret = 0; + } + + if (ret == 0) + break; + } + + return ret; +} + +/* + * Returns a byte to the caller. The returned byte depends on the + * d->data_type register. If the HEAP_IN bit is set, then the byte + * is returned from the HEAP. If the LHEAP_IN bit is set, then + * the byte is returned from the intelligent buffer. Otherwise, + * the byte is returned directly from the VME file. + */ +int ispvm_get(struct ispvm_desc *d) +{ + if (d->data_type & HEAP_IN) { + if (d->heap_counter > d->heap_repeat_size) + return -1; + return d->heap_memory[d->heap_counter++]; + } + + if (d->data_type & LHEAP_IN) { + if (d->intel_data_idx > d->intel_buffer_size) + return -1; + return d->intel_buffer[d->intel_buffer_size++]; + } + + /* get next byte from buffer */ + return lattice_ec_next_byte(d->cookie); +} + +/* + * Allocate memory based on target. The memory size is specified + * by size. + */ +int ispvm_alloc(struct ispvm_desc *d, int target, int size) +{ + switch (target) { + case XTDI: + case TDI: + if (d->in_TDI_data != NULL && d->in_TDI_data_size <= size) + break; + + if (d->in_TDI_data != NULL) { + free(d->in_TDI_data); + d->in_TDI_data = NULL; + d->in_TDI_data_size = 0; + } + d->in_TDI_data = malloc(size / 8 + 2); + if (d->in_TDI_data != NULL) + d->in_TDI_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case XTDO: + case TDO: + if (d->out_TDO_data != NULL && d->out_TDO_data_size <= size) + break; + + if (d->out_TDO_data != NULL) { + free(d->out_TDO_data); + d->out_TDO_data = NULL; + d->out_TDO_data_size = 0; + } + d->out_TDO_data = malloc(size / 8 + 2); + if (d->out_TDO_data != NULL) + d->out_TDO_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case MASK: + if (d->out_MASK_data != NULL && d->out_MASK_data_size <= size) + break; + + if (d->out_MASK_data != NULL) { + free(d->out_MASK_data); + d->out_MASK_data = NULL; + d->out_MASK_data_size = 0; + } + d->out_MASK_data = malloc(size / 8 + 2); + if (d->out_MASK_data != NULL) + d->out_MASK_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case HIR: + if (d->HIR_data != NULL && d->HIR_data_size <= size) + break; + + if (d->HIR_data != NULL) { + free(d->HIR_data); + d->HIR_data = NULL; + d->HIR_data_size = 0; + } + d->HIR_data = malloc(size / 8 + 2); + if (d->HIR_data != NULL) + d->HIR_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case TIR: + if (d->TIR_data != NULL && d->TIR_data_size <= size) + break; + + if (d->TIR_data != NULL) { + free(d->TIR_data); + d->TIR_data = NULL; + d->TIR_data_size = 0; + } + d->TIR_data = malloc(size / 8 + 2); + if (d->TIR_data != NULL) + d->TIR_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case HDR: + if (d->HDR_data != NULL && d->HDR_data_size <= size) + break; + + if (d->HDR_data != NULL) { + free(d->HDR_data); + d->HDR_data = NULL; + d->HDR_data_size = 0; + } + d->HDR_data = malloc(size / 8 + 2); + if (d->HDR_data != NULL) + d->HDR_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case TDR: + if (d->TDR_data != NULL && d->TDR_data_size <= size) + break; + + if (d->TDR_data != NULL) { + free(d->TDR_data); + d->TDR_data = NULL; + d->TDR_data_size = 0; + } + d->TDR_data = malloc(size / 8 + 2); + if (d->TDR_data != NULL) + d->TDR_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case HEAP: + if (d->heap_memory != NULL && d->heap_memory_size <= size) + break; + + if (d->heap_memory != NULL) { + free(d->heap_memory); + d->heap_memory = NULL; + d->heap_memory_size = 0; + } + d->heap_memory = malloc(size + 2); + if (d->heap_memory != NULL) + d->heap_memory_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case DMASK: + if (d->out_DMASK_data != NULL && d->out_DMASK_data_size <= size) + break; + + if (d->out_DMASK_data != NULL) { + free(d->out_DMASK_data); + d->out_DMASK_data = NULL; + d->out_DMASK_data_size = 0; + } + d->out_DMASK_data = malloc(size / 8 + 2); + if (d->out_DMASK_data != NULL) + d->out_DMASK_data_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case LHEAP: + if (d->intel_buffer != NULL && d->intel_buffer_alloc_size <= size) + break; + + if (d->intel_buffer != NULL) { + free(d->intel_buffer); + d->intel_buffer = NULL; + d->intel_buffer_alloc_size = 0; + } + d->intel_buffer = malloc(size + 2); + if (d->intel_buffer != NULL) + d->intel_buffer_alloc_size = size; + else + return VME_OUT_OF_MEMORY; + break; + + case LVDS: + if (d->LVDS_list != NULL && d->LVDS_list_size <= size) + break; + + if (d->LVDS_list != NULL) { + free(d->LVDS_list); + d->LVDS_list = NULL; + d->LVDS_list_size = 0; + } + d->LVDS_list = malloc(size * sizeof(LVDSPair)); + if (d->LVDS_list != NULL) { + memset(d->LVDS_list, 0, size * sizeof(LVDSPair)); + d->LVDS_list_size = size; + } else + return VME_OUT_OF_MEMORY; + break; + + default: + break; + } + + return 0; +} + +/* + * This is the heart of the embedded engine. All the high-level opcodes + * are extracted here. Once they have been identified, then it + * will call other functions to handle the processing. + */ +int ispvm_code(struct ispvm_desc *d) +{ + int i, j, state, opcode; + int ret = 0; + + /* + * Check the compression flag only if this is the first time + * this function is entered. Do not check the compression flag if + * it is being called recursively from other functions within + * the embedded engine. + */ + if (!(d->data_type & LHEAP_IN) && !(d->data_type & HEAP_IN)) { + ret = ispvm_get(d); + if (ret == -1) + return VME_INVALID_FILE; + if (ret == 0xf1) + d->data_type |= COMPRESS; + else if (ret == 0xf2) + d->data_type &= ~COMPRESS; + else + return VME_INVALID_FILE; + } + + /* Begin looping through all the VME opcodes. */ + while ((opcode = ispvm_get(d)) >= 0) { + + switch (opcode) { + + /* Step the JTAG state machine. */ + case STATE: + PRINTF("STATE:\n"); + state = ispvm_get(d); + if (state == -1) + return VME_INVALID_FILE; + ispvm_state_machine(d, state); + break; + + /* Shift in data into the device. */ + case SIR: + PRINTF("SIR:\n"); + + ret = ispvm_shift(d, opcode); + if (ret != 0) + return ret; + break; + + case SDR: + PRINTF("SDR:\n"); + ret = ispvm_shift(d, opcode); + if (ret != 0) + return ret; + break; + + case XSDR: + PRINTF("XSDR:\n"); + ret = ispvm_shift(d, opcode); + if (ret != 0) + return ret; + break; + + /* perform delay */ + case WAIT: + PRINTF("WAIT:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + if (j & 0x8000) { + i = j & ~0x8000; + while (i-- > 0) + udelay(1000); + } else + udelay(j); + break; + + /* Issue clock toggles. */ + case TCK: + PRINTF("TCK:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + for (i = 0; i < j; i++) + ispvm_clock(d); + break; + + /* Set the ENDDR. */ + case ENDDR: + PRINTF("ENDDR:\n"); + d->end_DR = ispvm_get(d); + break; + + /* Set the ENDIR. */ + case ENDIR: + PRINTF("ENDIR:\n"); + d->end_IR = ispvm_get(d); + break; + + /* + * Set the header/trailer of the device in order to + * bypass successfully. + */ + case HIR: + PRINTF("HIR:\n"); + ret = ispvm_amble(d, opcode); + if (ret != 0) + return ret; + break; + + case TIR: + PRINTF("TIR:\n"); + ret = ispvm_amble(d, opcode); + if (ret != 0) + return ret; + break; + + case HDR: + PRINTF("HDR:\n"); + ret = ispvm_amble(d, opcode); + if (ret != 0) + return ret; + break; + + case TDR: + PRINTF("TDR:\n"); + ret = ispvm_amble(d, opcode); + if (ret != 0) + return ret; + break; + + /* + * The maximum RAM required to support processing + * one row of the VME file. + */ + case MEM: + PRINTF("MEM:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + d->max_size = j; + break; + + /* Set the VENDOR type. */ + case VENDOR: + PRINTF("VENDOR:\n"); + opcode = ispvm_get(d); + switch (opcode) { + case LATTICE: + d->vendor = LATTICE; + break; + case ALTERA: + d->vendor = ALTERA; + break; + case XILINX: + d->vendor = XILINX; + break; + default: + return VME_INVALID_FILE; + } + break; + + /* + * Set the flow control. Flow control determines the + * personality of the embedded engine. + */ + case SETFLOW: + PRINTF("SETFLOW:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + d->flow_control |= j & 0xffff; + break; + + /* Unset the flow control. */ + case RESETFLOW: + PRINTF("RESETFLOW:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + d->flow_control &= ~j & 0xffff; + break; + + /* Allocate heap size to store loops. */ + case HEAP: + PRINTF("HEAP:\n"); + ret = ispvm_get(d); + if (ret != SECUREHEAP) + return VME_INVALID_FILE; + + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + d->heap_repeat_size = j; + + /* + * Store the maximum size of the HEAP buffer. + * Used to convert VME to HEX. + */ + if (d->heap_repeat_size > d->HEAP_size) + d->HEAP_size = d->heap_repeat_size; + + j = ispvm_alloc(d, HEAP, d->heap_repeat_size); + if (j != 0) + return VME_OUT_OF_MEMORY; + break; + + /* Execute loops. */ + case REPEAT: + PRINTF("REPEAT:\n"); + d->repeat_loops = 0; + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + ret = ispvm_loop(d, j); + if (ret != 0) + return ret; + break; + + /* Exit point from processing loops. */ + case ENDLOOP: + PRINTF("ENDLOOP:\n"); + return ret; + + /* + * The only valid exit point that indicates end + * of programming. + */ + case ENDVME: + PRINTF("ENDVME:\n"); + return ret; + + /* Right-shift address. */ + case SHR: + PRINTF("SHR:\n"); + d->flow_control |= SHIFTRIGHT; + d->shift_value = d->repeat_loops * ispvm_get(d); + break; + + /* Left-shift address. */ + case SHL: + PRINTF("SHL:\n"); + d->flow_control |= SHIFTLEFT; + d->shift_value = d->repeat_loops * ispvm_get(d); + break; + + /* Set the d->frequency. */ + case FREQUENCY: + PRINTF("FREQUENCY:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + d->frequency = j / 1000; + break; + + /* Process LCOUNT command. */ + case LCOUNT: + PRINTF("LCOUNT:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + ret = ispvm_lcount(d, j); + if (ret != 0) + return ret; + break; + + /* Set the flow control to verify USERCODE. */ + case VUES: + PRINTF("VUES:\n"); + d->flow_control |= VERIFYUES; + break; + + /* Display comment. */ + case COMMENT: + PRINTF("COMMENT:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + j = ispvm_comment(d, j); + if (j == -1) + return VME_INVALID_FILE; + break; + + /* Process LVDS command. */ + case LVDS: + PRINTF("LVDS:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + j = ispvm_process_lvds(d, j); + if (j == -1) + return VME_INVALID_FILE; + break; + + /* Discard header. */ + case HEADER: + PRINTF("HEADER:\n"); + j = ispvm_data_size(d); + if (j == -1) + return VME_INVALID_FILE; + j = ispvm_header(d, j); + if (j == -1) + return VME_INVALID_FILE; + break; + + /* Invalid opcode encountered. */ + default: + return VME_INVALID_FILE; + } + } + + /* + * Invalid exit point. Processing the token 'ENDVME' is the only + * valid way to exit the embedded engine. + */ + return VME_INVALID_FILE; +} + +#endif diff --git a/include/lattice_ivm_core.h b/include/lattice_ivm_core.h new file mode 100644 index 0000000..1c939c7 --- /dev/null +++ b/include/lattice_ivm_core.h @@ -0,0 +1,214 @@ +/* + * (C) Copyright 2006 + * by Pantelis Antoniou, pantelis@embeddedalley.com + * + * This file was based on ASP8347DB's redboot sources + * with the same name. The file was not carrying any copyright + * markings while RedBoot is clearly GPL licensed. + + * lattice_ivm_core definitions + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef LATTICE_IVM_CORE_H +#define LATTICE_IVM_CORE_H + +#include <asm/types.h> + +/* Type definitions */ + +/* Support LVDS */ +typedef struct { + u16 positive_idx; + u16 negative_idx; + int update; +} LVDSPair; + +/* the state of the program engine */ +struct ispvm_desc { + + /* upper layer cookie */ + void *cookie; + + /* + * Flow control register. + * Each bit in the register can potentially change the + * personality of the embedded engine. + */ + u16 flow_control; + + /* holds the data type of the current row */ + u16 data_type; + + /* the state that the device goes to after SDR */ + u8 end_DR; + + /* the state that the device goes to after SIR */ + u8 end_IR; + + /* number of lead devices in bypass */ + u16 head_DR; + + /* sum of IR length of lead devices */ + u16 head_IR; + + /* number of tail devices in bypass */ + u16 tail_DR; + + /* sum of IR length of tail devices */ + u16 tail_IR; + + /* Number of bits of data or instruction + * to be shifted into or out from the device + */ + u16 data_size; + + /* Stores the frequency. Default to 1 MHz. */ + int frequency; + + /* + * Stores the maximum amount of ram needed to hold a + * row of data. + */ + u16 max_size; + + /* Stores the LSH or RSH value. */ + u16 shift_value; + + /* Stores the current repeat loop value. */ + u16 repeat_loops; + + /* Stores the current vendor. */ + int vendor; + + /* Stores the current state of the JTAG state machine. */ + int current_jtag_state; + + /* holds the entire repeat loop */ + u8 *heap_memory; + + /* holds the entire repeat loop allocated size */ + int heap_memory_size; + + /* points to the current byte in the repeat loop */ + u16 heap_counter; + + /* current size of the repeat in bytes */ + u16 heap_repeat_size; + + /* points to the current byte of the intelligent buffer */ + u16 intel_data_idx; + + /* holds the size of the intelligent buffer */ + u16 intel_buffer_size; + + /* + * + * Holds the maximum size of each respective buffer. + * These variables are used to write the HEX files when + * converting VME to HEX. + */ + u16 TDO_size; + u16 MASK_size; + u16 TDI_size; + u16 DMASK_size; + u16 LCOUNT_size; + u16 HDR_size; + u16 TDR_size; + u16 HIR_size; + u16 TIR_size; + u16 HEAP_size; + + /* one row of MASK data */ + u8 *out_MASK_data; + unsigned int out_MASK_data_size; + + /* one row of TDI data */ + u8 *in_TDI_data; + unsigned int in_TDI_data_size; + + /* one row of TDO data */ + u8 *out_TDO_data; + unsigned int out_TDO_data_size; + + /* current SIR header */ + u8 *HIR_data; + unsigned int HIR_data_size; + + /* current SIR trailer */ + u8 *TIR_data; + unsigned int TIR_data_size; + + /* current SDR header */ + u8 *HDR_data; + unsigned int HDR_data_size; + + /* current SDR trailer */ + u8 *TDR_data; + unsigned int TDR_data_size; + + /* current intelligent buffer */ + u8 *intel_buffer; + unsigned int intel_buffer_alloc_size; + + /* one row of DMASK data */ + u8 *out_DMASK_data; + unsigned int out_DMASK_data_size; + + /* List to hold all LVDS pairs. */ + LVDSPair *LVDS_list; + unsigned int LVDS_list_size; + u16 LVDS_pair_count; +}; + +/* interface function prototypes */ +void ispvm_reset(struct ispvm_desc *d, void *cookie); +void ispvm_start(struct ispvm_desc *d); +void ispvm_end(struct ispvm_desc *d); +u16 ispvm_crc(struct ispvm_desc *d, u8 data, u16 ccrc); +int ispvm_validate_version(struct ispvm_desc *d, const char *version); +int ispvm_code(struct ispvm_desc *d); + +/* internal function prototypes. */ +int ispvm_data_code(struct ispvm_desc *d); +int ispvm_data_size(struct ispvm_desc *d); +int ispvm_data(struct ispvm_desc *d, u8 *data); +int ispvm_shift(struct ispvm_desc *d, int code); +int ispvm_amble(struct ispvm_desc *d, int code); +int ispvm_loop(struct ispvm_desc *d, int repeats); +int ispvm_bit_shift(struct ispvm_desc *d, int mode, u16 bits); +int ispvm_comment(struct ispvm_desc *d, int size); +int ispvm_header(struct ispvm_desc *d, int size); +int ispvm_lcount(struct ispvm_desc *d, int size); +void ispvm_clock(struct ispvm_desc *d); +void ispvm_bypass(struct ispvm_desc *d, int scan_type, u16 bits); +void ispvm_state_machine(struct ispvm_desc *d, int next_state); +int ispvm_send(struct ispvm_desc *d, u16 size); +int ispvm_read(struct ispvm_desc *d, u16 size); +int ispvm_read_and_save(struct ispvm_desc *d, u16 size); +int ispvm_process_lvds(struct ispvm_desc *d, int count); + +/* lattice functions */ +int ispvm_get(struct ispvm_desc *d); +int ispvm_alloc(struct ispvm_desc *d, int types, int size); + + +#endif diff --git a/include/lattice_vmopcode.h b/include/lattice_vmopcode.h new file mode 100644 index 0000000..b9c8646 --- /dev/null +++ b/include/lattice_vmopcode.h @@ -0,0 +1,286 @@ +/* + * (C) Copyright 2006 + * by Pantelis Antoniou, pantelis@embeddedalley.com + * + * lattice_ivm_core definitions + * + * This file was based on ASP8347DB's redboot sources + * with the same name. The file was not carrying any copyright + * markings while RedBoot is clearly GPL licensed. + + * This is the include file for Lattice Semiconductor's ispVM + * Embedded software application. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef LATTICE_VMOPCODE_H +#define LATTICE_VMOPCODE_H + +/* VME version. */ +#define VME_VERSION_NUMBER "12.0" + +#define VMEHEXMAX 60000L /* The hex file is split 60K per file . */ +#define SCANMAX 64000L /* The maximum SDR/SIR burst . */ + +/* Supported JTAG state transitions. */ + +#define RESET 0x00 +#define IDLE 0x01 +#define IRPAUSE 0x02 +#define DRPAUSE 0x03 +#define SHIFTIR 0x04 +#define SHIFTDR 0x05 +/* 11/15/05 Nguyen changed to support DRCAPTURE*/ +#define DRCAPTURE 0x06 + +/* + * Flow control register bit definitions. A set bit indicates + * that the register currently exhibits the corresponding mode. + */ + +#define INTEL_PRGM 0x0001 /* Intelligent programming is in effect */ +#define CASCADE 0x0002 /* Currently splitting large SDR */ +#define REPEATLOOP 0x0008 /* Currently executing a repeat loop */ +#define SHIFTRIGHT 0x0080 /* The next data stream needs a right shift */ +#define SHIFTLEFT 0x0100 /* The next data stream needs a left shift */ +#define VERIFYUES 0x0200 /* Continue if fail is in effect */ + +/* + * DataType register bit definitions. A set bit indicates + * that the register currently holds the corresponding type of data. + */ + +#define EXPRESS 0x0001 /* Simultaneous program and verify */ +#define SIR_DATA 0x0002 /* SIR is the active SVF command */ +#define SDR_DATA 0x0004 /* SDR is the active SVF command */ +#define COMPRESS 0x0008 /* Data is compressed */ +#define TDI_DATA 0x0010 /* TDI data is present */ +#define TDO_DATA 0x0020 /* TDO data is present */ +#define MASK_DATA 0x0040 /* MASK data is present */ +#define HEAP_IN 0x0080 /* Data is from the heap */ +#define LHEAP_IN 0x0200 /* Data is from intel data buffer */ +#define VARIABLE 0x0400 /* Data is from a declared variable */ +#define CRC_DATA 0x0800 /* CRC data is pressent */ +#define CMASK_DATA 0x1000 /* CMASK data is pressent */ +#define RMASK_DATA 0x2000 /* RMASK data is pressent */ +#define READ_DATA 0x4000 /* READ data is pressent */ +#define DMASK_DATA 0x8000 /* DMASK data is pressent */ + +/* Pin opcodes */ +#define signalENABLE 0x1C /* ispENABLE */ +#define signalTMS 0x1D /* TMS */ +#define signalTCK 0x1E /* TCK */ +#define signalTDI 0x1F /* TDI */ +#define signalTRST 0x2 /* TRST */ + +/* Supported vendors. */ +#define VENDOR 0x56 +#define LATTICE 0x01 +#define ALTERA 0x02 +#define XILINX 0x03 + +/* Opcode definitions */ + +/* The end of the current SDR data stream. */ +#define ENDDATA 0x00 + +/* The duration to stay at the stable state. */ +#define RUNTEST 0x01 + +/* The stable state after SDR. */ +#define ENDDR 0x02 + +/* The stable state after SIR. */ +#define ENDIR 0x03 + +/* The stable state after RUNTEST. */ +#define ENDSTATE 0x04 + +/* Assert the TRST pin. */ +#define TRST 0x05 + +/* The sum of the IR bits of the leading devices. */ +#define HIR 0x06 + +/* The sum of the IR bits of the trailing devices. */ +#define TIR 0x07 + +/* The number of leading devices. */ +#define HDR 0x08 + +/* The number of trailing devices. */ +#define TDR 0x09 + +/* Assert the ispEN pin. */ +#define ispEN 0x0A + +/* The maximum clock rate to run the JTAG state machine. */ +#define FREQUENCY 0x0B + +/* Move to the next stable state. */ +#define STATE 0x10 + +/* The instruction stream follows. */ +#define SIR 0x11 + +/* The data stream follows. */ +#define SDR 0x12 + +/* The following data stream feeds into the device. */ +#define TDI 0x13 + +/* The following data stream is compared against the device. */ +#define TDO 0x14 + +/* The following data stream is used as mask. */ +#define MASK 0x15 + +/* The following data stream is for simultaneous program and verify. */ +#define XSDR 0x16 + +/* + * The following data stream is for shift in only. + * It must be stored for the next XSDR. + */ +#define XTDI 0x17 + +/* + * is not data stream. + * The data stream was stored from the previous XTDI. + */ +#define XTDO 0x18 + +/* The maximum memory needed to allocate in order hold one row of data */ +#define MEM 0x19 + +/* The duration of delay to observe. */ +#define WAIT 0x1A + +/* The number of TCK pulses. */ +#define TCK 0x1B + +/* Set the flow control register for right shift. */ +#define SHR 0x23 + +/* Set the flow control register for left shift. */ +#define SHL 0x24 + +/* The memory size needed to hold one loop. */ +#define HEAP 0x32 + +/* The beginning of the loop. */ +#define REPEAT 0x33 + +/* The beginning of data following the loop. */ +#define LEFTPAREN 0x35 + +/* Plac holder for loop data. */ +#define VAR 0x55 + +/* The delay time in seconds that must be observed. */ +#define SEC 0x1C + +/* The mask for TDI data. */ +#define SMASK 0x1D + +/* The absolute maximum wait time. */ +#define MAX 0x1E + +/* Assert the targeted pin. */ +#define ON 0x1F + +/* Dis-assert the targeted pin. */ +#define OFF 0x20 + +/* Change the flow control register. */ +#define SETFLOW 0x30 + +/* Clear the flow control register. */ +#define RESETFLOW 0x31 + +/* The following data stream is used for CRC calculation. */ +#define CRC 0x47 + +/* The following data stream is used as mask for CRC calculation. */ +#define CMASK 0x48 + +/* The following data stream is used as mask for read and save. */ +#define RMASK 0x49 + +/* The following data stream is used for read and save. */ +#define READ 0x50 + +/* The end of the repeat loop. */ +#define ENDLOOP 0x59 + +/* Used to secure the HEAP opcode. */ +#define SECUREHEAP 0x60 + +/* Support continue if fail. */ +#define VUES 0x61 + +/* The following data stream is used for dynamic I/O. */ +#define DMASK 0x62 + +/* Support SVF comments in the VME file. */ +#define COMMENT 0x63 + +/* Support header in VME file. */ +#define HEADER 0x64 + +/* Support crc-protected VME file. */ +#define FILE_CRC 0x65 + +/* Support intelligent programming. */ +#define LCOUNT 0x66 + +/* Support intelligent programming. */ +#define LDELAY 0x67 + +/* Support intelligent programming. */ +#define LSDR 0x68 + +/* Memory needed to hold intelligent data buffer */ +#define LHEAP 0x69 + +/* Allow continuation. */ +#define CONTINUE 0x70 + +/* Support LVDS. */ +#define LVDS 0x71 + +/* End of the VME file. */ +#define ENDVME 0x7F + +/* End of file. */ +#define ENDFILE 0xFF + +/* ispVM Embedded Return Codes */ +#define VME_OK 0 +#define VME_VERIFICATION_FAILURE -1 +#define VME_FILE_READ_FAILURE -2 +#define VME_VERSION_FAILURE -3 +#define VME_INVALID_FILE -4 +#define VME_ARGUMENT_FAILURE -5 +#define VME_CRC_FAILURE -6 +#define VME_OUT_OF_MEMORY -7 + +#endif

Provide support for RedBoot's FIS & config variables.

For PPC provide also a way to boot a redboot compiled Linux kernel. The bd_t is different in that case.

--- Signed-off-by: Pantelis Antoniou pantelis@embeddedalley.com ---

README | 70 ++++ common/Makefile | 1 common/cmd_bootm.c | 20 + common/redboot.c | 978 ++++++++++++++++++++++++++++++++++++++++++++++++++++ include/redboot.h | 98 +++++ 5 files changed, 1166 insertions(+), 1 deletions(-)

diff --git a/README b/README index e28f935..c3055c0 100644 --- a/README +++ b/README @@ -2324,6 +2324,76 @@ Low Level (hardware related) configuration options: some other boot loader or by a debugger which performs these intializations itself.

+- CONFIG_REDBOOT + Add support for read-only parsing of the FIS & config areas. + For PPC also add an option to boot a kernel compiled for RedBoot. + + The redboot command is also enabled conditional on CFG_CMD_FLASH. + + - Select a different FIS + > redboot fis select ([bank] [sector] | reset) + + - Display FIS + > redboot fis list + + - Set an environment variable from a member variable of a FIS entry + + > redboot fis setenv var type name + + Where type: flash_base, mem_base, size, entry_point, data_length. + + An example given a FIS entry of + + Name FLASH addr Mem addr Datalen Length Entry point + Linux 0xF0470000 0x00100000 0x000FA000 0x00100000 0x00100000 + + > redboot fis setenv linux_base flash_base Linux + + Would set the environment variable linux_base to 0xf0470000 + + - Print either all the RedBoot config variables or a specific one + + > redboot config printenv [config-var] [member] + + member is one of value, type, enable-sense, enable-key with value + being the default one. + + - Set an environment variable from a RedBoot config variable + + > redboot config setenv var config-var [member] + + For example when given a config variable of + + tsec1_esa=00:08:e5:11:32:33 + type=esa enable-sense=true + + > redboot config setenv ethaddr tsec1_esa + + would set the ethaddr environment variable to 00:08:e5:11:32:33 + + - Boot a RedBoot kernel [PPC specific] + + > redboot exec address + + The PPC bd_t differs for kernels compiled for redboot; this command + lets you boot such a kernel. + + RedBoot config defaults (can be overriden on board config): + + - Sector containing the FIS area (negative values for counting from the end) + CONFIG_REDBOOT_FIS_DIRECTORY_BLOCK -1 + + - FIS directory entry size + CONFIG_REDBOOT_DIRECTORY_ENTRY_SIZE 0x100 + + - Size of the config area + CONFIG_REDBOOT_FLASH_CONFIG_SIZE 4096 + + - Size of the script config variables + CONFIG_REDBOOT_FLASH_SCRIPT_SIZE 256 + + - Size of the string config variables + CONFIG_REDBOOT_FLASH_STRING_SIZE 128

Building the Software: ====================== diff --git a/common/Makefile b/common/Makefile index 79d11a5..13dc6ae 100644 --- a/common/Makefile +++ b/common/Makefile @@ -51,6 +51,7 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o \ lattice.o lattice_ec.o lattice_ivm_core.o lattice_ivm_supp.o \ lcd.o lists.o lynxkdi.o \ memsize.o miiphybb.o miiphyutil.o \ + redboot.o \ s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \ usb.o usb_kbd.o usb_storage.o \ virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 7aae8a6..578d05b 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -146,6 +146,12 @@ extern void lynxkdi_boot( image_header_t * ); #define CFG_BOOTM_LEN 0x800000 /* use 8MByte as default max gunzip size */ #endif

+#ifdef CONFIG_REDBOOT_BD_T_SIZE +extern void board_redboot_bd_t_adapt(void *kbd, + ulong cmd_start, ulong cmd_end, + ulong initrd_start, ulong initrd_end); +#endif + image_header_t header;

ulong load_addr = CFG_LOAD_ADDR; /* Default Load Address */ @@ -533,6 +539,11 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, char *of_flat_tree = NULL; ulong of_data = 0; #endif +#ifdef CONFIG_REDBOOT_BD_T_SIZE +#define BD_T_SIZE max(sizeof(bd_t), CONFIG_REDBOOT_BD_T_SIZE) +#else +#define BD_T_SIZE sizeof(bd_t) +#endif

if ((s = getenv ("initrd_high")) != NULL) { /* a value of "no" or a similar string will act like 0, @@ -575,7 +586,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, debug ("=> set upper limit to 0x%08lX\n", sp);

cmdline = (char *)((sp - CFG_BARGSIZE) & ~0xF); - kbd = (bd_t *)(((ulong)cmdline - sizeof(bd_t)) & ~0xF); + kbd = (bd_t *)(((ulong)cmdline - BD_T_SIZE) & ~0xF);

if ((s = getenv("bootargs")) == NULL) s = ""; @@ -904,6 +915,13 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag, initrd_end = 0; }

+ /* redboot bd_t modify */ +#ifdef CONFIG_REDBOOT_BD_T_SIZE + if ((s = getenv ("redboot_bd_t")) != NULL) + board_redboot_bd_t_adapt(kbd, cmd_start, cmd_end, + initrd_start, initrd_end); +#endif + debug ("## Transferring control to Linux (at address %08lx) ...\n", (ulong)kernel);

diff --git a/common/redboot.c b/common/redboot.c new file mode 100644 index 0000000..22c4373 --- /dev/null +++ b/common/redboot.c @@ -0,0 +1,978 @@ +/* + * (C) Copyright 2006 - Embedded Alley Solutions Inc. + * by Pantelis Antoniou, pantelis@embeddedalley.com + * + * Based on Linux & RedBoot code fragments + * by David Woodhouse, dwmw2@infradead.org + * by Mark Sattler, msalter@redhat.com + * by Gary Thomas, gthomas@redhat.com + * + * RedBoot flash images/configuration & kernel startup + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <malloc.h> +#include <flash.h> +#include <command.h> + +#include <redboot.h> + +#ifdef CONFIG_SHOW_BOOT_PROGRESS +# include <status_led.h> +# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) +#else +# define SHOW_BOOT_PROGRESS(arg) +#endif + +#ifdef CFG_INIT_RAM_LOCK +#include <asm/cache.h> +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_FLASH) && defined(CONFIG_REDBOOT) + +DECLARE_GLOBAL_DATA_PTR; + +extern void board_redboot_bd_t_adapt(void *kbd, + ulong cmd_start, ulong cmd_end, + ulong initrd_start, ulong initrd_end); + +extern flash_info_t flash_info[]; /* info for FLASH chips */ + +static inline int redboot_checksum(struct fis_image_desc *img) +{ + /* RedBoot doesn't actually write the desc_cksum field yet AFAICT */ + return 1; +} + +static int get_sector_size(flash_info_t *info, int sector) +{ + ulong s, e; + + if (info->flash_id == FLASH_UNKNOWN) + return 0; + + if ((unsigned int)sector >= info->sector_count) + return 0; + + s = info->start[sector]; + if (sector < info->sector_count - 1) + e = info->start[sector + 1]; + else + e = info->start[0] + info->size; + + return e - s; +} + +/* get the sector which corresponds to this address */ +static int get_sector(flash_info_t *info, void *ptr) +{ + int i; + ulong s, e; + + if (info->flash_id == FLASH_UNKNOWN) + return -1; + + if (info->start[0] > (ulong)ptr || + info->start[info->sector_count - 1] < (ulong)ptr) + return -1; + + for (i = 0; i < info->sector_count; i++) { + s = info->start[i]; + if (i < info->sector_count - 1) + e = info->start[i + 1]; + else + e = info->start[0] + info->size; + + if (s <= (ulong)ptr && e > (ulong)ptr) + return i; + } + + /* should not happen */ + return -1; +} + +static void *get_fis(flash_info_t *info, void *fis) +{ + int dir_block, sector; + + if (info->flash_id == FLASH_UNKNOWN) + return NULL; + + /* already given a fis address (verify it) */ + if (fis != NULL) { + if (info->start[0] > (ulong)fis || + info->start[info->sector_count - 1] < (ulong)fis) + return NULL; + return fis; + } + + /* go with defaults */ + dir_block = CONFIG_REDBOOT_FIS_DIRECTORY_BLOCK; + if (dir_block < 0) + sector = info->sector_count + dir_block; + else + sector = dir_block; + + if ((unsigned int)sector >= info->sector_count) + return NULL; + + return (void *)info->start[sector]; +} + +static int get_fis_slots(flash_info_t *info, void *fis, int *swapped) +{ + int i, sector, sector_size, slots; + struct fis_image_desc *ptr; + + *swapped = -1; + + fis = get_fis(info, fis); + if (fis == NULL) + return -1; + + sector = get_sector(info, fis); + sector_size = get_sector_size(info, sector); + + slots = sector_size / sizeof(struct fis_image_desc); + + /* first pass; detect swap status */ + for (i = 0, ptr = fis; i < slots; i++, ptr++) { + if (ptr->name[0] == 0xFF) + break; + + if (!memcmp(ptr->name, "FIS directory", 14)) + *swapped = swab32(ptr->size) == sector_size; + } + + if (*swapped == -1) + return -1; + + return i; +} + +void *redboot_fis_get(int bank, int dir_block, flash_info_t **infop) +{ + flash_info_t *info; + int block; + + if (bank < 1 || bank > CFG_MAX_FLASH_BANKS) { + printf("Only FLASH Banks # 1 ... # %d supported\n", + CFG_MAX_FLASH_BANKS); + return NULL; + } + info = &flash_info[bank-1]; + if (info->flash_id == FLASH_UNKNOWN) { + printf("FLASH Bank #%d, not present\n", bank); + return NULL; + } + + if (dir_block < 0) + block = info->sector_count + dir_block; + else + block = dir_block; + + if ((unsigned int)block >= info->sector_count) { + printf("FLASH dir_block %d out of range in Bank #%d\n", + dir_block, bank); + return NULL; + } + + if (infop) + *infop = info; + return (void *)info->start[block]; +} + + +int redboot_fis_entry_lookup(flash_info_t *info, void *fis, + struct fis_image_desc *fis_buf, const char *name) +{ + int i, slots, swapped, name_len; + struct fis_image_desc *ptr; + + fis = get_fis(info, fis); + if (fis == NULL) + return -1; + + slots = get_fis_slots(info, fis, &swapped); + if (slots == -1) { + printf("fis list: FIS not found\n"); + return -1; + } + + name_len = strlen(name); + + /* now do the proper read (with swapping if needed */ + for (i = 0, ptr = fis; i < slots; i++, ptr++) { + + if (ptr->name[0] == 0xFF) + break; + + /* copy to buffer */ + memcpy(fis_buf, ptr, sizeof(struct fis_image_desc)); + if (swapped) { + /* The unsigned long fields were written with the + * wrong byte sex, name and pad have no byte sex. + */ + swab32s(&fis_buf->flash_base); + swab32s(&fis_buf->mem_base); + swab32s(&fis_buf->size); + swab32s(&fis_buf->entry_point); + swab32s(&fis_buf->data_length); + swab32s(&fis_buf->desc_cksum); + swab32s(&fis_buf->file_cksum); + } + + /* found */ + if (strcmp(name, fis_buf->name) == 0) + return 0; + } + + return -1; +} + +int redboot_fis_list(flash_info_t *info, void *fis) +{ + int i, slots, swapped, found; + static struct fis_image_desc fis_buf; /* static; save stack space */ + struct fis_image_desc *ptr; + u32 last, lowest, flash_base; + + fis = get_fis(info, fis); + if (fis == NULL) { + printf("fis list: could not get FIS\n"); + return -1; + } + + slots = get_fis_slots(info, fis, &swapped); + if (slots == -1) { + printf("fis list: FIS not found\n"); + return -1; + } + + printf("%-16s %-10s %-10s %-10s %-10s %-s\n", + "Name", "FLASH addr", "Mem addr", + "Datalen", "Length", "Entry point" ); + + last = 0; + do { + found = -1; + lowest = 0xFFFFFFFF; + + /* now do the proper read (with swapping if needed */ + for (i = 0, ptr = fis; i < slots; i++, ptr++) { + + if (ptr->name[0] == 0xFF) + break; + + if (swapped) + flash_base = swab32(ptr->flash_base); + else + flash_base = ptr->flash_base; + + if (flash_base > last && flash_base < lowest) { + lowest = flash_base; + found = i; + } + } + + if (found >= 0) { + ptr = fis; + memcpy(&fis_buf, &ptr[found], + sizeof(struct fis_image_desc)); + if (swapped) { + /* The unsigned long fields were written + * with the wrong byte sex, name and pad + * have no byte sex. + */ + swab32s(&fis_buf.flash_base); + swab32s(&fis_buf.mem_base); + swab32s(&fis_buf.size); + swab32s(&fis_buf.entry_point); + swab32s(&fis_buf.data_length); + swab32s(&fis_buf.desc_cksum); + swab32s(&fis_buf.file_cksum); + } + + printf("%-16s 0x%08lX 0x%08lX 0x%08lX " + "0x%08lX 0x%08lX\n", + fis_buf.name, + (unsigned long)fis_buf.flash_base, + fis_buf.mem_base, + fis_buf.data_length, fis_buf.size, + (unsigned long)fis_buf.entry_point); + } + last = lowest; + } while (found >= 0); + + return 0; +} + +int redboot_fis_setenv(flash_info_t *info, void *fis, const char *name, + const char *what, char *var) +{ + static struct fis_image_desc fis_buf; /* static; save stack space */ + static char varbuf[12]; + int i; + + i = redboot_fis_entry_lookup(info, fis, &fis_buf, name); + if (i != 0) + return -1; + + if (strcmp(what, "flash_base") == 0) + sprintf(varbuf, "0x%x", fis_buf.flash_base); + else if (strcmp(what, "mem_base") == 0) + sprintf(varbuf, "0x%x", fis_buf.mem_base); + else if (strcmp(what, "size") == 0) + sprintf(varbuf, "0x%x", fis_buf.size); + else if (strcmp(what, "entry_point") == 0) + sprintf(varbuf, "0x%x", fis_buf.entry_point); + else if (strcmp(what, "data_length") == 0) + sprintf(varbuf, "0x%x", fis_buf.data_length); + else + return -1; + + setenv(var, varbuf); + + return 0; +} + +/*************************************************************************/ + +#define CONFIG_KEY1 0x0badface +#define CONFIG_KEY2 0xdeaddead + +/* + * Layout of config data + * Each data item is variable length, with the name, type and dependencies + * encoded into the object. + * offset contents + * 0 data type + * 1 length of name (N) + * 2 enable sense + * 3 length of enable key (M) + * 4 key name + * N+4 enable key + * M+N+4 data value + */ + +#define TYPE(dp) ((dp)[0]) +#define KEYLEN(dp) ((dp)[1]) +#define ENABLE_SENSE(dp) ((dp)[2]) +#define ENABLE_KEYLEN(dp) ((dp)[3]) +#define KEY(dp) ((dp)+4) +#define ENABLE_KEY(dp) ((dp)+4+KEYLEN(dp)) +#define VALUE(dp) ((dp)+4+KEYLEN(dp)+ENABLE_KEYLEN(dp)) + +void *get_config(flash_info_t *info, void *fis, int *sizep, int *swappedp) +{ + static struct fis_image_desc fis_buf; /* static; save stack space */ + int i; + ulong base, size; + void *config; + u32 *ps, *pe; + + /* lookup the RedBoot config */ + i = redboot_fis_entry_lookup(info, fis, &fis_buf, "RedBoot config"); + if (i != 0) + return NULL; + + base = fis_buf.flash_base; + size = fis_buf.data_length; + + config = (void *)base; + + /* verify */ + ps = (u32 *)base; + if (ps[1] != CONFIG_KEY1 && ps[1] != swab32(CONFIG_KEY1)) + return NULL; + + if (ps[1] == CONFIG_KEY1) { + *swappedp = 0; + if (ps[0] != size) + return NULL; + pe = (u32 *)(base + ps[0]); + if (pe[-2] != CONFIG_KEY2) + return NULL; + } else { + *swappedp = 1; + if (swab32(ps[0]) != size) + return NULL; + pe = (u32 *)(base + swab32(ps[0])); + if (pe[-2] != swab32(CONFIG_KEY2)) + return NULL; + } + + *sizep = size; + return config; +} + +#define CONFIG_EMPTY 0 +#define CONFIG_BOOL 1 +#define CONFIG_INT 2 +#define CONFIG_STRING 3 +#define CONFIG_SCRIPT 4 +#define CONFIG_IP 5 +#define CONFIG_ESA 6 +#define CONFIG_NETPORT 7 + +static const int config_len_tab[] = { + [CONFIG_EMPTY] = 0, + [CONFIG_BOOL] = 4, + [CONFIG_INT] = 4, + [CONFIG_STRING] = CONFIG_REDBOOT_FLASH_STRING_SIZE, + [CONFIG_SCRIPT] = CONFIG_REDBOOT_FLASH_SCRIPT_SIZE, + [CONFIG_IP] = 4, + [CONFIG_ESA] = 8, + [CONFIG_NETPORT]= CONFIG_REDBOOT_FLASH_STRING_SIZE, +}; + +static const char *config_txt_tab[] = { + [CONFIG_EMPTY] = "", + [CONFIG_BOOL] = "bool", + [CONFIG_INT] = "int", + [CONFIG_STRING] = "string", + [CONFIG_SCRIPT] = "script", + [CONFIG_IP] = "ip", + [CONFIG_ESA] = "esa", + [CONFIG_NETPORT]= "netport", +}; + +static inline int config_length(int type) +{ + if ((unsigned int)type >= + sizeof(config_len_tab)/sizeof(config_len_tab[0])) + return -1; + return config_len_tab[type]; +} + +static const char *config_format_value(int type, const char *value, + char *small_buf, int swapped) +{ + int val; + unsigned int uval; + const char *fmt; + + switch (type) { + case CONFIG_BOOL: + val = *(int *)value; + if (swapped) + val = swab32(val); + fmt = val ? "true" : "false"; + break; + case CONFIG_INT: + val = *(int *)value; + if (swapped) + val = swab32(val); + sprintf(small_buf, "%d", val); + fmt = small_buf; + break; + case CONFIG_STRING: + fmt = value; + break; + case CONFIG_SCRIPT: + fmt = value; + break; + case CONFIG_IP: + uval = *(unsigned int *)value; + if (swapped) + uval = swab32(uval); + sprintf(small_buf, "%u.%u.%u.%u", + (uval >> 24) & 0xff, (uval >> 16) & 0xff, + (uval >> 8) & 0xff, uval & 0xff); + fmt = small_buf; + break; + case CONFIG_ESA: + sprintf(small_buf, "%02x:%02x:%02x:%02x:%02x:%02x", + value[0] & 0xff, value[1] & 0xff, + value[2] & 0xff, value[3] & 0xff, + value[4] & 0xff, value[5] & 0xff); + fmt = small_buf; + break; + case CONFIG_NETPORT: + fmt = value; + break; + + default: + fmt = ""; /* empty */ + break; + } + + return fmt; +} + +int redboot_config_printenv(flash_info_t *info, void *fis, + char *small_buf, const char *what) +{ + int size, cfglen, len, printit, swapped; + void *config; + char *dp, *dpe; + + if (small_buf == NULL) + return -1; + + config = get_config(info, fis, &size, &swapped); + if (config == NULL) + return -1; + + /* point to the config data */ + dp = config + 8; + dpe = config + size - 8; + + for (; dp < dpe; dp += len) { + + cfglen = config_length(TYPE(dp)); + if (cfglen < 0) /* illegal type */ + return -1; + + len = 4 + KEYLEN(dp) + ENABLE_KEYLEN(dp) + cfglen; + + /* don't bother with the empty */ + if (TYPE(dp) == CONFIG_EMPTY) + continue; + + /* printf("%p: %02x %02x %02x %02x\n", + dp, (int)dp[0] & 0xff, (int)dp[1] & 0xff, + (int)dp[2] & 0xff, (int)dp[3] & 0xff); */ + + printit = what == NULL || + (what != NULL && strcmp(what, KEY(dp)) == 0); + + if (printit) { + printf("%s=%s\n", KEY(dp), + config_format_value(TYPE(dp), + VALUE(dp), small_buf, swapped)); + printf("\ttype=%s", config_txt_tab[(int)TYPE(dp)]); + printf(" enable-sense=%s", + ENABLE_SENSE(dp) ? "true" : "false"); + if (ENABLE_KEYLEN(dp) > 0) + printf(" enable-key=%s", ENABLE_KEY(dp)); + printf("\n"); + + if (what) + break; + } + } + + return 0; +} + +const char *redboot_config_getenv(flash_info_t *info, void *fis, + char *small_buf, const char *what, const char *special) +{ + int size, cfglen, len, swapped; + void *config; + char *dp, *dpe; + + /* this time we need that */ + if (what == NULL || small_buf == NULL) + return NULL; + + config = get_config(info, fis, &size, &swapped); + if (config == NULL) + return NULL; + + /* point to the config data */ + dp = config + 8; + dpe = config + size - 8; + + for (; dp < dpe; dp += len) { + + cfglen = config_length(TYPE(dp)); + if (cfglen < 0) /* illegal type */ + return NULL; + + len = 4 + KEYLEN(dp) + ENABLE_KEYLEN(dp) + cfglen; + + /* don't bother with the empty */ + if (TYPE(dp) == CONFIG_EMPTY) + continue; + + if (strcmp(what, KEY(dp)) == 0) { + + /* return value */ + if (special == NULL || strcmp(special, "value") == 0) + return config_format_value(TYPE(dp), VALUE(dp), + small_buf, swapped); + + if (strcmp(special, "type") == 0) + return config_txt_tab[(int)TYPE(dp)]; + + if (strcmp(special, "enable-sense") == 0) + return ENABLE_SENSE(dp) ? "true" : "false"; + + if (strcmp(special, "enable-key") == 0) + return ENABLE_KEY(dp); + } + } + + return NULL; +} + +int redboot_config_setenv(flash_info_t *info, void *fis, + const char *var, const char *what, const char *special) +{ + static char small_buf[18]; + const char *value; + + value = redboot_config_getenv(info, fis, small_buf, what, special); + if (!value) + return -1; + + setenv((char *)var, (char *)value); + + return 0; +} + +/*************************************************************/ + +#ifdef CONFIG_PPC + +/* Note: Only tested on a PPC board - other arches + * should be made to work with not much trouble + * + * The way this works is: we do pretty much what + * we do for a bootm case of a uImage (even creating + * the u-boot's idea of bd_t). And then we call + * board specific code to fix the mess. + */ + +static void __attribute__((noinline)) +redboot_linux_exec(ulong addr, ulong ramdisk_address, ulong ramdisk_length) +{ + ulong sp; + ulong initrd_start, initrd_end; + ulong cmd_start, cmd_end; + char *cmdline; + char *s; + bd_t *kbd; + + initrd_start = ramdisk_address; + initrd_end = ramdisk_address + ramdisk_length; + + /* + * Booting a (Linux) kernel image + * + * Allocate space for command line and board info - the + * address should be as high as possible within the reach of + * the kernel (see CFG_BOOTMAPSZ settings), but in unused + * memory, which means far enough below the current stack + * pointer. + */ + + /* point stack at the end of memory */ + /* redboot is different that u-boot in that regard */ + sp = (gd->bd->bi_memstart + gd->bd->bi_memsize) - 16; + sp &= ~0x0f; + + debug ("## Current stack ends at 0x%08lX ", sp); + + sp -= 2048; /* just to be sure */ + + debug ("=> set upper limit to 0x%08lX\n", sp); + + cmdline = (char *)((sp - CFG_BARGSIZE) & ~0xF); + kbd = (bd_t *)(((ulong)cmdline - CONFIG_REDBOOT_BD_T_SIZE) & ~0xF); + + if ((s = getenv("bootargs")) != NULL) { + + strcpy (cmdline, s); + + cmd_start = (ulong)&cmdline[0]; + cmd_end = cmd_start + strlen(cmdline); + } else { + cmd_start = 0; + cmd_end = 0; + } + + *kbd = *(gd->bd); + + if ((s = getenv("clocks_in_mhz")) != NULL) { + /* convert all clock information to MHz */ + kbd->bi_intfreq /= 1000000L; + kbd->bi_busfreq /= 1000000L; +#if defined(CONFIG_MPC8220) + kbd->bi_inpfreq /= 1000000L; + kbd->bi_pcifreq /= 1000000L; + kbd->bi_pevfreq /= 1000000L; + kbd->bi_flbfreq /= 1000000L; + kbd->bi_vcofreq /= 1000000L; +#endif +#if defined(CONFIG_CPM2) + kbd->bi_cpmfreq /= 1000000L; + kbd->bi_brgfreq /= 1000000L; + kbd->bi_sccfreq /= 1000000L; + kbd->bi_vco /= 1000000L; +#endif +#if defined(CONFIG_MPC5xxx) + kbd->bi_ipbfreq /= 1000000L; + kbd->bi_pcifreq /= 1000000L; +#endif /* CONFIG_MPC5xxx */ + } + + /* convert u-boot bd_t to redboot_bd_t in place */ + board_redboot_bd_t_adapt(kbd, cmd_start, cmd_end, + initrd_start, initrd_end); + + debug ("## Transferring control to Linux (at address %08lx) ...\n", + (ulong)kernel); + + SHOW_BOOT_PROGRESS (15); + +#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500) + unlock_ram_in_cache(); +#endif + dcache_disable(); + icache_disable(); + disable_interrupts(); + + /* Call into Linux */ + __asm__ volatile ( + /* Start by disabling MMU - the mappings are */ + /* 1-1 so this should not cause any problems */ + "mfmsr 3\n" + "li 4,0xFFFFFFCF\n" + "and 3,3,4\n" + "sync\n" + "mtmsr 3\n" + "sync\n" + + /* Now set up parameters to jump into linux */ + + "mtlr %0\n" /* set entry address in LR */ + "mr 1,%1\n" /* set stack pointer */ + "mr 3,%2\n" /* set board info in R3 */ + "mr 4,%3\n" /* set command line in R4 */ + "blr \n" /* jump into linux */ + : + : "r"(addr), "r"(sp), "r"(kbd), "r"(cmd_start) + : "r3", "r4"); + + /* never reached */ +} +#endif /* CONFIG_PPC */ + +extern flash_info_t flash_info[]; /* info for FLASH chips */ + +int do_redboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int i, j; + char *name, *var; + static int bank = 1; + static int dir_block = -1; /* defaults */ + void *fis; + static char small_buf[18]; + const char *value; + + if (argc < 2) + goto usage; + + if (strcmp(argv[1], "fis") == 0) { + + if (argc < 3) + goto usage; + + if (strcmp(argv[2], "select") == 0) { + + i = bank; + j = dir_block; + + if (argc == 3 || strcmp(argv[3], "show") == 0) { + ; /* nothing */ + } else if (argc >= 4 && strcmp(argv[3], "reset") == 0) { + i = 1; + j = -1; + } else { + if (argc >= 4) + i = simple_strtoul(argv[3], NULL, 16); + if (argc >= 5) + j = simple_strtol(argv[4], NULL, 16); + } + + fis = redboot_fis_get(i, j, NULL); + if (fis == NULL) { + printf("Illegal selection:" + " bank %ld, dir_block # %ld\n", + i, j); + return 1; + } + + printf("bank #%ld, dir-block #%ld:" + " RedBoot FIS @%p\n", + bank, dir_block, fis); + bank = i; + dir_block = j; + return 0; + } + + if (strcmp(argv[2], "list") == 0) { + + fis = redboot_fis_get(bank, dir_block, NULL); + if (fis == NULL) { + printf("Illegal selection:" + " bank %ld, dir_block # %ld\n", + bank, dir_block); + return 1; + } + + printf("\nbank #%ld, dir-block #%ld:" + " RedBoot FIS @%p\n", bank, dir_block, + fis); + + redboot_fis_list(&flash_info[bank-1], fis); + + return 0; + } + + if (strcmp(argv[2], "setenv") == 0) { + + if (argc < 6) + goto usage; + + var = argv[3]; + name = argv[5]; + + fis = redboot_fis_get(bank, dir_block, NULL); + if (fis == NULL) { + printf("Illegal selection:" + " bank %ld, dir_block # %ld\n", + bank, dir_block); + return 1; + } + + i = redboot_fis_setenv(&flash_info[bank-1], fis, name, + argv[4], var); + if (i != 0) { + printf("Unable to set var '%s' from '%s'\n", + argv[4], name); + return 1; + } + + return 0; + } + } + + if (strcmp(argv[1], "config") == 0) { + + if (argc < 3) + goto usage; + + fis = redboot_fis_get(bank, dir_block, NULL); + if (fis == NULL) { + printf("Illegal selection:" + " bank %ld, dir_block # %ld\n", + bank, dir_block); + return 1; + } + + if (strcmp(argv[2], "printenv") == 0) { + + if (argc >= 5) { + value = redboot_config_getenv( + &flash_info[bank-1], + fis, small_buf, + argv[3], argv[4]); + if (value) + printf("%s=%s\n", argv[3], value); + } else + redboot_config_printenv( + &flash_info[bank-1], + fis, small_buf, + argc >= 4 ? argv[3] : NULL); + + return 0; + } + + if (strcmp(argv[2], "setenv") == 0) { + + if (argc < 5) + goto usage; + + i = redboot_config_setenv(&flash_info[bank-1], fis, + argv[3], argv[4], argc >= 6 ? argv[5] : NULL); + if (i != 0) { + printf("Failed to set variable\n"); + return 1; + } + + return 0; + } + } + +#ifdef CONFIG_PPC + if (strcmp(argv[1], "exec") == 0) { + ulong addr, ramdisk_start, ramdisk_length; + + addr = 0; + ramdisk_start = 0; + ramdisk_length = 0; + + if (argc >= 3) + addr = simple_strtoul(argv[2], NULL, 16); + else if ((value = getenv("loadaddr")) != NULL) + addr = simple_strtoul(value, NULL, 16); + else if ((value = getenv("redboot_kernel_address")) != NULL) + addr = simple_strtoul(value, NULL, 16); + else { + printf("Kernel address not found\n"); + goto usage; + } + + if ((value = getenv("redboot_ramdisk_address")) != NULL) + ramdisk_start = simple_strtoul(value, NULL, 16); + + if ((value = getenv("redboot_ramdisk_length")) != NULL) + ramdisk_length = simple_strtoul(value, NULL, 16); + + redboot_linux_exec(addr, ramdisk_start, ramdisk_length); + } + +#endif + +usage: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; +} + + +U_BOOT_CMD( + redboot, 6, 1, do_redboot, + "redboot - redboot support commands\n", + "select ([bank] [sector] | reset)\n" + " - Select FIS\n" + "redboot fis list\n" + " - List FIS\n" + "redboot fis setenv var type name\n" + " - Set variable var to the type variable of the image\n" + " type: flash_base, mem_base, size, entry_point, data_length\n" + "redboot config printenv [cfgvar] [member]\n" + " - Print Redboot config key(s) of [member] of [cfgvar]\n" + "redboot config setenv var cfgvar [member]\n" + " - Print Redboot config key(s) of [member] of cfgvar\n" +#ifdef CONFIG_PPC + "redboot exec [address]\n" + " - Boot a Linux kernel compiled for redboot\n" +#endif + "" /* last empty string */ +); + +#endif + diff --git a/include/redboot.h b/include/redboot.h new file mode 100644 index 0000000..620fe86 --- /dev/null +++ b/include/redboot.h @@ -0,0 +1,98 @@ +/* + * (C) Copyright 2006 - Embedded Alley Solutions Inc. + * by Pantelis Antoniou, pantelis@embeddedalley.com + * + * Based on Linux & RedBoot code fragments + * by David Woodhouse, dwmw2@infradead.org + * by Mark Sattler, msalter@redhat.com + * by Gary Thomas, gthomas@redhat.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef REDBOOT_H +#define REDBOOT_H + +#include <common.h> +#include <flash.h> + +struct fis_image_desc { + u8 name[16]; /* Null terminated name */ + u32 flash_base; /* Address within FLASH of image */ + u32 mem_base; /* Address in memory where it executes */ + u32 size; /* Length of image */ + u32 entry_point; /* Execution entry point */ + u32 data_length; /* Length of actual data */ + u8 _pad[256-(16+7*sizeof(u32))]; + u32 desc_cksum; /* Checksum over image descriptor */ + u32 file_cksum; /* Checksum over image data */ +}; + +/* + * redboot config is stored like this + * note that we don't define it, since we can work + * without having a fixed size config + * + * struct redboot_config { + * u32 len; + * u32 key1; + * char config_data[MAX_CONFIG_DATA-(4*4)]; + * u32 key2; + * u32 long cksum; + * }; + * + */ + +/* defaults */ +#ifndef CONFIG_REDBOOT_FIS_DIRECTORY_BLOCK +#define CONFIG_REDBOOT_FIS_DIRECTORY_BLOCK -1 /* last block */ +#endif + +#ifndef CONFIG_REDBOOT_DIRECTORY_ENTRY_SIZE +#define CONFIG_REDBOOT_DIRECTORY_ENTRY_SIZE 0x100 /* default */ +#endif + +#ifndef CONFIG_REDBOOT_FLASH_SCRIPT_SIZE +#define CONFIG_REDBOOT_FLASH_SCRIPT_SIZE 256 +#endif + +#ifndef CONFIG_REDBOOT_FLASH_STRING_SIZE +#define CONFIG_REDBOOT_FLASH_STRING_SIZE 128 +#endif + +#ifndef CONFIG_REDBOOT_FLASH_CONFIG_SIZE +#define CONFIG_REDBOOT_FLASH_CONFIG_SIZE 4096 +#endif + +void *redboot_fis_get(int bank, int dir_block, flash_info_t **infop); +int redboot_fis_list(flash_info_t *info, void *fis); +int redboot_fis_entry_lookup(flash_info_t *info, void *fis, + struct fis_image_desc *fis_buf, const char *name); +int redboot_fis_setenv(flash_info_t *info, void *fis, + const char *name, const char *what, char *var); + +int redboot_config_printenv(flash_info_t *info, void *fis, + char *small_buf, const char *what); +const char *redboot_config_getenv(flash_info_t *info, void *fis, + char *small_buf, const char *what, const char *special); +int redboot_config_setenv(flash_info_t *info, void *fis, + const char *var, const char *what, const char *special); + +#endif

Add support for Analogue Micro's ASP8347DB board. The board is originally shipped with RedBoot. All appropriate settings are migrated to u-boot & the old kernel booted; a drop in bootloader replacement.

--- Signed-off-by: Pantelis Antoniou pantelis@embeddedalley.com ---

MAKEALL | 3 Makefile | 3 board/asp8347db/Makefile | 52 ++++++ board/asp8347db/asp8347db.c | 371 +++++++++++++++++++++++++++++++++++++++++++ board/asp8347db/config.mk | 23 +++ board/asp8347db/fpga.c | 240 ++++++++++++++++++++++++++++ board/asp8347db/pci.c | 222 ++++++++++++++++++++++++++ board/asp8347db/u-boot.lds | 122 ++++++++++++++ include/status_led.h | 2 9 files changed, 1037 insertions(+), 1 deletions(-)

diff --git a/MAKEALL b/MAKEALL index 74bf383..82ade78 100755 --- a/MAKEALL +++ b/MAKEALL @@ -130,7 +130,8 @@ LIST_8260=" \ #########################################################################

LIST_83xx=" \ - TQM834x MPC8349EMDS MPC8349ITX MPC8360EMDS \ + ASP8347DB TQM834x MPC8349EMDS MPC8349ITX \ + MPC8360EMDS \ "

diff --git a/Makefile b/Makefile index d2534ab..4e5a78d 100644 --- a/Makefile +++ b/Makefile @@ -1588,6 +1588,9 @@ r5200_config : unconfig ## MPC83xx Systems #########################################################################

+ASP8347DB_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc mpc83xx asp8347db + TQM834x_config: unconfig @$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x

diff --git a/board/asp8347db/Makefile b/board/asp8347db/Makefile new file mode 100644 index 0000000..a865a9b --- /dev/null +++ b/board/asp8347db/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# Copyright 2004 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o fpga.o pci.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/asp8347db/asp8347db.c b/board/asp8347db/asp8347db.c new file mode 100644 index 0000000..10551d3 --- /dev/null +++ b/board/asp8347db/asp8347db.c @@ -0,0 +1,371 @@ +/* + * (C) Copyright 2006 + * Pantelis Antoniou, Embedded Alley, pantelis@embeddedalley.com + * + * Based on tqm384x.c by + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#define DEBUG + +#include <common.h> +#include <ioports.h> +#include <mpc83xx.h> +#include <asm/mpc8349_pci.h> +#include <i2c.h> +#include <spd.h> +#include <miiphy.h> +#include <asm-ppc/mmu.h> +#include <pci.h> + +#ifdef CONFIG_REDBOOT +#include <redboot.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +#define IOSYNC asm("eieio") +#define ISYNC asm("isync") +#define SYNC asm("sync") +#define FPW FLASH_PORT_WIDTH +#define FPWV FLASH_PORT_WIDTHV + +#define DDR_MAX_SIZE_PER_CS 0x20000000 + +#define TIMING_CASLAT TIMING_CFG1_CASLAT_25 +#define MODE_CASLAT DDR_MODE_CASLAT_25 + +#define INITIAL_CS_CONFIG (CSCONFIG_EN | CSCONFIG_ROW_BIT_12 | \ + CSCONFIG_COL_BIT_9) + +/* External definitions */ +ulong flash_get_size (ulong base, int banknum); +extern flash_info_t flash_info[]; + +/* Local variable */ +static volatile immap_t *im = (immap_t *)CFG_IMMR; + +/************************************************************************** + * Board initialzation after relocation to RAM. Used to detect the number + * of Flash banks on TQM834x. + */ +int board_early_init_r (void) +{ + /* sanity check, IMMARBAR should be mirrored at offset zero of IMMR */ + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) + return 0; + + /* setup GPIO ports */ + im->pgio[0].dat = 0xc5f00000; + im->pgio[0].odr = 0; + im->pgio[0].dir = 0x3a700000; + im->pgio[0].imr = 0; + im->pgio[0].icr = 0; + + im->pgio[1].dat = 0x00001000; + im->pgio[1].odr = 0; + im->pgio[1].dir = 0x00003000; + im->pgio[1].imr = 0; + im->pgio[1].icr = 0; + + /* turn on all LEDS */ + im->pgio[0].dat |= LED_ALL; + im->pgio[0].odr &= ~LED_ALL; + im->pgio[0].dir |= LED_ALL; + + /* reset & enable ethernet */ + udelay(100); + im->pgio[1].dat = (im->pgio[1].dat & ~ETH_RST) | ETH_EN; + udelay(100); + im->pgio[1].dat |= ETH_RST; + udelay(100); + im->pgio[1].dat &= ~ETH_EN; + udelay(100); + + /* reset PHYs */ + im->pgio[1].dat |= PHY1_RST | PHY2_RST; + udelay(250); + im->pgio[1].dat &= ~(PHY1_RST | PHY2_RST); + udelay(250); + + /* turn off all leds */ + im->pgio[0].dat &= ~LED_ALL; + + return 0; +} + +/************************************************************************** + * DRAM initalization and size detection + */ +long int initdram (int board_type) +{ + long size, known_size; + + /* 128MB */ + known_size = 128 << 20; + + im->sysconf.ddrlaw[0].bar = 0; + im->sysconf.ddrlaw[0].ar = 0; + + /* 128M */ + im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE; + im->sysconf.ddrlaw[0].ar = LAWAR_EN | LAWAR_SIZE_128M; + im->sysconf.ddrlaw[1].bar = 0; + im->sysconf.ddrlaw[1].ar = 0; + + /* set CS bounds to 128M */ + im->ddr.sdram_cfg = 0x02000000; + im->ddr.csbnds[0].csbnds = 0x00000007; + im->ddr.csbnds[1].csbnds = 0; + im->ddr.csbnds[2].csbnds = 0; + im->ddr.csbnds[3].csbnds = 0; + im->ddr.cs_config[0] = 0x80800101; + im->ddr.cs_config[1] = 0; + im->ddr.cs_config[2] = 0; + im->ddr.cs_config[3] = 0; + im->ddr.timing_cfg_1 = 0x36332321; + im->ddr.timing_cfg_2 = 0x02000400; + im->ddr.sdram_cfg = 0x02000000; + im->ddr.sdram_mode = 0x00000062; + SYNC; + + im->ddr.sdram_interval = 0x03e80000; + im->ddr.sdram_clk_cntl = 0x81000000; + SYNC; + + /* the errata workaround from TQM does not work */ + /* I don't really know why, */ + + udelay(200); + + im->ddr.sdram_cfg = 0xc2000000; + SYNC; + + udelay(1000); + + /* size detection */ + debug("\n"); + size = get_ram_size(CFG_DDR_BASE, known_size); + if (size != known_size) + debug("Detected other size than what expected!\n"); + + return size; +} + +/************************************************************************** + * checkboard() + */ +int checkboard (void) +{ + puts("Board: ASP8347DB\n"); + +#ifdef CONFIG_PCI + volatile immap_t * immr; + u32 w, f; + + immr = (immap_t *)CFG_IMMR; + if (!(immr->reset.rcwh & RCWH_PCIHOST)) { + printf("PCI: NOT in host mode..?!\n"); + return 0; + } + + /* get bus width */ + w = 32; + if (immr->reset.rcwh & RCWH_PCI64) + w = 64; + + /* get clock */ + f = gd->pci_clk; + + printf("PCI1: %d bit, %d MHz\n", w, f / 1000000); +#else + printf("PCI: disabled\n"); +#endif + return 0; +} + +/* in fpga.c */ +extern int asp8347db_init_fpga(void); +extern int asp8347db_autoload_fpga(void); + +/* + * Miscellaneous intialization + */ +int misc_init_r (void) +{ +#ifdef CONFIG_FPGA + asp8347db_init_fpga(); +#endif + return 0; +} + +/* + * Final init hook before entering command loop. + */ +int last_stage_init (void) +{ +#ifdef CONFIG_REDBOOT + const char *s; + void *fis; + flash_info_t *info; + int migrated; + static const char *image_name = "ASP8347DB.FPGA"; + ulong fpga_image_base = 0, fpga_image_size = 0; + ulong redboot_linux_base = 0, redboot_linux_size = 0; + + /* we now migrate settings from redboot */ + /* only we locate the FIS */ + if ((s = getenv("redboot_migrated")) == NULL && *s != 'n' && + (fis = redboot_fis_get(1, -1, &info)) != NULL) { + + migrated = 0; + + printf("REDB.:"); + + /* first snarf the FPGA image location from the FIS */ + if (redboot_fis_setenv(info, fis, image_name, "flash_base", + "fpga_image_base") == 0 && + (s = getenv("fpga_image_base")) != NULL) + fpga_image_base = simple_strtoul(s, NULL, 16); + + if (redboot_fis_setenv(info, fis, image_name, "data_length", + "fpga_image_size") == 0 && + (s = getenv("fpga_image_size")) != NULL) + fpga_image_size = simple_strtoul(s, NULL, 16); + + if (fpga_image_base == 0 || fpga_image_size == 0) { + setenv("fpga_image_base", NULL); + setenv("fpga_image_size", NULL); + } else { + printf(" FPGA"); + migrated += 2; + } + + /* now get the ethernet addresses */ + if (redboot_config_setenv(info, fis, "ethaddr", + "tsec1_esa", NULL) == 0 && + getenv("ethaddr")) { + printf(" TSEC1"); + migrated++; + } + + if (redboot_config_setenv(info, fis, "eth1addr", + "tsec2_esa", NULL) == 0 && + getenv("eth1addr")) { + printf(" TSEC2"); + migrated++; + } + + /* now get the linux image */ + if (redboot_fis_setenv(info, fis, "Linux", "flash_base", + "redboot_linux_base") == 0 && + (s = getenv("redboot_linux_base")) != NULL) + redboot_linux_base = simple_strtoul(s, NULL, 16); + + if (redboot_fis_setenv(info, fis, "Linux", "data_length", + "redboot_linux_size") == 0 && + (s = getenv("redboot_linux_size")) != NULL) + redboot_linux_size = simple_strtoul(s, NULL, 16); + + if (redboot_linux_base == 0 || redboot_linux_size == 0) { + setenv("redboot_linux_base", NULL); + setenv("redboot_linux_size", NULL); + } else { + setenv("bootcmd", "redboot exec ${redboot_linux_base}"); + + printf(" Linux"); + migrated += 2; + } + + if (migrated > 0) { + printf(".\n"); + setenv("redboot_migrated", "y"); + } else { + printf("No variables migrated!\n"); + } + + } +#endif + +#ifdef CONFIG_FPGA + asp8347db_autoload_fpga(); +#endif + return 0; +} + +/* immediate return - no printing from redboot */ +volatile void __attribute__((noinline)) redboot_nothing(void) { } + +void board_redboot_bd_t_adapt(void *kbd, + ulong cmd_start, ulong cmd_end, + ulong initrd_start, ulong initrd_end) +{ + static bd_t ubd; + redboot_bd_t *rbd; + + /* keep u-boot's idea of a bd_t */ + ubd = *(bd_t *)kbd; + + /* point redboot bd at the old uboot space + * we make sure that the area is large enough to hold both + */ + rbd = kbd; + memset(rbd, 0, sizeof(*rbd)); + + /* now fill in redboot bd_t with the proper values */ + rbd->bi_tag = 0x42444944; + rbd->bi_size = sizeof(*rbd); + rbd->bi_revision = 0x0102; + rbd->bi_bdate = 0x04012005; + rbd->bi_memstart = ubd.bi_memstart; + rbd->bi_memsize = ubd.bi_memsize; + rbd->bi_baudrate = ubd.bi_baudrate; + rbd->bi_cmdline = (unsigned char *)cmd_start; + memcpy(rbd->bi_enetaddr, ubd.bi_enetaddr, 6); + memcpy(rbd->bi_esa[0], ubd.bi_enetaddr, 6); +#ifdef CONFIG_HAS_ETH1 + memcpy(rbd->bi_esa[1], ubd.bi_enet1addr, 6); +#endif +#ifdef CONFIG_HAS_ETH2 + memcpy(rbd->bi_esa[2], ubd.bi_enet2addr, 6); +#endif +#ifdef CONFIG_HAS_ETH3 + memcpy(rbd->bi_esa[3], ubd.bi_enet3addr, 6); +#endif + rbd->bi_ramdisk_begin = initrd_start; + rbd->bi_ramdisk_end = initrd_end; + rbd->bi_intfreq = ubd.bi_intfreq; + rbd->bi_busfreq = ubd.bi_busfreq; + rbd->bi_immr = ubd.bi_immrbar; + rbd->bi_flashbase = 0xf0000000; + rbd->bi_flashsize = 0x04000000; + rbd->bi_flashwidth = 16; + + /* I/O functions */ + /* we assume we don't overwrite them */ + /* we are running pretty low & the stack is */ + /* placed at the end of memory */ + rbd->bi_cputc = (void *)redboot_nothing; + rbd->bi_cgetc = (void *)redboot_nothing; + rbd->bi_ctstc = (void *)redboot_nothing; +} + diff --git a/board/asp8347db/config.mk b/board/asp8347db/config.mk new file mode 100644 index 0000000..c3c8574 --- /dev/null +++ b/board/asp8347db/config.mk @@ -0,0 +1,23 @@ +# +# Copyright 2004 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0xf0000000 diff --git a/board/asp8347db/fpga.c b/board/asp8347db/fpga.c new file mode 100644 index 0000000..389ec56 --- /dev/null +++ b/board/asp8347db/fpga.c @@ -0,0 +1,240 @@ +/* + * (C) Copyright 2006 - Embedded Alley Solutions Inc. + * by Pantelis Antoniou, pantelis@embeddedalley.com + * + * Based on board/asp8347db/fpga.c + * (C) Copyright 2002 + * by Rich Ireland, Enterasys Networks, rireland@enterasys.com. + * & Keith Outwater, keith_outwater@mvis.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +/* + * EC FPGA configuration support for the ASP8437DB computer + */ + +#include <common.h> +#include <command.h> +#include <watchdog.h> +#include <flash.h> + +#include <lattice_ec.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if (CONFIG_FPGA) + +#if 0 +#define ASP8437DB_FPGA_DEBUG +#endif + +#ifdef ASP8437DB_FPGA_DEBUG +#define PRINTF(fmt,args...) printf (fmt ,##args) +#else +#define PRINTF(fmt,args...) +#endif + +static void mdelay(int ms) +{ + ulong start = get_timer(0); + ulong delay; + + delay = (ms * CFG_HZ) / 1000; + while (get_timer(start) < delay) { + udelay (1000); + WATCHDOG_RESET(); /* Trigger watchdog, if needed */ + } +} + +int rattler_fpga_loaded = 0; + +/****************************************************************/ + +/* configure */ +static int rattler_pre_fn (int cookie) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + + PRINTF ("%s:%d:\n", __FUNCTION__, __LINE__); + + im->pgio[0].dir &= ~(ECP_TMS | ECP_TCK | ECP_TDI | ECP_TDO | FPGA_RST); + im->pgio[0].dat |= ECP_TMS | ECP_TCK | ECP_TDI | FPGA_RST; + im->pgio[0].dir |= ECP_TMS | ECP_TCK | ECP_TDI | FPGA_RST; + + /* and now reset */ + im->pgio[0].dat |= FPGA_RST; + udelay(1000); + im->pgio[0].dat &= ~FPGA_RST; + + rattler_fpga_loaded = 0; + + return 0; +} + +static int rattler_post_fn (int cookie, int success) +{ + PRINTF ("%s:%d:\n", __FUNCTION__, __LINE__); + + if (!success) + return -1; + + /* FLASH LEDs so we know FPGA is alive */ + *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0x00; /* off */ + mdelay(1000); + *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0x55; /* toggle */ + mdelay(500); + *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0xAA; /* toggle */ + mdelay(500); + *(unsigned long *)(ASP8347DB_FPGA_BASE + 0xC) = 0x00; /* off */ + + rattler_fpga_loaded = 1; + + return 0; +} + +static void rattler_jtag_write_port_fn(int cookie, unsigned int pin, + unsigned int val) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + u32 mask = 0; + + switch (pin) { + case LATTICE_JTAG_TDI: + mask = ECP_TDI; + break; + + case LATTICE_JTAG_TCK: + mask = ECP_TCK; + break; + + case LATTICE_JTAG_TMS: + mask = ECP_TMS; + break; + + case LATTICE_JTAG_RST: + mask = FPGA_RST; + break; + + case LATTICE_JTAG_CE: /* not present */ + break; + + default: + PRINTF("Illegal pin %d\n", pin); + break; + } + + /* not supported */ + if (mask == 0) + return; + + if (val) + im->pgio[0].dat |= mask; + else + im->pgio[0].dat &= ~mask; +} + +static int rattler_jtag_read_port_fn(int cookie) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + + return !!(im->pgio[0].dat & ECP_TDO); +} + +/* Note that these are pointers to code that is in Flash. They will be + * relocated at runtime. + */ +static Lattice_EC_JTAG_fns fpga_fns = { + .pre = rattler_pre_fn, + .post = rattler_post_fn, + .jtag_write_port = rattler_jtag_write_port_fn, + .jtag_read_port = rattler_jtag_read_port_fn, +}; + +Lattice_desc fpga[CONFIG_FPGA_COUNT] = { + { + Lattice_EC, + lattice_jtag_mode, + 65536, /* XXX */ + &fpga_fns, + 0 } +}; + +/* + * Initialize the fpga. Return 1 on success, 0 on failure. + */ +int asp8347db_init_fpga(void) +{ + int i; + + PRINTF ("%s:%d: Initialize FPGA interface" + " (relocation offset = 0x%.8lx)\n", + __FUNCTION__, __LINE__, gd->reloc_off); + fpga_init (gd->reloc_off); + + for (i = 0; i < CONFIG_FPGA_COUNT; i++) { + PRINTF ("%s:%d: Adding fpga %d\n", __FUNCTION__, + __LINE__, i); + fpga_add (fpga_lattice, &fpga[i]); + } + return 1; +} + +extern int lattice_load (Lattice_desc * desc, void *buf, size_t bsize); + +/* + * Autoload the fpga. Return 1 on success, 0 on failure. + */ +int asp8347db_autoload_fpga(void) +{ + char *value; + ulong base = 0, size = 0; + int ret; + + /* disable autoload set? */ + value = getenv("fpga_autoload_disable"); + if (value && *value == 'y') { + printf("FPGA: Autoload disabled; load manually...\n"); + return 0; + } + + if ((value = getenv("fpga_image_base")) != NULL) + base = simple_strtoul(value, NULL, 16); + + if ((value = getenv("fpga_image_size")) != NULL) + size = simple_strtoul(value, NULL, 16); + + if (base == 0 || size == 0) { + PRINTF("FPGA image variables not found\n"); + return -1; + } + + PRINTF("Autoloading FPGA\n"); + + ret = lattice_load(&fpga[0], (void *)base, (size_t)size); + if (ret != 0) + PRINTF("Autoloading FPGA failed with error %d\n", ret); + + return ret; +} + +#endif + +/* vim: set ts=8 tw=78 sw=8: */ diff --git a/board/asp8347db/pci.c b/board/asp8347db/pci.c new file mode 100644 index 0000000..5ecf101 --- /dev/null +++ b/board/asp8347db/pci.c @@ -0,0 +1,222 @@ +/* + * (C) Copyright 2005 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <asm/mmu.h> +#include <common.h> +#include <pci.h> + +#ifdef CONFIG_PCI + +/* System RAM mapped to PCI space */ +#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) + +#ifndef CONFIG_PCI_PNP +static struct pci_config_table pci_tqm834x_config_table[] = { + {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, + PCI_IDSEL_NUMBER, PCI_ANY_ID, + pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, + PCI_ENET0_MEMADDR, + PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER + } + }, + {} +}; +#endif + +static struct pci_controller pci1_hose = { +#ifndef CONFIG_PCI_PNP + config_table:pci_tqm834x_config_table, +#endif +}; + + +/************************************************************************** + * pci_init_board() + * + * NOTICE: MPC8349 internally has two PCI controllers (PCI1 and PCI2) but since + * per ASP8347DB design physical connections to external devices (PCI sockets) + * are routed only to the PCI1 we do not account for the second one - this code + * supports PCI1 module only. Should support for the PCI2 be required in the + * future it needs a separate pci_controller structure (above) and handling - + * please refer to other boards' implementation for dual PCI host controllers, + * for example board/Marvell/db64360/pci.c, pci_init_board() + * + */ +void +pci_init_board(void) +{ + volatile immap_t * immr; + volatile clk83xx_t * clk; + volatile law83xx_t * pci_law; + volatile pot83xx_t * pci_pot; + volatile pcictrl83xx_t * pci_ctrl; + volatile pciconf83xx_t * pci_conf; + u16 reg16; + u32 reg32; + struct pci_controller * hose; + + immr = (immap_t *)CFG_IMMR; + clk = (clk83xx_t *)&immr->clk; + pci_law = immr->sysconf.pcilaw; + pci_pot = immr->ios.pot; + pci_ctrl = immr->pci_ctrl; + pci_conf = immr->pci_conf; + + hose = &pci1_hose; + + /* + * Configure PCI controller and PCI_CLK_OUTPUT + */ + + /* + * WARNING! only PCI_CLK_OUTPUT1 is enabled here as this is the one + * line actually used for clocking all external PCI devices in TQM83xx. + * Enabling other PCI_CLK_OUTPUT lines may lead to board's hang for + * unknown reasons - particularly PCI_CLK_OUTPUT6 and PCI_CLK_OUTPUT7 + * are known to hang the board; this issue is under investigation + * (13 oct 05) + */ + reg32 = OCCR_PCICOE1; +#if 0 + /* enabling all PCI_CLK_OUTPUT lines HANGS the board... */ + reg32 = 0xff000000; +#endif + if (clk->spmr & SPMR_CKID) { + /* PCI Clock is half CONFIG_83XX_CLKIN so need to set up OCCR + * fields accordingly */ + reg32 |= (OCCR_PCI1CR | OCCR_PCI2CR); + + reg32 |= (OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 \ + | OCCR_PCICD3 | OCCR_PCICD4 | OCCR_PCICD5 \ + | OCCR_PCICD6 | OCCR_PCICD7); + } + + clk->occr = reg32; + udelay(2000); + + /* + * Release PCI RST Output signal + */ + pci_ctrl[0].gcr = 0; + udelay(2000); + pci_ctrl[0].gcr = 1; + udelay(2000); + + /* + * Configure PCI Local Access Windows + */ + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_16M; + + /* + * Configure PCI Outbound Translation Windows + */ + + /* PCI1 mem space */ + pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK; + pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[0].pocmr = POCMR_EN | (POCMR_CM_512M & POCMR_CM_MASK); + + /* PCI1 IO space */ + pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK; + pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK; + pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_16M & POCMR_CM_MASK); + + /* + * Configure PCI Inbound Translation Windows + */ + + /* we need RAM mapped to PCI space for the devices to + * access main memory */ + pci_ctrl[0].pitar1 = 0x0; + pci_ctrl[0].pibar1 = 0x0; + pci_ctrl[0].piebar1 = 0x0; + pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | \ + PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | \ + PIWAR_IWS_256M; + + hose->first_busno = 0; + hose->last_busno = 0xff; + + /* PCI memory space */ + pci_set_region(hose->regions + 0, + CFG_PCI1_MEM_BASE, + CFG_PCI1_MEM_PHYS, + CFG_PCI1_MEM_SIZE, + PCI_REGION_MEM); + + /* PCI IO space */ + pci_set_region(hose->regions + 1, + CFG_PCI1_IO_BASE, + CFG_PCI1_IO_PHYS, + CFG_PCI1_IO_SIZE, + PCI_REGION_IO); + + /* System memory space */ + pci_set_region(hose->regions + 2, + CONFIG_PCI_SYS_MEM_BUS, + CONFIG_PCI_SYS_MEM_PHYS, + CONFIG_PCI_SYS_MEM_SIZE, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + hose->region_count = 3; + + pci_setup_indirect(hose, + (CFG_IMMR+0x8300), + (CFG_IMMR+0x8304)); + + pci_register_hose(hose); + + /* + * Write to Command register + */ + reg16 = 0xff; + pci_hose_read_config_word (hose, PCI_BDF(0,0,0), PCI_COMMAND, + &reg16); + reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_COMMAND, + reg16); + + /* + * Clear non-reserved bits in status register. + */ + pci_hose_write_config_word(hose, PCI_BDF(0,0,0), PCI_STATUS, + 0xffff); + pci_hose_write_config_byte(hose, PCI_BDF(0,0,0), PCI_LATENCY_TIMER, + 0x80); + +#ifdef CONFIG_PCI_SCAN_SHOW + printf("PCI: Bus Dev VenId DevId Class Int\n"); +#endif + /* + * Hose scan. + */ + hose->last_busno = pci_hose_scan(hose); +} +#endif /* CONFIG_PCI */ diff --git a/board/asp8347db/u-boot.lds b/board/asp8347db/u-boot.lds new file mode 100644 index 0000000..020cfa6 --- /dev/null +++ b/board/asp8347db/u-boot.lds @@ -0,0 +1,122 @@ +/* + * Copyright 2004 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + cpu/mpc83xx/start.o (.text) + *(.text) + *(.fixup) + *(.got1) + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} +ENTRY(_start) diff --git a/include/status_led.h b/include/status_led.h index db4c60f..52fb233 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -355,6 +355,8 @@ void status_led_set (int led, int state); # define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */ # define STATUS_LED_BOOT 0 /* LED 0 used for boot status */

+#elif defined(CONFIG_ASP8347DB) +/* XXX empty just to avoid the error */ #else # error Status LED configuration missing #endif