[U-Boot-Users] [patch u-boot git 3/3] use correct at91rm9200 register name
This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets.
Signed-off-by: David Brownell dbrownell@users.sourceforge.net --- cpu/arm920t/at91rm9200/lowlevel_init.S | 6 +++--- include/configs/at91rm9200dk.h | 2 +- include/configs/cmc_pu2.h | 2 +- include/configs/csb637.h | 2 +- include/configs/mp2usb.h | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-)
--- u-boot.orig/cpu/arm920t/at91rm9200/lowlevel_init.S 2008-01-14 00:29:44.000000000 -0800 +++ u-boot/cpu/arm920t/at91rm9200/lowlevel_init.S 2008-01-14 00:31:32.000000000 -0800 @@ -46,7 +46,7 @@ #define MC_ASR 0xFFFFFF04 #define MC_AASR 0xFFFFFF08 #define EBI_CFGR 0xFFFFFF64 -#define SMC2_CSR 0xFFFFFF70 +#define SMC_CSR0 0xFFFFFF70
/* clocks */ #define PLLAR 0xFFFFFC28 @@ -146,8 +146,8 @@ SMRDATA: .word MC_AASR_VAL .word EBI_CFGR .word EBI_CFGR_VAL - .word SMC2_CSR - .word SMC2_CSR_VAL + .word SMC_CSR0 + .word SMC_CSR0_VAL .word PLLAR .word PLLAR_VAL .word PLLBR --- u-boot.orig/include/configs/at91rm9200dk.h 2008-01-14 00:35:42.000000000 -0800 +++ u-boot/include/configs/at91rm9200dk.h 2008-01-14 00:36:02.000000000 -0800 @@ -51,7 +51,7 @@ #define MC_ASR_VAL 0x00000000 #define MC_AASR_VAL 0x00000000 #define EBI_CFGR_VAL 0x00000000 -#define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
/* clocks */ #define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ --- u-boot.orig/include/configs/cmc_pu2.h 2008-01-14 00:35:43.000000000 -0800 +++ u-boot/include/configs/cmc_pu2.h 2008-01-14 00:36:05.000000000 -0800 @@ -50,7 +50,7 @@ #define MC_ASR_VAL 0x00000000 #define MC_AASR_VAL 0x00000000 #define EBI_CFGR_VAL 0x00000000 -#define SMC2_CSR_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ +#define SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */
/* clocks */ #define PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */ --- u-boot.orig/include/configs/csb637.h 2008-01-14 00:35:43.000000000 -0800 +++ u-boot/include/configs/csb637.h 2008-01-14 00:36:08.000000000 -0800 @@ -51,7 +51,7 @@ #define MC_ASR_VAL 0x00000000 #define MC_AASR_VAL 0x00000000 #define EBI_CFGR_VAL 0x00000000 -#define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
/* clocks */ #define PLLAR_VAL 0x2031BE01 /* 184.320000 MHz for PCK */ --- u-boot.orig/include/configs/mp2usb.h 2008-01-14 00:35:43.000000000 -0800 +++ u-boot/include/configs/mp2usb.h 2008-01-14 00:36:11.000000000 -0800 @@ -55,7 +55,7 @@ #define MC_ASR_VAL 0x00000000 #define MC_AASR_VAL 0x00000000 #define EBI_CFGR_VAL 0x00000000 -#define SMC2_CSR_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ +#define SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */
/* clocks */ #define PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */
Dear Jean-Christophe,
in message 200801181255.00957.david-b@pacbell.net you wrote:
This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets.
It seems to me that this patch as well as the other two poatches posted by David Brownell on 18 Jan 2008 have not been applied yet:
01/18 David Brownell [U-Boot-Users] [patch u-boot git 1/3] add missing ARM boards to MAKEA 01/18 David Brownell [U-Boot-Users] [patch u-boot git 2/3] better ARM9 compiler options 01/18 David Brownell [U-Boot-Users] [patch u-boot git 3/3] use correct at91rm9200 register
Could you please check?
Best regards,
Wolfgang Denk
On 12:55 Fri 18 Jan , David Brownell wrote:
This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets.
Signed-off-by: David Brownell dbrownell@users.sourceforge.net
You missed m501sk board.
Applied
Best Regards, J.
This fixes a naming bug for at91rm9200 lowlevel init code: NOR boot flash is on chipselect 0, not chipselect 2. This makes code use the register name from chip datasheets.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
diff --git a/board/m501sk/memsetup.S b/board/m501sk/memsetup.S index 9e174b5..6aea723 100644 --- a/board/m501sk/memsetup.S +++ b/board/m501sk/memsetup.S @@ -52,8 +52,8 @@ #define MC_AASR_VAL 0x00000000 #define EBI_CFGR 0xFFFFFF64 #define EBI_CFGR_VAL 0x00000000 -#define SMC2_CSR 0xFFFFFF70 -#define SMC2_CSR_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define SMC_CSR0 0xFFFFFF70 +#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
/* clocks */ #define PLLAR 0xFFFFFC28 @@ -141,8 +141,8 @@ SMRDATA: .word MC_AASR_VAL .word EBI_CFGR .word EBI_CFGR_VAL - .word SMC2_CSR - .word SMC2_CSR_VAL + .word SMC_CSR0 + .word SMC_CSR0_VAL .word PLLAR .word PLLAR_VAL .word PLLBR
participants (3)
-
David Brownell -
Jean-Christophe PLAGNIOL-VILLARD -
Wolfgang Denk