My bad. Please ignore the two patches 1/2 and 2/2.

Regards, Peng.

On Mon, Aug 31, 2015 at 11:15:16AM +0800, Peng Fan wrote:

From: Nitin Garg nitin.garg@freescale.com

Under very rare timing circumstances, transition into streaming mode might create a data corruption. Exists on all Cortex-A9 revisions.

Signed-off-by: Peng Fan Peng.Fan@freescale.com Signed-off-by: Nitin Garg nitin.garg@freescale.com Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Albert Aribaud albert.u.boot@aribaud.net

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Original patch: http://lists.denx.de/pipermail/u-boot/2015-April/209724.html

README | 1 + arch/arm/cpu/armv7/start.S | 5 +++++ 2 files changed, 6 insertions(+)

diff --git a/README b/README index a52ff46..7da9415 100644 --- a/README +++ b/README @@ -683,6 +683,7 @@ The following options need to be configured: CONFIG_ARM_ERRATA_751472 CONFIG_ARM_ERRATA_794072 CONFIG_ARM_ERRATA_761320

• CONFIG_ARM_ERRATA_845369
  
  

  If set, the workarounds for these ARM errata are applied early during U-Boot startup. Note that these options force the

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index b180944..0c4fe61 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -163,6 +163,11 @@ ENTRY(cpu_init_cp15) orr r0, r0, #1 << 21 @ set bit #21 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register #endif +#ifdef CONFIG_ARM_ERRATA_845369

• mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
• orr r0, r0, #1 << 22 @ set bit #22
• mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register

+#endif

mov r5, lr @ Store my Caller mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR) -- 1.8.4

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