[U-Boot] [PATCH 00/16] Syncup DTS files with mainline Linux kernel

Upstreaming and reviewing of more zynqmp boards pointed to some issues which should be fixed also in u-boot. This patchset is synchronizing things which were reviewed.
Thanks, Michal
Michal Simek (15): arm64: zynqmp: Sync alignment with mainline arm64: zynqmp: Use maxim prefix for all maxim chips arm64: zynqmp: Use i2c-mux instead of i2cswitch instead arm64: zynqmp: Sync up license with mainline kernel arm64: zynqmp: Remove additional comments from dts files arm64: zynqmp: Use keycode from input/input.h arm64: zynqmp: Use s/_/-/g in node name for zcu102 rev1.0 arm64: zynqmp: Fix spi flash partition definition for zc1751 dc2 arm64: zynqmp: Use atmel prefix instead of at arm64: zynqmp: Add eeprom reference to eeprom nodes arm64: zynqmp: Enable ttcs for zc1751 dc5 arm64: zynqmp: Remove u-boot commands from dts files arm64: zynqmp: Remove number from clock-generator node name arm64: zynqmp: Add silabs prefix to u69 for zcu102 arm64: zynqmp: Remove double spaces from dts file
Srinivas Goud (1): arm64: zynqmp: Update sd properties for dc5
arch/arm/dts/zynqmp-clk-ccf.dtsi | 3 +- arch/arm/dts/zynqmp-clk.dtsi | 5 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 11 ++-- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 22 +++---- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 25 +++++-- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 15 ++--- arch/arm/dts/zynqmp-zcu102-revA.dts | 109 +++++++++++++------------------ arch/arm/dts/zynqmp-zcu102-revB.dts | 11 ++-- arch/arm/dts/zynqmp.dtsi | 25 ++++--- 10 files changed, 110 insertions(+), 122 deletions(-)

Sync pcie and lpd_dma nodes with mainline version. Incorrect locations are causing diff in statistics that's why synchronizations are needed.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 5bdab6116451..e71399f83d27 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -547,10 +547,10 @@ lpd_dma_chan1: dma@ffa80000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffa80000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 77 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x868>; @@ -560,10 +560,10 @@ lpd_dma_chan2: dma@ffa90000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffa90000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 78 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x869>; @@ -573,10 +573,10 @@ lpd_dma_chan3: dma@ffaa0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffaa0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 79 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x86a>; @@ -586,10 +586,10 @@ lpd_dma_chan4: dma@ffab0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffab0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 80 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x86b>; @@ -599,10 +599,10 @@ lpd_dma_chan5: dma@ffac0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffac0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 81 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x86c>; @@ -612,10 +612,10 @@ lpd_dma_chan6: dma@ffad0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffad0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 82 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x86d>; @@ -625,10 +625,10 @@ lpd_dma_chan7: dma@ffae0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffae0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 83 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x86e>; @@ -638,10 +638,10 @@ lpd_dma_chan8: dma@ffaf0000 { status = "disabled"; compatible = "xlnx,zynqmp-dma-1.0"; - clock-names = "clk_main", "clk_apb"; reg = <0x0 0xffaf0000 0x0 0x1000>; interrupt-parent = <&gic>; interrupts = <0 84 4>; + clock-names = "clk_main", "clk_apb"; xlnx,bus-width = <64>; #stream-id-cells = <1>; iommus = <&smmu 0x86f>; @@ -781,7 +781,8 @@ <0 116 4>, <0 115 4>, /* MSI_1 [63...32] */ <0 114 4>; /* MSI_0 [31...0] */ - interrupt-names = "misc","dummy","intx", "msi1", "msi0"; + interrupt-names = "misc", "dummy", "intx", + "msi1", "msi0"; msi-parent = <&pcie>; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>,

Use vendor prefix for Maxim chips.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-revA.dts | 28 ++++++++++++++-------------- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- 2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 2be6eb0eb5eb..1c9e4b1bd328 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -333,51 +333,51 @@ reg = <2>; /* MAXIM_PMBUS - 00 */ max15301@a { /* u46 */ - compatible = "max15301"; + compatible = "maxim,max15301"; reg = <0xa>; }; max15303@b { /* u4 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0xb>; }; max15303@10 { /* u13 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x10>; }; max15301@13 { /* u47 */ - compatible = "max15301"; + compatible = "maxim,max15301"; reg = <0x13>; }; max15303@14 { /* u7 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x14>; }; max15303@15 { /* u6 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x15>; }; max15303@16 { /* u10 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x16>; }; max15303@17 { /* u9 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x17>; }; max15301@18 { /* u63 */ - compatible = "max15301"; + compatible = "maxim,max15301"; reg = <0x18>; }; max15303@1a { /* u49 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x1a>; }; max15303@1d { /* u18 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x1d>; }; max15303@20 { /* u8 */ - compatible = "max15303"; + compatible = "maxim,max15303"; status = "disabled"; /* unreachable */ reg = <0x20>; }; @@ -386,11 +386,11 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o */ max20751@72 { /* u95 FIXME - not detected */ - compatible = "max20751"; + compatible = "maxim,max20751"; reg = <0x72>; }; max20751@73 { /* u96 FIXME - not detected */ - compatible = "max20751"; + compatible = "maxim,max20751"; reg = <0x73>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index c771a946b21b..d0acb29b64b3 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -34,7 +34,7 @@ i2cswitch@75 { i2c@2 { max15303@1b { /* u8 */ - compatible = "max15303"; + compatible = "maxim,max15303"; reg = <0x1b>; }; /delete-node/ max15303@20;

Based on review from mainline i2c-mux is standard name for i2c switches.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-revA.dts | 6 +++--- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 1c9e4b1bd328..5f4ac22e1d7a 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -220,7 +220,7 @@ */ };
- i2cswitch@75 { /* u60 */ + i2c-mux@75 { /* u60 */ compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; @@ -412,7 +412,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o
/* FIXME PL i2c via PCA9306 - u45 */ /* FIXME MSP430 - u41 - not detected */ - i2cswitch@74 { /* u34 */ + i2c-mux@74 { /* u34 */ compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -487,7 +487,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o /* 5 - 7 unconnected */ };
- i2cswitch@75 { + i2c-mux@75 { compatible = "nxp,pca9548"; /* u135 */ #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index d0acb29b64b3..46517ba0b4e2 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -31,7 +31,7 @@
/* Fix collision with u61 */ &i2c0 { - i2cswitch@75 { + i2c-mux@75 { i2c@2 { max15303@1b { /* u8 */ compatible = "maxim,max15303";

Mainline Linux kernel has adopted SPDX header license in a different format then was used before. This patch is syncing it up.
Also update years in License text and remove Nathalie's email because it is no longer valid.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-clk-ccf.dtsi | 3 +-- arch/arm/dts/zynqmp-clk.dtsi | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 5 ++--- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-revA.dts | 5 ++--- arch/arm/dts/zynqmp-zcu102-revB.dts | 5 ++--- arch/arm/dts/zynqmp.dtsi | 6 +++++- 10 files changed, 22 insertions(+), 27 deletions(-)
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 4449d5b93d1f..b18d8d19c304 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Clock specification for Xilinx ZynqMP * * (C) Copyright 2017, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/ { diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi index f6e83e15132a..45d84a6b7df9 100644 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/ { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 9062ffe919e1..0ddb43df6d4f 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm015-dc1 * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index bf43bf874885..670cc447559c 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm016-dc2 * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 39c82c592f73..41012fa61de5 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm018-dc4 * - * (C) Copyright 2015 - 2016, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index c774b866fb14..99aa74e54e67 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -1,12 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP zc1751-xm019-dc5 * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Siva Durga Prasad siva.durga.paladugu@xilinx.com * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index 323a674e3a62..3fc3e749913a 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 Rev1.0 * - * (C) Copyright 2016, Xilinx, Inc. + * (C) Copyright 2016 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
#include "zynqmp-zcu102-revB.dts" diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 5f4ac22e1d7a..c9cffc125bfb 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 RevA * - * (C) Copyright 2015, Xilinx, Inc. + * (C) Copyright 2015 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
/dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index 46517ba0b4e2..384d0a2a0c12 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -1,11 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP ZCU102 RevB * - * (C) Copyright 2016, Xilinx, Inc. + * (C) Copyright 2016 - 2018, Xilinx, Inc. * * Michal Simek michal.simek@xilinx.com - * - * SPDX-License-Identifier: GPL-2.0+ */
#include "zynqmp-zcu102-revA.dts" diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index e71399f83d27..ad4bbbf66750 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * dts file for Xilinx ZynqMP * @@ -5,7 +6,10 @@ * * Michal Simek michal.simek@xilinx.com * - * SPDX-License-Identifier: GPL-2.0+ + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. */
/ {

Remove additional comments which were removed as the part of upstreaming.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 1 - arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 1 - arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 1 - arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 3 --- arch/arm/dts/zynqmp-zcu102-revA.dts | 29 ++++++++--------------------- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 -- 6 files changed, 8 insertions(+), 29 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 0ddb43df6d4f..3c2054734c4b 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -39,7 +39,6 @@ }; };
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 670cc447559c..22a3c1ebeccc 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -49,7 +49,6 @@ status = "okay"; };
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 41012fa61de5..fb49b4fcb492 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -51,7 +51,6 @@ status = "okay"; };
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 99aa74e54e67..fe737be038f1 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -37,7 +37,6 @@ }; };
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; }; @@ -83,12 +82,10 @@ status = "okay"; };
-/* FIXME: Add device */ &i2c0 { status = "okay"; };
-/* FIXME: Add device */ &i2c1 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index c9cffc125bfb..efa94a14194b 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -77,7 +77,6 @@ status = "okay"; };
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */ &fpd_dma_chan1 { status = "okay"; }; @@ -381,23 +380,17 @@ reg = <0x20>; };
-/* drivers/hwmon/pmbus/Kconfig:86: be called max20751. -drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o -*/ - max20751@72 { /* u95 FIXME - not detected */ + max20751@72 { /* u95 */ compatible = "maxim,max20751"; reg = <0x72>; }; - max20751@73 { /* u96 FIXME - not detected */ + max20751@73 { /* u96 */ compatible = "maxim,max20751"; reg = <0x73>; }; }; /* Bus 3 is not connected */ }; - - /* FIXME PMOD - j160 */ - /* FIXME MSP430F - u41 - not detected */ };
&i2c1 { @@ -409,8 +402,7 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
- /* FIXME PL i2c via PCA9306 - u45 */ - /* FIXME MSP430 - u41 - not detected */ + /* PL i2c via PCA9306 - u45 */ i2c-mux@74 { /* u34 */ compatible = "nxp,pca9548"; #address-cells = <1>; @@ -515,24 +507,19 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751) += max20751.o #size-cells = <0>; reg = <3>; /* DDR4 SODIMM */ - dev@19 { /* u-boot detection */ - compatible = "xxx"; + dev@19 { reg = <0x19>; }; - dev@30 { /* u-boot detection */ - compatible = "xxx"; + dev@30 { reg = <0x30>; }; - dev@35 { /* u-boot detection */ - compatible = "xxx"; + dev@35 { reg = <0x35>; }; - dev@36 { /* u-boot detection */ - compatible = "xxx"; + dev@36 { reg = <0x36>; }; - dev@51 { /* u-boot detection - maybe SPD */ - compatible = "xxx"; + dev@51 { reg = <0x51>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index 384d0a2a0c12..af4d86882a5c 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -26,8 +26,6 @@ /delete-node/ phy@21; };
-/* Different qspi 512Mbit version */ - /* Fix collision with u61 */ &i2c0 { i2c-mux@75 {

Instead of hardcoding numbers.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-revA.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index efa94a14194b..c04e37dc65f3 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -11,6 +11,7 @@
#include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" +#include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> #include <dt-bindings/phy/phy.h> @@ -51,7 +52,7 @@ sw19 { label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; - linux,code = <108>; /* down */ + linux,code = <KEY_DOWN>; gpio-key,wakeup; autorepeat; };

Follow spec for node names.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index 3fc3e749913a..b1a95a91d18d 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -18,19 +18,19 @@ #address-cells = <1>; #size-cells = <1>;
- board_sn: board_sn@0 { + board_sn: board-sn@0 { reg = <0x0 0x14>; };
- eth_mac: eth_mac@20 { + eth_mac: eth-mac@20 { reg = <0x20 0x6>; };
- board_name: board_name@d0 { + board_name: board-name@d0 { reg = <0xd0 0x6>; };
- board_revision: board_revision@e0 { + board_revision: board-revision@e0 { reg = <0xe0 0x3>; }; };

Using different node name and label partitions as data. Also use latest compatible strings based on mainline review.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 22a3c1ebeccc..afa90a8a5b09 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -178,15 +178,15 @@ &spi0 { status = "okay"; num-cs = <1>; - spi0_flash0: spi0_flash0@0 { - compatible = "m25p80"; + spi0_flash0: flash@0 { #address-cells = <1>; #size-cells = <1>; + compatible = "sst,sst25wf080", "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>;
- spi0_flash0@0 { - label = "spi0_flash0"; + partition@0 { + label = "data"; reg = <0x0 0x100000>; }; }; @@ -195,15 +195,15 @@ &spi1 { status = "okay"; num-cs = <1>; - spi1_flash0: spi1_flash0@0 { - compatible = "mtd_dataflash"; + spi1_flash0: flash@0 { #address-cells = <1>; #size-cells = <1>; + compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash"; spi-max-frequency = <20000000>; reg = <0>;
- spi1_flash0@0 { - label = "spi1_flash0"; + partition@0 { + label = "data"; reg = <0x0 0x84000>; }; };

This changes was done in mainline and this patch is just following it.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 3c2054734c4b..7968aa7bec5d 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -92,7 +92,7 @@ status = "okay"; clock-frequency = <400000>; eeprom@55 { - compatible = "at,24c64"; /* 24AA64 */ + compatible = "atmel,24c64"; /* 24AA64 */ reg = <0x55>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index c04e37dc65f3..60d3f7103170 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -422,7 +422,7 @@ * 768B - 1024B address 0x57 */ eeprom: eeprom@54 { /* u23 */ - compatible = "at,24c08"; + compatible = "atmel,24c08"; reg = <0x54>; }; };

eeprom can contain information which can be used by nvmem drivers.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index 7968aa7bec5d..c794c91de186 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -91,7 +91,8 @@ &i2c1 { status = "okay"; clock-frequency = <400000>; - eeprom@55 { + + eeprom: eeprom@55 { compatible = "atmel,24c64"; /* 24AA64 */ reg = <0x55>; };

Enable TTCs for this target as is done in Linux kernel.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index fe737be038f1..16a14eacd8e9 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -94,6 +94,22 @@ status = "okay"; };
+&ttc0 { + status = "okay"; +}; + +&ttc1 { + status = "okay"; +}; + +&ttc2 { + status = "okay"; +}; + +&ttc3 { + status = "okay"; +}; + &uart0 { status = "okay"; };

From: Srinivas Goud srinivas.goud@xilinx.com
This patch adds no-1-8-v below properties to sd node for dc5 board dts.
Signed-off-by: Srinivas Goud srinivas.goud@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 16a14eacd8e9..0632b18ccf00 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -92,6 +92,7 @@
&sdhci0 { status = "okay"; + no-1-8-v; };
&ttc0 {

U-Boot commands shouldn't be the part of kernel DTS files.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-revA.dts | 26 ++++++++++---------------- 1 file changed, 10 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 60d3f7103170..9f2b46cf7677 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -144,12 +144,6 @@ sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
tca6416_u97: gpio@20 { - /* - * Enable all GTs to out from U-Boot - * i2c mw 20 6 0 - setup IO to output - * i2c mw 20 2 ef - setup output values on pins 0-7 - * i2c mw 20 3 ff - setup output values on pins 10-17 - */ compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; @@ -193,7 +187,7 @@ }; };
- tca6416_u61: gpio@21 { /* FIXME enable it by i2c mw 21 6 0 */ + tca6416_u61: gpio@21 { compatible = "ti,tca6416"; reg = <0x21>; gpio-controller; @@ -224,7 +218,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x75>; - i2c@0 { /* i2c mw 75 0 1 */ + i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -280,7 +274,7 @@ shunt-resistor = <5000>; }; }; - i2c@1 { /* i2c mw 75 0 1 */ + i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; @@ -326,7 +320,7 @@ shunt-resistor = <5000>; }; }; - i2c@2 { /* i2c mw 75 0 1 */ + i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; @@ -409,7 +403,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x74>; - i2c@0 { /* i2c mw 74 0 1 */ + i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -426,7 +420,7 @@ reg = <0x54>; }; }; - i2c@1 { /* i2c mw 74 0 2 */ + i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; @@ -436,7 +430,7 @@ };
}; - i2c@2 { /* i2c mw 74 0 4 */ + i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; @@ -449,7 +443,7 @@ clock-frequency = <300000000>; }; }; - i2c@3 { /* i2c mw 74 0 8 */ + i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; @@ -462,7 +456,7 @@ clock-frequency = <148500000>; }; }; - i2c@4 { /* i2c mw 74 0 10 */ + i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; @@ -503,7 +497,7 @@ reg = <2>; /* SYSMON */ }; - i2c@3 { /* i2c mw 75 0 8 */ + i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>;

There shouldn't be a number appended based on spec.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-revA.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 9f2b46cf7677..93f1d85d05d1 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -424,7 +424,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; - si5341: clock-generator1@36 { /* SI5341 - u69 */ + si5341: clock-generator@36 { /* SI5341 - u69 */ compatible = "si5341"; reg = <0x36>; }; @@ -434,7 +434,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <2>; - si570_1: clock-generator2@5d { /* USER SI570 - u42 */ + si570_1: clock-generator@5d { /* USER SI570 - u42 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x5d>; @@ -447,7 +447,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <3>; - si570_2: clock-generator3@5d { /* USER MGT SI570 - u56 */ + si570_2: clock-generator@5d { /* USER MGT SI570 - u56 */ #clock-cells = <0>; compatible = "silabs,si570"; reg = <0x5d>; @@ -460,7 +460,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - si5328: clock-generator4@69 {/* SI5328 - u20 */ + si5328: clock-generator@69 {/* SI5328 - u20 */ compatible = "silabs,si5328"; reg = <0x69>; /*

Add vendor prefix to si5341.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 93f1d85d05d1..059d1ffe8680 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -425,7 +425,7 @@ #size-cells = <0>; reg = <1>; si5341: clock-generator@36 { /* SI5341 - u69 */ - compatible = "si5341"; + compatible = "silabs,si5341"; reg = <0x36>; };

There is no reason to have double spaces for indentation.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index b1a95a91d18d..6647e97edba3 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -14,7 +14,7 @@ compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; };
-&eeprom { +&eeprom { #address-cells = <1>; #size-cells = <1>;
participants (1)
-
Michal Simek