RE: [U-Boot-Users] PQ2FADS-VR 2nd Ethernet
Yuli,
Thanks very much!
Here is the sympotoms.
Based on the PQ2FADS-VR schematic, I route parallel portC pin PC17(Clk 15 for RX) and pin PC16(Clk16 for TX) for FCC3. PortB PB4~PB17 are enabled for FCC3. When I use ping command, I got "fec: tx error!" message in the console. I found the message is from fec_send(...) at cpu/mpc8260/ether_fcc.c. It seems CPM did not send out the data to Phy.
1) I check BCSR3. Both FETHIEN2 and FETH2_RST are 1. 2) Phy Register seems OK (Reg0 = 0x2100, reg1 = 0x7809). 3) I check PortB PB4~PB17. Dedicated Pin setting seems OK.
Where do I need to check?
I appreciate your help!
Regards,
Jihua
-----Original Message----- From: Yuli Barcohen [mailto:yuli@arabellasw.com] Sent: Saturday, July 17, 2004 3:53 PM To: Jihua Cheng Cc: u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] PQ2FADS-VR 2nd Ethernet
Jihua Cheng writes:
Jihua> Hi, I have a PQ2FADS-VR board which u-boot 1.0.0
Upgrade to the top of CVS before you start changing anything. 1.0.0 is too old.
Jihua> runs well. Ethernet port1(FCC2) and Serial port1(SCC1) run Jihua> pretty well.
Jihua> I am trying to make Ethernet port2(FCC3) work. In the Jihua> configuration file mpc8260ads.h, I added
[...code deleted...]
Jihua> And in board\mpc8260ads\mpc8260ads.c, I enabled the parall Jihua> portC pin PC16 and PC17; PortB PB4~PB17. The new definition Jihua> for portB and portC are
[...code deleted...]
Jihua> However, Ethernet port2 on SCC3 still does not work.
Jihua> Could anyone tell me where I am wrong, or what I missed?
First of all, "does not work" is not good problem description. Could you explain what happens exactly? On this board, there are several more things which can require initialisation. Check BCSR and PHY. If you upgrade to CVS top, you'll see what's done for FCC2. To check PHY state, you can use mii command.
Jihua Cheng writes:
Jihua> Yuli, Thanks very much!
Jihua> Here is the sympotoms.
Jihua> Based on the PQ2FADS-VR schematic, I route parallel portC pin Jihua> PC17(Clk 15 for RX) and pin PC16(Clk16 for TX) for Jihua> FCC3. PortB PB4~PB17 are enabled for FCC3. When I use ping Jihua> command, I got "fec: tx error!" message in the console. I Jihua> found the message is from fec_send(...) at Jihua> cpu/mpc8260/ether_fcc.c. It seems CPM did not send out the Jihua> data to Phy.
This usually indicates that there is no Tx clock, probably because the PHY does not provide it.
Jihua> 1) I check BCSR3. Both FETHIEN2 and FETH2_RST are 1.
FETHIEN2=1 means that the PHY is isolated after power-up. This is not what you want. Set FETHIEN2 to zero and reset PHY by toggling FETH2_RST.
Jihua> 2) Phy Register seems OK (Reg0 = 0x2100, reg1 = 0x7809).
It's not completely OK because auto-negotiation is disabled. It's can be a result of above mentioned isolation. Check what happens after enabling the PHY, and set as necessary.
Jihua> 3) I check PortB PB4~PB17. Dedicated Pin setting seems OK.
Jihua> Where do I need to check?
Jihua> I appreciate your help!
On Mon, 2004-07-19 at 10:03, Jihua Cheng wrote:
Where do I need to check?
The TX error message is very typical if there is no TX clock from the phy to the FCC. * Check your TC clock * if that is OK, Check the Port settings for the RX and TX clock * Check the software settings, make sure they use the right clocks.
participants (3)
-
Jihua Cheng -
Rune Torgersen -
Yuli Barcohen