[U-Boot] [PATCH 1/2] sunxi: rsb: Add sun9i (A80 support)
Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede hdegoede@redhat.com --- arch/arm/cpu/armv7/sunxi/Makefile | 2 ++ arch/arm/cpu/armv7/sunxi/rsb.c | 11 +++++++++++ arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 5 +++-- arch/arm/include/asm/arch-sunxi/gpio.h | 8 ++++++++ 4 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 6602cda..f8a6bea 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -18,8 +18,10 @@ obj-y += usbc.o endif obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I) += prcm.o +obj-$(CONFIG_MACH_SUN9I) += prcm.o obj-$(CONFIG_MACH_SUN6I) += p2wi.o obj-$(CONFIG_MACH_SUN8I) += rsb.o +obj-$(CONFIG_MACH_SUN9I) += rsb.o obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index b72bb9d..55e9433 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -18,12 +18,23 @@
static void rsb_cfg_io(void) { +#ifdef CONFIG_MACH_SUN8I sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL0_R_RSB_SCK); sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL1_R_RSB_SDA); sunxi_gpio_set_pull(SUNXI_GPL(0), 1); sunxi_gpio_set_pull(SUNXI_GPL(1), 1); sunxi_gpio_set_drv(SUNXI_GPL(0), 2); sunxi_gpio_set_drv(SUNXI_GPL(1), 2); +#elif defined CONFIG_MACH_SUN9I + sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN0_R_RSB_SCK); + sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN1_R_RSB_SDA); + sunxi_gpio_set_pull(SUNXI_GPN(0), 1); + sunxi_gpio_set_pull(SUNXI_GPN(1), 1); + sunxi_gpio_set_drv(SUNXI_GPN(0), 2); + sunxi_gpio_set_drv(SUNXI_GPN(1), 2); +#else +#error unsupported MACH_SUNXI +#endif }
static void rsb_set_clk(void) diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h index a2a7839..04889c5 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h @@ -73,7 +73,6 @@ #define SUNXI_CCM_BASE (REGS_APB0_BASE + 0x0000) #define SUNXI_CCMMODULE_BASE (REGS_APB0_BASE + 0x0400) #define SUNXI_PIO_BASE (REGS_APB0_BASE + 0x0800) -#define SUNXI_R_PIO_BASE (0x08002C00) #define SUNXI_TIMER_BASE (REGS_APB0_BASE + 0x0C00) #define SUNXI_PWM_BASE (REGS_APB0_BASE + 0x1400) #define SUNXI_LRADC_BASE (REGS_APB0_BASE + 0x1800) @@ -92,8 +91,10 @@ #define SUNXI_TWI4_BASE (REGS_APB1_BASE + 0x3800)
/* RCPUS Module */ -#define SUNXI_RPRCM_BASE (REGS_RCPUS_BASE + 0x1400) +#define SUNXI_PRCM_BASE (REGS_RCPUS_BASE + 0x1400) #define SUNXI_R_UART_BASE (REGS_RCPUS_BASE + 0x2800) +#define SUNXI_R_PIO_BASE (REGS_RCPUS_BASE + 0x2c00) +#define SUNXI_RSB_BASE (REGS_RCPUS_BASE + 0x3400)
/* Misc. */ #define SUNXI_BROM_BASE 0xFFFF0000 /* 32K */ diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index 3db7fd3..d2d48de 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -45,9 +45,13 @@ * * sun8i has 1 bank: * PL0 - PL11 + * + * sun9i has 3 banks: + * PL0 - PL9 | PM0 - PM15 | PN0 - PN1 */ #define SUNXI_GPIO_L 11 #define SUNXI_GPIO_M 12 +#define SUNXI_GPIO_N 13
struct sunxi_gpio { u32 cfg[4]; @@ -129,6 +133,7 @@ enum sunxi_gpio_number { #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) #define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr)) +#define SUNXI_GPN(_nr) (SUNXI_GPIO_L_START + (_nr))
#define SUNXI_GPAXP0(_nr) (SUNXI_GPIO_AXP0_START + (_nr))
@@ -190,6 +195,9 @@ enum sunxi_gpio_number { #define SUN8I_GPL2_R_UART_TX 2 #define SUN8I_GPL3_R_UART_RX 2
+#define SUN9I_GPN0_R_RSB_SCK 3 +#define SUN9I_GPN1_R_RSB_SDA 3 + /* GPIO pin pull-up/down config */ #define SUNXI_GPIO_PULL_DISABLE 0 #define SUNXI_GPIO_PULL_UP 1
It turns out that the device_mode_data is rsn specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init().
Signed-off-by: Hans de Goede hdegoede@redhat.com --- arch/arm/cpu/armv7/sunxi/rsb.c | 11 ++++++++--- arch/arm/include/asm/arch-sunxi/rsb.h | 4 ++-- drivers/power/axp221.c | 4 +--- include/axp221.h | 1 - 4 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index 55e9433..b00befb 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -16,6 +16,8 @@ #include <asm/arch/prcm.h> #include <asm/arch/rsb.h>
+static int rsb_set_device_mode(void); + static void rsb_cfg_io(void) { #ifdef CONFIG_MACH_SUN8I @@ -53,7 +55,7 @@ static void rsb_set_clk(void) writel((cd_odly << 8) | div, &rsb->ccr); }
-void rsb_init(void) +int rsb_init(void) { struct sunxi_rsb_reg * const rsb = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; @@ -65,6 +67,8 @@ void rsb_init(void)
writel(RSB_CTRL_SOFT_RST, &rsb->ctrl); rsb_set_clk(); + + return rsb_set_device_mode(); }
static int rsb_await_trans(void) @@ -99,13 +103,14 @@ static int rsb_await_trans(void) return ret; }
-int rsb_set_device_mode(u32 device_mode_data) +static int rsb_set_device_mode(void) { struct sunxi_rsb_reg * const rsb = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; unsigned long tmo = timer_get_us() + 1000000;
- writel(RSB_DMCR_DEVICE_MODE_START | device_mode_data, &rsb->dmcr); + writel(RSB_DMCR_DEVICE_MODE_START | RSB_DMCR_DEVICE_MODE_DATA, + &rsb->dmcr);
while (readl(&rsb->dmcr) & RSB_DMCR_DEVICE_MODE_START) { if (timer_get_us() > tmo) diff --git a/arch/arm/include/asm/arch-sunxi/rsb.h b/arch/arm/include/asm/arch-sunxi/rsb.h index 95a595a..a893466 100644 --- a/arch/arm/include/asm/arch-sunxi/rsb.h +++ b/arch/arm/include/asm/arch-sunxi/rsb.h @@ -37,6 +37,7 @@ struct sunxi_rsb_reg { #define RSB_STAT_TERR_INT (1 << 1) #define RSB_STAT_LBSY_INT (1 << 2)
+#define RSB_DMCR_DEVICE_MODE_DATA 0x7c3e00 #define RSB_DMCR_DEVICE_MODE_START (1 << 31)
#define RSB_CMD_BYTE_WRITE 0x4e @@ -46,8 +47,7 @@ struct sunxi_rsb_reg { #define RSB_DEVADDR_RUNTIME_ADDR(x) ((x) << 16) #define RSB_DEVADDR_DEVICE_ADDR(x) ((x) << 0)
-void rsb_init(void); -int rsb_set_device_mode(u32 device_mode_data); +int rsb_init(void); int rsb_set_device_address(u16 device_addr, u16 runtime_addr); int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data); int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data); diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c index 58bbd45..3e07f23 100644 --- a/drivers/power/axp221.c +++ b/drivers/power/axp221.c @@ -29,9 +29,7 @@ static int pmic_bus_init(void) #else int ret;
- rsb_init(); - - ret = rsb_set_device_mode(AXP223_DEVICE_MODE_DATA); + ret = rsb_init(); if (ret) return ret;
diff --git a/include/axp221.h b/include/axp221.h index 6f24a61..a20e25c 100644 --- a/include/axp221.h +++ b/include/axp221.h @@ -12,7 +12,6 @@
#define AXP223_DEVICE_ADDR 0x3a3 #define AXP223_RUNTIME_ADDR 0x2d -#define AXP223_DEVICE_MODE_DATA 0x7c3e00
/* Page 0 addresses */ #define AXP221_CHIP_ID 0x03
On Tue, 2015-01-27 at 11:27 +0100, Hans de Goede wrote:
It turns out that the device_mode_data is rsn specific, rather then slave specific, so integrate the rsb_set_device_mode() call into rsb_init().
Signed-off-by: Hans de Goede hdegoede@redhat.com
Acked-by: Ian Campbell ijc@hellion.org.uk
On Tue, 2015-01-27 at 11:27 +0100, Hans de Goede wrote:
Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede hdegoede@redhat.com
@@ -129,6 +133,7 @@ enum sunxi_gpio_number { #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) #define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr)) +#define SUNXI_GPN(_nr) (SUNXI_GPIO_L_START + (_nr))
^ N vs ^ L
Is this correct or a cut-n-paste-o?
Ian.
Hi,
On 28-01-15 10:18, Ian Campbell wrote:
On Tue, 2015-01-27 at 11:27 +0100, Hans de Goede wrote:
Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede hdegoede@redhat.com
@@ -129,6 +133,7 @@ enum sunxi_gpio_number { #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) #define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr)) +#define SUNXI_GPN(_nr) (SUNXI_GPIO_L_START + (_nr))
^ N vs ^ LIs this correct or a cut-n-paste-o?
That is a cut-n-paste-o should be N_START obviously, will do a v2.
I guess the rsb did work because allwinner's boot0 already sets up the right muxing.
Regards,
Hans
On Wed, 2015-01-28 at 10:25 +0100, Hans de Goede wrote:
Hi,
On 28-01-15 10:18, Ian Campbell wrote:
On Tue, 2015-01-27 at 11:27 +0100, Hans de Goede wrote:
Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede hdegoede@redhat.com
@@ -129,6 +133,7 @@ enum sunxi_gpio_number { #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) #define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr)) +#define SUNXI_GPN(_nr) (SUNXI_GPIO_L_START + (_nr))
^ N vs ^ LIs this correct or a cut-n-paste-o?
That is a cut-n-paste-o should be N_START obviously, will do a v2.
Thought so ;-) With the obvious s/L/N/ change you can immediately add:
Acked-by: Ian Campbell ijc@hellion.org.uk
I guess the rsb did work because allwinner's boot0 already sets up the right muxing.
Likely.
Ian.
participants (2)
-
Hans de Goede -
Ian Campbell