[PATCH v3 0/4] spi: kirkwood: dm-conversion (part4)
Series of kirkwood boards to switch DM_SPI and drop which are not DM enabled still.
Any inputs? Jagan.
Bhargav Shah (1): spi: kirkwood: Drop nondm code
Jagan Teki (3): arm: Remove d2net_v2 board db-88f6281-bp-nand: Enable DM_SPI/SPI_FLASH arm: Remove netspace_v2 board
arch/arm/mach-kirkwood/Kconfig | 8 - board/LaCie/net2big_v2/Kconfig | 12 - board/LaCie/net2big_v2/MAINTAINERS | 7 - board/LaCie/net2big_v2/Makefile | 13 -- board/LaCie/net2big_v2/kwbimage.cfg | 149 ------------- board/LaCie/net2big_v2/net2big_v2.c | 257 ---------------------- board/LaCie/net2big_v2/net2big_v2.h | 28 --- board/LaCie/netspace_v2/Kconfig | 12 - board/LaCie/netspace_v2/MAINTAINERS | 14 -- board/LaCie/netspace_v2/Makefile | 10 - board/LaCie/netspace_v2/kwbimage-is2.cfg | 149 ------------- board/LaCie/netspace_v2/kwbimage-ns2l.cfg | 149 ------------- board/LaCie/netspace_v2/kwbimage.cfg | 149 ------------- board/LaCie/netspace_v2/netspace_v2.c | 120 ---------- board/LaCie/netspace_v2/netspace_v2.h | 22 -- configs/d2net_v2_defconfig | 53 ----- configs/db-88f6281-bp-nand_defconfig | 4 +- configs/inetspace_v2_defconfig | 53 ----- configs/net2big_v2_defconfig | 53 ----- configs/netspace_lite_v2_defconfig | 53 ----- configs/netspace_max_v2_defconfig | 53 ----- configs/netspace_mini_v2_defconfig | 48 ---- configs/netspace_v2_defconfig | 53 ----- drivers/spi/Kconfig | 12 +- drivers/spi/kirkwood_spi.c | 136 ++---------- include/configs/lacie_kw.h | 152 ------------- scripts/config_whitelist.txt | 1 - 27 files changed, 21 insertions(+), 1749 deletions(-) delete mode 100644 board/LaCie/net2big_v2/Kconfig delete mode 100644 board/LaCie/net2big_v2/MAINTAINERS delete mode 100644 board/LaCie/net2big_v2/Makefile delete mode 100644 board/LaCie/net2big_v2/kwbimage.cfg delete mode 100644 board/LaCie/net2big_v2/net2big_v2.c delete mode 100644 board/LaCie/net2big_v2/net2big_v2.h delete mode 100644 board/LaCie/netspace_v2/Kconfig delete mode 100644 board/LaCie/netspace_v2/MAINTAINERS delete mode 100644 board/LaCie/netspace_v2/Makefile delete mode 100644 board/LaCie/netspace_v2/kwbimage-is2.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage-ns2l.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage.cfg delete mode 100644 board/LaCie/netspace_v2/netspace_v2.c delete mode 100644 board/LaCie/netspace_v2/netspace_v2.h delete mode 100644 configs/d2net_v2_defconfig delete mode 100644 configs/inetspace_v2_defconfig delete mode 100644 configs/net2big_v2_defconfig delete mode 100644 configs/netspace_lite_v2_defconfig delete mode 100644 configs/netspace_max_v2_defconfig delete mode 100644 configs/netspace_mini_v2_defconfig delete mode 100644 configs/netspace_v2_defconfig delete mode 100644 include/configs/lacie_kw.h
From: Bhargav Shah bhargavshah1988@gmail.com
Drop the nondm code from kirkwood_spi.c since there is no board or any other code using for it.
Signed-off-by: Bhargav Shah bhargavshah1988@gmail.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Changes for v3: - updated commit message - updated config_whitelist.txt
drivers/spi/Kconfig | 12 ++-- drivers/spi/kirkwood_spi.c | 136 ++++------------------------------- scripts/config_whitelist.txt | 1 - 3 files changed, 19 insertions(+), 130 deletions(-)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 09b9cb17d8..0945177efb 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -162,6 +162,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core.
+config KIRKWOOD_SPI + bool "Marvell Kirkwood SPI Driver" + help + Enable support for SPI on various Marvell SoCs, such as + Kirkwood and Armada 375. + config MESON_SPIFC bool "Amlogic Meson SPI Flash Controller driver" depends on ARCH_MESON @@ -417,12 +423,6 @@ config SH_QSPI Enable the Renesas Quad SPI controller driver. This driver can be used on Renesas SoCs.
-config KIRKWOOD_SPI - bool "Marvell Kirkwood SPI Driver" - help - Enable support for SPI on various Marvell SoCs, such as - Kirkwood and Armada 375. - config MXC_SPI bool "MXC SPI Driver" help diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 3986b06b25..92dc2e13c5 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -19,6 +19,19 @@ #endif #include <asm/arch-mvebu/spi.h>
+struct mvebu_spi_dev { + bool is_errata_50mhz_ac; +}; + +struct mvebu_spi_platdata { + struct kwspi_registers *spireg; + bool is_errata_50mhz_ac; +}; + +struct mvebu_spi_priv { + struct kwspi_registers *spireg; +}; + static void _spi_cs_activate(struct kwspi_registers *reg) { setbits_le32(®->ctrl, KWSPI_CSN_ACT); @@ -94,128 +107,6 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen, return 0; }
-#ifndef CONFIG_DM_SPI - -static struct kwspi_registers *spireg = - (struct kwspi_registers *)MVEBU_SPI_BASE; - -#ifdef CONFIG_ARCH_KIRKWOOD -static u32 cs_spi_mpp_back[2]; -#endif - -struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int mode) -{ - struct spi_slave *slave; - u32 data; -#ifdef CONFIG_ARCH_KIRKWOOD - static const u32 kwspi_mpp_config[2][2] = { - { MPP0_SPI_SCn, 0 }, /* if cs == 0 */ - { MPP7_SPI_SCn, 0 } /* if cs != 0 */ - }; -#endif - - if (!spi_cs_is_valid(bus, cs)) - return NULL; - - slave = spi_alloc_slave_base(bus, cs); - if (!slave) - return NULL; - - writel(KWSPI_SMEMRDY, &spireg->ctrl); - - /* calculate spi clock prescaller using max_hz */ - data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10; - data = data < KWSPI_CLKPRESCL_MIN ? KWSPI_CLKPRESCL_MIN : data; - data = data > KWSPI_CLKPRESCL_MASK ? KWSPI_CLKPRESCL_MASK : data; - - /* program spi clock prescaller using max_hz */ - writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); - debug("data = 0x%08x\n", data); - - writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); - writel(KWSPI_IRQMASK, &spireg->irq_mask); - -#ifdef CONFIG_ARCH_KIRKWOOD - /* program mpp registers to select SPI_CSn */ - kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back); -#endif - - return slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ -#ifdef CONFIG_ARCH_KIRKWOOD - kirkwood_mpp_conf(cs_spi_mpp_back, NULL); -#endif - free(slave); -} - -__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave) -{ - return 0; -} - -int spi_claim_bus(struct spi_slave *slave) -{ - return board_spi_claim_bus(slave); -} - -__attribute__((weak)) void board_spi_release_bus(struct spi_slave *slave) -{ -} - -void spi_release_bus(struct spi_slave *slave) -{ - board_spi_release_bus(slave); -} - -#ifndef CONFIG_SPI_CS_IS_VALID -/* - * you can define this function board specific - * define above CONFIG in board specific config file and - * provide the function in board specific src file - */ -int spi_cs_is_valid(unsigned int bus, unsigned int cs) -{ - return bus == 0 && (cs == 0 || cs == 1); -} -#endif - -void spi_cs_activate(struct spi_slave *slave) -{ - _spi_cs_activate(spireg); -} - -void spi_cs_deactivate(struct spi_slave *slave) -{ - _spi_cs_deactivate(spireg); -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - return _spi_xfer(spireg, bitlen, dout, din, flags); -} - -#else - -/* Here now the DM part */ - -struct mvebu_spi_dev { - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_platdata { - struct kwspi_registers *spireg; - bool is_errata_50mhz_ac; -}; - -struct mvebu_spi_priv { - struct kwspi_registers *spireg; -}; - static int mvebu_spi_set_speed(struct udevice *bus, uint hz) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -409,4 +300,3 @@ U_BOOT_DRIVER(mvebu_spi) = { .priv_auto_alloc_size = sizeof(struct mvebu_spi_priv), .probe = mvebu_spi_probe, }; -#endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f6bf6f2474..e6f5bd7e6d 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1619,7 +1619,6 @@ CONFIG_SPEAR_USBBOOT CONFIG_SPEAR_USBTTY CONFIG_SPI_ADDR CONFIG_SPI_BOOTING -CONFIG_SPI_CS_IS_VALID CONFIG_SPI_DATAFLASH_WRITE_VERIFY CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE
This board has not been converted to CONFIG_DM by the deadline.
Remove it.
Cc: Simon Guinot simon.guinot@sequanux.org Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Changes for v3: - new patch
arch/arm/mach-kirkwood/Kconfig | 4 - board/LaCie/net2big_v2/Kconfig | 12 -- board/LaCie/net2big_v2/MAINTAINERS | 7 - board/LaCie/net2big_v2/Makefile | 13 -- board/LaCie/net2big_v2/kwbimage.cfg | 149 ---------------- board/LaCie/net2big_v2/net2big_v2.c | 257 ---------------------------- board/LaCie/net2big_v2/net2big_v2.h | 28 --- configs/d2net_v2_defconfig | 53 ------ configs/net2big_v2_defconfig | 53 ------ include/configs/lacie_kw.h | 152 ---------------- 10 files changed, 728 deletions(-) delete mode 100644 board/LaCie/net2big_v2/Kconfig delete mode 100644 board/LaCie/net2big_v2/MAINTAINERS delete mode 100644 board/LaCie/net2big_v2/Makefile delete mode 100644 board/LaCie/net2big_v2/kwbimage.cfg delete mode 100644 board/LaCie/net2big_v2/net2big_v2.c delete mode 100644 board/LaCie/net2big_v2/net2big_v2.h delete mode 100644 configs/d2net_v2_defconfig delete mode 100644 configs/net2big_v2_defconfig delete mode 100644 include/configs/lacie_kw.h
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index ae44cb665e..ad6aef45bf 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -35,9 +35,6 @@ config TARGET_KM_KIRKWOOD bool "KM Kirkwood Board" select VENDOR_KM
-config TARGET_NET2BIG_V2 - bool "LaCie 2Big Network v2 NAS Board" - config TARGET_NETSPACE_V2 bool "LaCie netspace_v2 Board"
@@ -80,7 +77,6 @@ source "board/cloudengines/pogo_e02/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" source "board/keymile/Kconfig" -source "board/LaCie/net2big_v2/Kconfig" source "board/LaCie/netspace_v2/Kconfig" source "board/raidsonic/ib62x0/Kconfig" source "board/Seagate/dockstar/Kconfig" diff --git a/board/LaCie/net2big_v2/Kconfig b/board/LaCie/net2big_v2/Kconfig deleted file mode 100644 index ba460dba45..0000000000 --- a/board/LaCie/net2big_v2/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_NET2BIG_V2 - -config SYS_BOARD - default "net2big_v2" - -config SYS_VENDOR - default "LaCie" - -config SYS_CONFIG_NAME - default "lacie_kw" - -endif diff --git a/board/LaCie/net2big_v2/MAINTAINERS b/board/LaCie/net2big_v2/MAINTAINERS deleted file mode 100644 index 8fec70315f..0000000000 --- a/board/LaCie/net2big_v2/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -NET2BIG_V2 BOARD -M: Simon Guinot simon.guinot@sequanux.org -S: Maintained -F: board/LaCie/net2big_v2/ -F: include/configs/lacie_kw.h -F: configs/d2net_v2_defconfig -F: configs/net2big_v2_defconfig diff --git a/board/LaCie/net2big_v2/Makefile b/board/LaCie/net2big_v2/Makefile deleted file mode 100644 index 3d12b72812..0000000000 --- a/board/LaCie/net2big_v2/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com - -obj-y := net2big_v2.o ../common/common.o -ifneq ($(and $(CONFIG_KIRKWOOD_GPIO),$(CONFIG_NET2BIG_V2)),) -obj-y += ../common/cpld-gpio-bus.o -endif diff --git a/board/LaCie/net2big_v2/kwbimage.cfg b/board/LaCie/net2big_v2/kwbimage.cfg deleted file mode 100644 index 3897a1197a..0000000000 --- a/board/LaCie/net2big_v2/kwbimage.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -# - -# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash - -# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed - -# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B - -#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000C30 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01 - -DATA 0xFFD01404 0x38743000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay - -DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP - -DATA 0xFFD0140C 0x00000A32 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required - -DATA 0xFFD01410 0x0000CCCC # DDR Address Control -# bit1-0: 01, Cs0width=x16 -# bit3-2: 11, Cs0size=1Gb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required - -DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required - -DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required - -DATA 0xFFD0141C 0x00000662 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required - -DATA 0xFFD01420 0x00000044 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required - -DATA 0xFFD01424 0x0000F17F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required - -DATA 0xFFD01428 0x00096630 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00009663 # DDR2 ODT Write Timing (default values) - -DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB) - -DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled - -DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 - -DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required - -DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on - -DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write - -# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c deleted file mode 100644 index dbd8b5755d..0000000000 --- a/board/LaCie/net2big_v2/net2big_v2.c +++ /dev/null @@ -1,257 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011 Simon Guinot sguinot@lacie.com - * - * Based on Kirkwood support: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar prafulla@marvell.com - */ - -#include <common.h> -#include <command.h> -#include <env.h> -#include <i2c.h> -#include <init.h> -#include <net.h> -#include <asm/mach-types.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> -#include <asm/arch/mpp.h> -#include <asm/arch/gpio.h> - -#include "net2big_v2.h" -#include "../common/common.h" -#include "../common/cpld-gpio-bus.h" - -DECLARE_GLOBAL_DATA_PTR; - -int board_early_init_f(void) -{ - /* GPIO configuration */ - mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH, - NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH); - - /* Multi-Purpose Pins Functionality configuration */ - static const u32 kwmpp_config[] = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Request power-off */ - MPP8_TW_SDA, - MPP9_TW_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP13_GPIO, /* Rear power switch (on|auto) */ - MPP14_GPIO, /* USB fuse alarm */ - MPP15_GPIO, /* Rear power switch (auto|off) */ - MPP16_GPIO, /* SATA HDD1 power */ - MPP17_GPIO, /* SATA HDD2 power */ - MPP20_SATA1_ACTn, - MPP21_SATA0_ACTn, - MPP24_GPIO, /* USB mode select */ - MPP26_GPIO, /* USB device vbus */ - MPP28_GPIO, /* USB enable host vbus */ - MPP29_GPIO, /* CPLD GPIO bus ALE */ - MPP34_GPIO, /* Rear Push button 0=on 1=off */ - MPP35_GPIO, /* Inhibit switch power-off */ - MPP36_GPIO, /* SATA HDD1 presence */ - MPP37_GPIO, /* SATA HDD2 presence */ - MPP40_GPIO, /* eSATA presence */ - MPP44_GPIO, /* CPLD GPIO bus (data 0) */ - MPP45_GPIO, /* CPLD GPIO bus (data 1) */ - MPP46_GPIO, /* CPLD GPIO bus (data 2) */ - MPP47_GPIO, /* CPLD GPIO bus (addr 0) */ - MPP48_GPIO, /* CPLD GPIO bus (addr 1) */ - MPP49_GPIO, /* CPLD GPIO bus (addr 2) */ - 0 - }; - - kirkwood_mpp_conf(kwmpp_config, NULL); - - return 0; -} - -int board_init(void) -{ - /* Machine number */ - gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2; - - /* Boot parameters address */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - - return 0; -} - -#if defined(CONFIG_MISC_INIT_R) - -#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_G762_ADDR) -/* - * Start I2C fan (GMT G762 controller) - */ -static void init_fan(void) -{ - u8 data; - - i2c_set_bus_num(0); - - /* Enable open-loop and PWM modes */ - data = 0x20; - if (i2c_write(CONFIG_SYS_I2C_G762_ADDR, - G762_REG_FAN_CMD1, 1, &data, 1) != 0) - goto err; - data = 0; - if (i2c_write(CONFIG_SYS_I2C_G762_ADDR, - G762_REG_SET_CNT, 1, &data, 1) != 0) - goto err; - /* - * RPM to PWM (set_out register) fan speed conversion array: - * 0 0x00 - * 1500 0x04 - * 2800 0x08 - * 3400 0x0C - * 3700 0x10 - * 4400 0x20 - * 4700 0x30 - * 4800 0x50 - * 5200 0x80 - * 5400 0xC0 - * 5500 0xFF - * - * Start fan at low speed (2800 RPM): - */ - data = 0x08; - if (i2c_write(CONFIG_SYS_I2C_G762_ADDR, - G762_REG_SET_OUT, 1, &data, 1) != 0) - goto err; - - return; -err: - printf("Error: failed to start I2C fan @%02x\n", - CONFIG_SYS_I2C_G762_ADDR); -} -#else -static void init_fan(void) {} -#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_G762_ADDR */ - -#if defined(CONFIG_NET2BIG_V2) && defined(CONFIG_KIRKWOOD_GPIO) -/* - * CPLD GPIO bus: - * - * - address register : bit [0-2] -> GPIO [47-49] - * - data register : bit [0-2] -> GPIO [44-46] - * - enable register : GPIO 29 - */ -static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 }; -static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 }; - -static struct cpld_gpio_bus cpld_gpio_bus = { - .addr = cpld_gpio_bus_addr, - .num_addr = ARRAY_SIZE(cpld_gpio_bus_addr), - .data = cpld_gpio_bus_data, - .num_data = ARRAY_SIZE(cpld_gpio_bus_data), - .enable = 29, -}; - -/* - * LEDs configuration: - * - * The LEDs are controlled by a CPLD and can be configured through - * the CPLD GPIO bus. - * - * Address register selection: - * - * addr | register - * ---------------------------- - * 0 | front LED - * 1 | front LED brightness - * 2 | SATA LED brightness - * 3 | SATA0 LED - * 4 | SATA1 LED - * 5 | SATA2 LED - * 6 | SATA3 LED - * 7 | SATA4 LED - * - * Data register configuration: - * - * data | LED brightness - * ------------------------------------------------- - * 0 | min (off) - * - | - - * 7 | max - * - * data | front LED mode - * ------------------------------------------------- - * 0 | fix off - * 1 | fix blue on - * 2 | fix red on - * 3 | blink blue on=1 sec and blue off=1 sec - * 4 | blink red on=1 sec and red off=1 sec - * 5 | blink blue on=2.5 sec and red on=0.5 sec - * 6 | blink blue on=1 sec and red on=1 sec - * 7 | blink blue on=0.5 sec and blue off=2.5 sec - * - * data | SATA LED mode - * ------------------------------------------------- - * 0 | fix off - * 1 | SATA activity blink - * 2 | fix red on - * 3 | blink blue on=1 sec and blue off=1 sec - * 4 | blink red on=1 sec and red off=1 sec - * 5 | blink blue on=2.5 sec and red on=0.5 sec - * 6 | blink blue on=1 sec and red on=1 sec - * 7 | fix blue on - */ -static void init_leds(void) -{ - /* Enable the front blue LED */ - cpld_gpio_bus_write(&cpld_gpio_bus, 0, 1); - cpld_gpio_bus_write(&cpld_gpio_bus, 1, 3); - - /* Configure SATA LEDs to blink in relation with the SATA activity */ - cpld_gpio_bus_write(&cpld_gpio_bus, 3, 1); - cpld_gpio_bus_write(&cpld_gpio_bus, 4, 1); - cpld_gpio_bus_write(&cpld_gpio_bus, 2, 3); -} -#else -static void init_leds(void) {} -#endif /* CONFIG_NET2BIG_V2 && CONFIG_KIRKWOOD_GPIO */ - -int misc_init_r(void) -{ - init_fan(); -#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR) - if (!env_get("ethaddr")) { - uchar mac[6]; - if (lacie_read_mac_address(mac) == 0) - eth_env_set_enetaddr("ethaddr", mac); - } -#endif - init_leds(); - - return 0; -} -#endif /* CONFIG_MISC_INIT_R */ - -#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) -/* Configure and initialize PHY */ -void reset_phy(void) -{ - mv_phy_88e1116_init("egiga0", 8); -} -#endif - -#if defined(CONFIG_KIRKWOOD_GPIO) -/* Return GPIO push button status */ -static int -do_read_push_button(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) -{ - return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON); -} - -U_BOOT_CMD(button, 1, 1, do_read_push_button, - "Return GPIO push button status 0=off 1=on", ""); -#endif diff --git a/board/LaCie/net2big_v2/net2big_v2.h b/board/LaCie/net2big_v2/net2big_v2.h deleted file mode 100644 index d61dd0e998..0000000000 --- a/board/LaCie/net2big_v2/net2big_v2.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Simon Guinot sguinot@lacie.com - * - * Based on Kirkwood support: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar prafulla@marvell.com - */ - -#ifndef NET2BIG_V2_H -#define NET2BIG_V2_H - -/* GPIO configuration */ -#define NET2BIG_V2_OE_LOW 0x0600E000 -#define NET2BIG_V2_OE_HIGH 0x00000134 -#define NET2BIG_V2_OE_VAL_LOW 0x10030000 -#define NET2BIG_V2_OE_VAL_HIGH 0x00000000 - -/* Buttons */ -#define NET2BIG_V2_GPIO_PUSH_BUTTON 34 - -/* GMT G762 registers (I2C fan controller) */ -#define G762_REG_SET_CNT 0x00 -#define G762_REG_SET_OUT 0x03 -#define G762_REG_FAN_CMD1 0x04 - -#endif /* NET2BIG_V2_H */ diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig deleted file mode 100644 index fe3c6c4762..0000000000 --- a/configs/d2net_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NET2BIG_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" D2 v2" -CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="d2v2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig deleted file mode 100644 index 1389d30900..0000000000 --- a/configs/net2big_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NET2BIG_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" 2Big v2" -CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="2big2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h deleted file mode 100644 index 5bb0255a74..0000000000 --- a/include/configs/lacie_kw.h +++ /dev/null @@ -1,152 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Simon Guinot sguinot@lacie.com - */ - -#ifndef _CONFIG_LACIE_KW_H -#define _CONFIG_LACIE_KW_H - -/* - * Machine number definition - */ -#if defined(CONFIG_INETSPACE_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_INETSPACE_V2 -#elif defined(CONFIG_NETSPACE_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_V2 -#elif defined(CONFIG_NETSPACE_LITE_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_LITE_V2 -#elif defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MINI_V2 -#elif defined(CONFIG_NETSPACE_MAX_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2 -#elif defined(CONFIG_D2NET_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_D2NET_V2 -#elif defined(CONFIG_NET2BIG_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2 -#else -#error "Unknown board" -#endif - -/* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -/* SoC name */ -#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_KW88F6192 -#else -#define CONFIG_KW88F6281 -#endif -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ - -/* - * Core clock definition - */ -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */ - -/* - * SDRAM configuration - */ - -/* - * Different SDRAM configuration and size for some of the boards derived - * from the Network Space v2 - */ -#if defined(CONFIG_INETSPACE_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg -#elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg -#endif - -/* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros - */ -#include "mv-common.h" - -/* Remove or override few declarations from mv-common.h */ -#undef CONFIG_SYS_IDE_MAXBUS -#undef CONFIG_SYS_IDE_MAXDEVICE - -/* - * Enable platform initialisation via misc_init_r() function - */ - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_NETCONSOLE -#endif - -/* - * SATA Driver configuration - */ -#ifdef CONFIG_MVSATA_IDE -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \ - defined(CONFIG_NET2BIG_V2) -#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE 2 -#else -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_IDE_MAXDEVICE 1 -#endif -#endif /* CONFIG_MVSATA_IDE */ - -/* - * Enable GPI0 support - */ -#define CONFIG_KIRKWOOD_GPIO - -/* - * Enable I2C support - */ -#ifdef CONFIG_CMD_I2C -/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */ -#if defined(CONFIG_NET2BIG_V2) -#define CONFIG_SYS_I2C_G762_ADDR 0x3e -#endif -#endif /* CONFIG_CMD_I2C */ - -/* - * Partition support - */ - -/* - * File systems support - */ - -/* - * Environment variables configurations - */ - -/* - * Default environment variables - */ -#define CONFIG_BOOTCOMMAND \ - "dhcp && run netconsole; " \ - "if run usbload || run diskload; then bootm; fi" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" \ - "bootfile=uImage\0" \ - "loadaddr=0x800000\0" \ - "autoload=no\0" \ - "netconsole=" \ - "set stdin $stdin,nc; " \ - "set stdout $stdout,nc; " \ - "set stderr $stderr,nc;\0" \ - "diskload=ide reset && " \ - "ext2load ide 0:1 $loadaddr /boot/$bootfile\0" \ - "usbload=usb start && " \ - "fatload usb 0:1 $loadaddr /boot/$bootfile\0" - -#endif /* _CONFIG_LACIE_KW_H */
On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: Hi Jagan,
This board has not been converted to CONFIG_DM by the deadline.
Is that possible to negociate a new deadline ?
Thanks in advance.
Simon
Remove it.
Cc: Simon Guinot simon.guinot@sequanux.org Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Changes for v3:
- new patch
arch/arm/mach-kirkwood/Kconfig | 4 - board/LaCie/net2big_v2/Kconfig | 12 -- board/LaCie/net2big_v2/MAINTAINERS | 7 - board/LaCie/net2big_v2/Makefile | 13 -- board/LaCie/net2big_v2/kwbimage.cfg | 149 ---------------- board/LaCie/net2big_v2/net2big_v2.c | 257 ---------------------------- board/LaCie/net2big_v2/net2big_v2.h | 28 --- configs/d2net_v2_defconfig | 53 ------ configs/net2big_v2_defconfig | 53 ------ include/configs/lacie_kw.h | 152 ---------------- 10 files changed, 728 deletions(-) delete mode 100644 board/LaCie/net2big_v2/Kconfig delete mode 100644 board/LaCie/net2big_v2/MAINTAINERS delete mode 100644 board/LaCie/net2big_v2/Makefile delete mode 100644 board/LaCie/net2big_v2/kwbimage.cfg delete mode 100644 board/LaCie/net2big_v2/net2big_v2.c delete mode 100644 board/LaCie/net2big_v2/net2big_v2.h delete mode 100644 configs/d2net_v2_defconfig delete mode 100644 configs/net2big_v2_defconfig delete mode 100644 include/configs/lacie_kw.h
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index ae44cb665e..ad6aef45bf 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -35,9 +35,6 @@ config TARGET_KM_KIRKWOOD bool "KM Kirkwood Board" select VENDOR_KM
-config TARGET_NET2BIG_V2
- bool "LaCie 2Big Network v2 NAS Board"
config TARGET_NETSPACE_V2 bool "LaCie netspace_v2 Board"
@@ -80,7 +77,6 @@ source "board/cloudengines/pogo_e02/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" source "board/keymile/Kconfig" -source "board/LaCie/net2big_v2/Kconfig" source "board/LaCie/netspace_v2/Kconfig" source "board/raidsonic/ib62x0/Kconfig" source "board/Seagate/dockstar/Kconfig" diff --git a/board/LaCie/net2big_v2/Kconfig b/board/LaCie/net2big_v2/Kconfig deleted file mode 100644 index ba460dba45..0000000000 --- a/board/LaCie/net2big_v2/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_NET2BIG_V2
-config SYS_BOARD
- default "net2big_v2"
-config SYS_VENDOR
- default "LaCie"
-config SYS_CONFIG_NAME
- default "lacie_kw"
-endif diff --git a/board/LaCie/net2big_v2/MAINTAINERS b/board/LaCie/net2big_v2/MAINTAINERS deleted file mode 100644 index 8fec70315f..0000000000 --- a/board/LaCie/net2big_v2/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -NET2BIG_V2 BOARD -M: Simon Guinot simon.guinot@sequanux.org -S: Maintained -F: board/LaCie/net2big_v2/ -F: include/configs/lacie_kw.h -F: configs/d2net_v2_defconfig -F: configs/net2big_v2_defconfig diff --git a/board/LaCie/net2big_v2/Makefile b/board/LaCie/net2big_v2/Makefile deleted file mode 100644 index 3d12b72812..0000000000 --- a/board/LaCie/net2big_v2/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com
-obj-y := net2big_v2.o ../common/common.o -ifneq ($(and $(CONFIG_KIRKWOOD_GPIO),$(CONFIG_NET2BIG_V2)),) -obj-y += ../common/cpld-gpio-bus.o -endif diff --git a/board/LaCie/net2big_v2/kwbimage.cfg b/board/LaCie/net2big_v2/kwbimage.cfg deleted file mode 100644 index 3897a1197a..0000000000 --- a/board/LaCie/net2big_v2/kwbimage.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -#
-# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash
-# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000C30 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01
-DATA 0xFFD01404 0x38743000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay
-DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP
-DATA 0xFFD0140C 0x00000A32 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required
-DATA 0xFFD01410 0x0000CCCC # DDR Address Control -# bit1-0: 01, Cs0width=x16 -# bit3-2: 11, Cs0size=1Gb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required
-DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required
-DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required
-DATA 0xFFD0141C 0x00000662 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required
-DATA 0xFFD01420 0x00000044 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required
-DATA 0xFFD01424 0x0000F17F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required
-DATA 0xFFD01428 0x00096630 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00009663 # DDR2 ODT Write Timing (default values)
-DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB)
-DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
-DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
-DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required
-DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on
-DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write
-# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c deleted file mode 100644 index dbd8b5755d..0000000000 --- a/board/LaCie/net2big_v2/net2big_v2.c +++ /dev/null @@ -1,257 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (C) 2011 Simon Guinot sguinot@lacie.com
- Based on Kirkwood support:
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#include <common.h> -#include <command.h> -#include <env.h> -#include <i2c.h> -#include <init.h> -#include <net.h> -#include <asm/mach-types.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> -#include <asm/arch/mpp.h> -#include <asm/arch/gpio.h>
-#include "net2big_v2.h" -#include "../common/common.h" -#include "../common/cpld-gpio-bus.h"
-DECLARE_GLOBAL_DATA_PTR;
-int board_early_init_f(void) -{
- /* GPIO configuration */
- mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);- /* Multi-Purpose Pins Functionality configuration */
- static const u32 kwmpp_config[] = {
MPP0_SPI_SCn,MPP1_SPI_MOSI,MPP2_SPI_SCK,MPP3_SPI_MISO,MPP6_SYSRST_OUTn,MPP7_GPO, /* Request power-off */MPP8_TW_SDA,MPP9_TW_SCK,MPP10_UART0_TXD,MPP11_UART0_RXD,MPP13_GPIO, /* Rear power switch (on|auto) */MPP14_GPIO, /* USB fuse alarm */MPP15_GPIO, /* Rear power switch (auto|off) */MPP16_GPIO, /* SATA HDD1 power */MPP17_GPIO, /* SATA HDD2 power */MPP20_SATA1_ACTn,MPP21_SATA0_ACTn,MPP24_GPIO, /* USB mode select */MPP26_GPIO, /* USB device vbus */MPP28_GPIO, /* USB enable host vbus */MPP29_GPIO, /* CPLD GPIO bus ALE */MPP34_GPIO, /* Rear Push button 0=on 1=off */MPP35_GPIO, /* Inhibit switch power-off */MPP36_GPIO, /* SATA HDD1 presence */MPP37_GPIO, /* SATA HDD2 presence */MPP40_GPIO, /* eSATA presence */MPP44_GPIO, /* CPLD GPIO bus (data 0) */MPP45_GPIO, /* CPLD GPIO bus (data 1) */MPP46_GPIO, /* CPLD GPIO bus (data 2) */MPP47_GPIO, /* CPLD GPIO bus (addr 0) */MPP48_GPIO, /* CPLD GPIO bus (addr 1) */MPP49_GPIO, /* CPLD GPIO bus (addr 2) */0- };
- kirkwood_mpp_conf(kwmpp_config, NULL);
- return 0;
-}
-int board_init(void) -{
- /* Machine number */
- gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
- /* Boot parameters address */
- gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
- return 0;
-}
-#if defined(CONFIG_MISC_INIT_R)
-#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_G762_ADDR) -/*
- Start I2C fan (GMT G762 controller)
- */
-static void init_fan(void) -{
- u8 data;
- i2c_set_bus_num(0);
- /* Enable open-loop and PWM modes */
- data = 0x20;
- if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
G762_REG_FAN_CMD1, 1, &data, 1) != 0)goto err;- data = 0;
- if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
G762_REG_SET_CNT, 1, &data, 1) != 0)goto err;- /*
* RPM to PWM (set_out register) fan speed conversion array:* 0 0x00* 1500 0x04* 2800 0x08* 3400 0x0C* 3700 0x10* 4400 0x20* 4700 0x30* 4800 0x50* 5200 0x80* 5400 0xC0* 5500 0xFF** Start fan at low speed (2800 RPM):*/- data = 0x08;
- if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
G762_REG_SET_OUT, 1, &data, 1) != 0)goto err;- return;
-err:
- printf("Error: failed to start I2C fan @%02x\n",
CONFIG_SYS_I2C_G762_ADDR);-} -#else -static void init_fan(void) {} -#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_G762_ADDR */
-#if defined(CONFIG_NET2BIG_V2) && defined(CONFIG_KIRKWOOD_GPIO) -/*
- CPLD GPIO bus:
- address register : bit [0-2] -> GPIO [47-49]
- data register : bit [0-2] -> GPIO [44-46]
- enable register : GPIO 29
- */
-static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 }; -static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 };
-static struct cpld_gpio_bus cpld_gpio_bus = {
- .addr = cpld_gpio_bus_addr,
- .num_addr = ARRAY_SIZE(cpld_gpio_bus_addr),
- .data = cpld_gpio_bus_data,
- .num_data = ARRAY_SIZE(cpld_gpio_bus_data),
- .enable = 29,
-};
-/*
- LEDs configuration:
- The LEDs are controlled by a CPLD and can be configured through
- the CPLD GPIO bus.
- Address register selection:
- addr | register
- 0 | front LED
- 1 | front LED brightness
- 2 | SATA LED brightness
- 3 | SATA0 LED
- 4 | SATA1 LED
- 5 | SATA2 LED
- 6 | SATA3 LED
- 7 | SATA4 LED
- Data register configuration:
- data | LED brightness
- 0 | min (off)
- | -
- 7 | max
- data | front LED mode
- 0 | fix off
- 1 | fix blue on
- 2 | fix red on
- 3 | blink blue on=1 sec and blue off=1 sec
- 4 | blink red on=1 sec and red off=1 sec
- 5 | blink blue on=2.5 sec and red on=0.5 sec
- 6 | blink blue on=1 sec and red on=1 sec
- 7 | blink blue on=0.5 sec and blue off=2.5 sec
- data | SATA LED mode
- 0 | fix off
- 1 | SATA activity blink
- 2 | fix red on
- 3 | blink blue on=1 sec and blue off=1 sec
- 4 | blink red on=1 sec and red off=1 sec
- 5 | blink blue on=2.5 sec and red on=0.5 sec
- 6 | blink blue on=1 sec and red on=1 sec
- 7 | fix blue on
- */
-static void init_leds(void) -{
- /* Enable the front blue LED */
- cpld_gpio_bus_write(&cpld_gpio_bus, 0, 1);
- cpld_gpio_bus_write(&cpld_gpio_bus, 1, 3);
- /* Configure SATA LEDs to blink in relation with the SATA activity */
- cpld_gpio_bus_write(&cpld_gpio_bus, 3, 1);
- cpld_gpio_bus_write(&cpld_gpio_bus, 4, 1);
- cpld_gpio_bus_write(&cpld_gpio_bus, 2, 3);
-} -#else -static void init_leds(void) {} -#endif /* CONFIG_NET2BIG_V2 && CONFIG_KIRKWOOD_GPIO */
-int misc_init_r(void) -{
- init_fan();
-#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
- if (!env_get("ethaddr")) {
uchar mac[6];if (lacie_read_mac_address(mac) == 0)eth_env_set_enetaddr("ethaddr", mac);- }
-#endif
- init_leds();
- return 0;
-} -#endif /* CONFIG_MISC_INIT_R */
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) -/* Configure and initialize PHY */ -void reset_phy(void) -{
- mv_phy_88e1116_init("egiga0", 8);
-} -#endif
-#if defined(CONFIG_KIRKWOOD_GPIO) -/* Return GPIO push button status */ -static int -do_read_push_button(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])-{
- return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON);
-}
-U_BOOT_CMD(button, 1, 1, do_read_push_button,
"Return GPIO push button status 0=off 1=on", "");-#endif diff --git a/board/LaCie/net2big_v2/net2big_v2.h b/board/LaCie/net2big_v2/net2big_v2.h deleted file mode 100644 index d61dd0e998..0000000000 --- a/board/LaCie/net2big_v2/net2big_v2.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- Copyright (C) 2011 Simon Guinot sguinot@lacie.com
- Based on Kirkwood support:
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef NET2BIG_V2_H -#define NET2BIG_V2_H
-/* GPIO configuration */ -#define NET2BIG_V2_OE_LOW 0x0600E000 -#define NET2BIG_V2_OE_HIGH 0x00000134 -#define NET2BIG_V2_OE_VAL_LOW 0x10030000 -#define NET2BIG_V2_OE_VAL_HIGH 0x00000000
-/* Buttons */ -#define NET2BIG_V2_GPIO_PUSH_BUTTON 34
-/* GMT G762 registers (I2C fan controller) */ -#define G762_REG_SET_CNT 0x00 -#define G762_REG_SET_OUT 0x03 -#define G762_REG_FAN_CMD1 0x04
-#endif /* NET2BIG_V2_H */ diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig deleted file mode 100644 index fe3c6c4762..0000000000 --- a/configs/d2net_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NET2BIG_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" D2 v2" -CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="d2v2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig deleted file mode 100644 index 1389d30900..0000000000 --- a/configs/net2big_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NET2BIG_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" 2Big v2" -CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="2big2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h deleted file mode 100644 index 5bb0255a74..0000000000 --- a/include/configs/lacie_kw.h +++ /dev/null @@ -1,152 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- Copyright (C) 2011 Simon Guinot sguinot@lacie.com
- */
-#ifndef _CONFIG_LACIE_KW_H -#define _CONFIG_LACIE_KW_H
-/*
- Machine number definition
- */
-#if defined(CONFIG_INETSPACE_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_INETSPACE_V2 -#elif defined(CONFIG_NETSPACE_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_V2 -#elif defined(CONFIG_NETSPACE_LITE_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_LITE_V2 -#elif defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MINI_V2 -#elif defined(CONFIG_NETSPACE_MAX_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2 -#elif defined(CONFIG_D2NET_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_D2NET_V2 -#elif defined(CONFIG_NET2BIG_V2) -#define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2 -#else -#error "Unknown board" -#endif
-/*
- High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ -/* SoC name */ -#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_KW88F6192 -#else -#define CONFIG_KW88F6281 -#endif -#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-/*
- Core clock definition
- */
-#define CONFIG_SYS_TCLK 166000000 /* 166MHz */
-/*
- SDRAM configuration
- */
-/*
- Different SDRAM configuration and size for some of the boards derived
- from the Network Space v2
- */
-#if defined(CONFIG_INETSPACE_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg -#elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) -#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg -#endif
-/*
- mv-common.h should be defined after CMD configs since it used them
- to enable certain macros
- */
-#include "mv-common.h"
-/* Remove or override few declarations from mv-common.h */ -#undef CONFIG_SYS_IDE_MAXBUS -#undef CONFIG_SYS_IDE_MAXDEVICE
-/*
- Enable platform initialisation via misc_init_r() function
- */
-/*
- Ethernet Driver configuration
- */
-#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_NETCONSOLE -#endif
-/*
- SATA Driver configuration
- */
-#ifdef CONFIG_MVSATA_IDE -#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET -#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \
- defined(CONFIG_NET2BIG_V2)
-#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET -#define CONFIG_SYS_IDE_MAXBUS 2 -#define CONFIG_SYS_IDE_MAXDEVICE 2 -#else -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_IDE_MAXDEVICE 1 -#endif -#endif /* CONFIG_MVSATA_IDE */
-/*
- Enable GPI0 support
- */
-#define CONFIG_KIRKWOOD_GPIO
-/*
- Enable I2C support
- */
-#ifdef CONFIG_CMD_I2C -/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */ -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */ -#if defined(CONFIG_NET2BIG_V2) -#define CONFIG_SYS_I2C_G762_ADDR 0x3e -#endif -#endif /* CONFIG_CMD_I2C */
-/*
- Partition support
- */
-/*
- File systems support
- */
-/*
- Environment variables configurations
- */
-/*
- Default environment variables
- */
-#define CONFIG_BOOTCOMMAND \
- "dhcp && run netconsole; " \
- "if run usbload || run diskload; then bootm; fi"
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "stdin=serial\0" \
- "stdout=serial\0" \
- "stderr=serial\0" \
- "bootfile=uImage\0" \
- "loadaddr=0x800000\0" \
- "autoload=no\0" \
- "netconsole=" \
"set stdin $stdin,nc; " \"set stdout $stdout,nc; " \"set stderr $stderr,nc;\0" \- "diskload=ide reset && " \
"ext2load ide 0:1 $loadaddr /boot/$bootfile\0" \- "usbload=usb start && " \
"fatload usb 0:1 $loadaddr /boot/$bootfile\0"-#endif /* _CONFIG_LACIE_KW_H */
2.25.1
On Fri, Jun 19, 2020 at 12:02:17AM +0200, Simon Guinot wrote:
On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: Hi Jagan,
This board has not been converted to CONFIG_DM by the deadline.
Is that possible to negociate a new deadline ?
Well, when will you be able to spend some time bringing the platform up to current standards? Doing a quick build for net2big_v2 I see: +(net2big_v2) ===================== WARNING ====================== +(net2big_v2) This board does not use CONFIG_DM. CONFIG_DM will be +(net2big_v2) compulsory starting with the v2020.01 release. +(net2big_v2) Failure to update may result in board removal. +(net2big_v2) See doc/driver-model/migration.rst for more info. +(net2big_v2) ==================================================== +(net2big_v2) This board does not use CONFIG_DM_USB. Please update +(net2big_v2) the board to use CONFIG_DM_USB before the v2019.07 release. +(net2big_v2) Failure to update by the deadline may result in board removal. +(net2big_v2) This board does use CONFIG_MVSATA_IDE which is not +(net2big_v2) ported to driver-model (DM) yet. Please update the storage +(net2big_v2) controller driver to use CONFIG_AHCI before the v2019.07 +(net2big_v2) release. +(net2big_v2) This board does not use CONFIG_DM_SPI_FLASH. Please update +(net2big_v2) the board to use CONFIG_SPI_FLASH before the v2019.07 release. +(net2big_v2) This board does not use CONFIG_DM_ETH (Driver Model +(net2big_v2) for Ethernet drivers). Please update the board to use +(net2big_v2) CONFIG_DM_ETH before the v2020.07 release. Failure to +(net2big_v2) update by the deadline may result in board removal.
So there's a lot of stuff that needs updating. Conversion to CONFIG_DM is what you'll need to then convert SPI, ETH and USB to use DM and the IDE driver also needs attention and conversion. Thanks!
On Thu, Jun 18, 2020 at 06:25:06PM -0400, Tom Rini wrote:
On Fri, Jun 19, 2020 at 12:02:17AM +0200, Simon Guinot wrote:
On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: Hi Jagan,
This board has not been converted to CONFIG_DM by the deadline.
Is that possible to negociate a new deadline ?
Well, when will you be able to spend some time bringing the platform up to current standards? Doing a quick build for net2big_v2 I see: +(net2big_v2) ===================== WARNING ====================== +(net2big_v2) This board does not use CONFIG_DM. CONFIG_DM will be +(net2big_v2) compulsory starting with the v2020.01 release. +(net2big_v2) Failure to update may result in board removal. +(net2big_v2) See doc/driver-model/migration.rst for more info. +(net2big_v2) ==================================================== +(net2big_v2) This board does not use CONFIG_DM_USB. Please update +(net2big_v2) the board to use CONFIG_DM_USB before the v2019.07 release. +(net2big_v2) Failure to update by the deadline may result in board removal. +(net2big_v2) This board does use CONFIG_MVSATA_IDE which is not +(net2big_v2) ported to driver-model (DM) yet. Please update the storage +(net2big_v2) controller driver to use CONFIG_AHCI before the v2019.07 +(net2big_v2) release. +(net2big_v2) This board does not use CONFIG_DM_SPI_FLASH. Please update +(net2big_v2) the board to use CONFIG_SPI_FLASH before the v2019.07 release. +(net2big_v2) This board does not use CONFIG_DM_ETH (Driver Model +(net2big_v2) for Ethernet drivers). Please update the board to use +(net2big_v2) CONFIG_DM_ETH before the v2020.07 release. Failure to +(net2big_v2) update by the deadline may result in board removal.
So there's a lot of stuff that needs updating. Conversion to CONFIG_DM is what you'll need to then convert SPI, ETH and USB to use DM and the IDE driver also needs attention and conversion. Thanks!
Hi Tom,
I am working on it. But so far it is not going very well and the whole thing is turning into a debug session.
But I'll do my best and whatever the result will be, I'll send you an update by the end of the next week.
Is this acceptable to you ?
Thanks.
Simon
On Sat, Jun 20, 2020 at 02:24:47AM +0200, Simon Guinot wrote:
On Thu, Jun 18, 2020 at 06:25:06PM -0400, Tom Rini wrote:
On Fri, Jun 19, 2020 at 12:02:17AM +0200, Simon Guinot wrote:
On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: Hi Jagan,
This board has not been converted to CONFIG_DM by the deadline.
Is that possible to negociate a new deadline ?
Well, when will you be able to spend some time bringing the platform up to current standards? Doing a quick build for net2big_v2 I see: +(net2big_v2) ===================== WARNING ====================== +(net2big_v2) This board does not use CONFIG_DM. CONFIG_DM will be +(net2big_v2) compulsory starting with the v2020.01 release. +(net2big_v2) Failure to update may result in board removal. +(net2big_v2) See doc/driver-model/migration.rst for more info. +(net2big_v2) ==================================================== +(net2big_v2) This board does not use CONFIG_DM_USB. Please update +(net2big_v2) the board to use CONFIG_DM_USB before the v2019.07 release. +(net2big_v2) Failure to update by the deadline may result in board removal. +(net2big_v2) This board does use CONFIG_MVSATA_IDE which is not +(net2big_v2) ported to driver-model (DM) yet. Please update the storage +(net2big_v2) controller driver to use CONFIG_AHCI before the v2019.07 +(net2big_v2) release. +(net2big_v2) This board does not use CONFIG_DM_SPI_FLASH. Please update +(net2big_v2) the board to use CONFIG_SPI_FLASH before the v2019.07 release. +(net2big_v2) This board does not use CONFIG_DM_ETH (Driver Model +(net2big_v2) for Ethernet drivers). Please update the board to use +(net2big_v2) CONFIG_DM_ETH before the v2020.07 release. Failure to +(net2big_v2) update by the deadline may result in board removal.
So there's a lot of stuff that needs updating. Conversion to CONFIG_DM is what you'll need to then convert SPI, ETH and USB to use DM and the IDE driver also needs attention and conversion. Thanks!
Hi Tom,
I am working on it. But so far it is not going very well and the whole thing is turning into a debug session.
But I'll do my best and whatever the result will be, I'll send you an update by the end of the next week.
Is this acceptable to you ?
Yes, thanks!
On Fri, Jun 19, 2020 at 08:25:59PM -0400, Tom Rini wrote:
On Sat, Jun 20, 2020 at 02:24:47AM +0200, Simon Guinot wrote:
On Thu, Jun 18, 2020 at 06:25:06PM -0400, Tom Rini wrote:
On Fri, Jun 19, 2020 at 12:02:17AM +0200, Simon Guinot wrote:
On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: Hi Jagan,
This board has not been converted to CONFIG_DM by the deadline.
Is that possible to negociate a new deadline ?
Well, when will you be able to spend some time bringing the platform up to current standards? Doing a quick build for net2big_v2 I see: +(net2big_v2) ===================== WARNING ====================== +(net2big_v2) This board does not use CONFIG_DM. CONFIG_DM will be +(net2big_v2) compulsory starting with the v2020.01 release. +(net2big_v2) Failure to update may result in board removal. +(net2big_v2) See doc/driver-model/migration.rst for more info. +(net2big_v2) ==================================================== +(net2big_v2) This board does not use CONFIG_DM_USB. Please update +(net2big_v2) the board to use CONFIG_DM_USB before the v2019.07 release. +(net2big_v2) Failure to update by the deadline may result in board removal. +(net2big_v2) This board does use CONFIG_MVSATA_IDE which is not +(net2big_v2) ported to driver-model (DM) yet. Please update the storage +(net2big_v2) controller driver to use CONFIG_AHCI before the v2019.07 +(net2big_v2) release. +(net2big_v2) This board does not use CONFIG_DM_SPI_FLASH. Please update +(net2big_v2) the board to use CONFIG_SPI_FLASH before the v2019.07 release. +(net2big_v2) This board does not use CONFIG_DM_ETH (Driver Model +(net2big_v2) for Ethernet drivers). Please update the board to use +(net2big_v2) CONFIG_DM_ETH before the v2020.07 release. Failure to +(net2big_v2) update by the deadline may result in board removal.
So there's a lot of stuff that needs updating. Conversion to CONFIG_DM is what you'll need to then convert SPI, ETH and USB to use DM and the IDE driver also needs attention and conversion. Thanks!
Hi Tom,
I am working on it. But so far it is not going very well and the whole thing is turning into a debug session.
But I'll do my best and whatever the result will be, I'll send you an update by the end of the next week.
Is this acceptable to you ?
Hi Tom,
I just sent a patch series converting the LaCie boards to use DM drivers.
I apologize for missing all this DM deadlines.
Simon
Enable DM_SPI, DM_SPI_FLASH for db-88f6281-bp-nand board.
Cc: Chris Packham judge.packham@gmail.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Changes for v3: - new patch
configs/db-88f6281-bp-nand_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/db-88f6281-bp-nand_defconfig b/configs/db-88f6281-bp-nand_defconfig index f98e462d42..5a580f28b5 100644 --- a/configs/db-88f6281-bp-nand_defconfig +++ b/configs/db-88f6281-bp-nand_defconfig @@ -20,7 +20,6 @@ CONFIG_CMD_DM=y CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y @@ -43,7 +42,7 @@ CONFIG_DM=y CONFIG_MVSATA_IDE=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y -CONFIG_SPI_FLASH=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y @@ -53,6 +52,7 @@ CONFIG_DM_RTC=y CONFIG_RTC_MV=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_DM_USB=y
On Thu, Jun 18, 2020 at 11:15 PM Jagan Teki jagan@amarulasolutions.com wrote:
Enable DM_SPI, DM_SPI_FLASH for db-88f6281-bp-nand board.
Cc: Chris Packham judge.packham@gmail.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Applied to u-boot-spi/master
This board has not been converted to CONFIG_DM by the deadline.
Remove it.
Patch-cc: Simon Guinot simon.guinot@sequanux.org Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- Changes for v3: - new patch
arch/arm/mach-kirkwood/Kconfig | 4 - board/LaCie/netspace_v2/Kconfig | 12 -- board/LaCie/netspace_v2/MAINTAINERS | 14 -- board/LaCie/netspace_v2/Makefile | 10 -- board/LaCie/netspace_v2/kwbimage-is2.cfg | 149 ---------------------- board/LaCie/netspace_v2/kwbimage-ns2l.cfg | 149 ---------------------- board/LaCie/netspace_v2/kwbimage.cfg | 149 ---------------------- board/LaCie/netspace_v2/netspace_v2.c | 120 ----------------- board/LaCie/netspace_v2/netspace_v2.h | 22 ---- configs/inetspace_v2_defconfig | 53 -------- configs/netspace_lite_v2_defconfig | 53 -------- configs/netspace_max_v2_defconfig | 53 -------- configs/netspace_mini_v2_defconfig | 48 ------- configs/netspace_v2_defconfig | 53 -------- 14 files changed, 889 deletions(-) delete mode 100644 board/LaCie/netspace_v2/Kconfig delete mode 100644 board/LaCie/netspace_v2/MAINTAINERS delete mode 100644 board/LaCie/netspace_v2/Makefile delete mode 100644 board/LaCie/netspace_v2/kwbimage-is2.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage-ns2l.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage.cfg delete mode 100644 board/LaCie/netspace_v2/netspace_v2.c delete mode 100644 board/LaCie/netspace_v2/netspace_v2.h delete mode 100644 configs/inetspace_v2_defconfig delete mode 100644 configs/netspace_lite_v2_defconfig delete mode 100644 configs/netspace_max_v2_defconfig delete mode 100644 configs/netspace_mini_v2_defconfig delete mode 100644 configs/netspace_v2_defconfig
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index ad6aef45bf..899c079773 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -35,9 +35,6 @@ config TARGET_KM_KIRKWOOD bool "KM Kirkwood Board" select VENDOR_KM
-config TARGET_NETSPACE_V2 - bool "LaCie netspace_v2 Board" - config TARGET_IB62X0 bool "ib62x0 Board"
@@ -77,7 +74,6 @@ source "board/cloudengines/pogo_e02/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" source "board/keymile/Kconfig" -source "board/LaCie/netspace_v2/Kconfig" source "board/raidsonic/ib62x0/Kconfig" source "board/Seagate/dockstar/Kconfig" source "board/Seagate/goflexhome/Kconfig" diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig deleted file mode 100644 index 930b822dfb..0000000000 --- a/board/LaCie/netspace_v2/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_NETSPACE_V2 - -config SYS_BOARD - default "netspace_v2" - -config SYS_VENDOR - default "LaCie" - -config SYS_CONFIG_NAME - default "lacie_kw" - -endif diff --git a/board/LaCie/netspace_v2/MAINTAINERS b/board/LaCie/netspace_v2/MAINTAINERS deleted file mode 100644 index 55fd50d4eb..0000000000 --- a/board/LaCie/netspace_v2/MAINTAINERS +++ /dev/null @@ -1,14 +0,0 @@ -NETSPACE_V2 BOARD -M: Simon Guinot simon.guinot@sequanux.org -S: Maintained -F: board/LaCie/netspace_v2/ -F: include/configs/lacie_kw.h -F: configs/inetspace_v2_defconfig -F: configs/netspace_max_v2_defconfig -F: configs/netspace_v2_defconfig - -NETSPACE_LITE_V2 BOARD -#M: - -S: Maintained -F: configs/netspace_lite_v2_defconfig -F: configs/netspace_mini_v2_defconfig diff --git a/board/LaCie/netspace_v2/Makefile b/board/LaCie/netspace_v2/Makefile deleted file mode 100644 index a6270bdd4b..0000000000 --- a/board/LaCie/netspace_v2/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com - -obj-y := netspace_v2.o ../common/common.o diff --git a/board/LaCie/netspace_v2/kwbimage-is2.cfg b/board/LaCie/netspace_v2/kwbimage-is2.cfg deleted file mode 100644 index 50f584ae70..0000000000 --- a/board/LaCie/netspace_v2/kwbimage-is2.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -# - -# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash - -# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed - -# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B - -#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000618 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01 - -DATA 0xFFD01404 0x35143000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay - -DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP - -DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required - -DATA 0xFFD01410 0x00000008 # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 10, Cs0size=512Mb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required - -DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required - -DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required - -DATA 0xFFD0141C 0x00000632 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required - -DATA 0xFFD01420 0x00000004 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required - -DATA 0xFFD01424 0x0000F07F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required - -DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) - -DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x07FFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB) - -DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled - -DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 - -DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required - -DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on - -DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write - -# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/netspace_v2/kwbimage-ns2l.cfg b/board/LaCie/netspace_v2/kwbimage-ns2l.cfg deleted file mode 100644 index 092353a06d..0000000000 --- a/board/LaCie/netspace_v2/kwbimage-ns2l.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -# - -# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash - -# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed - -# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B - -#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000618 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01 - -DATA 0xFFD01404 0x34143000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay - -DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP - -DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required - -DATA 0xFFD01410 0x0000DDDD # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 10, Cs0size=512Mb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required - -DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required - -DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required - -DATA 0xFFD0141C 0x00000632 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required - -DATA 0xFFD01420 0x00000004 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required - -DATA 0xFFD01424 0x0000F07F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required - -DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) - -DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x07FFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB) - -DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled - -DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 - -DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required - -DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on - -DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write - -# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/netspace_v2/kwbimage.cfg b/board/LaCie/netspace_v2/kwbimage.cfg deleted file mode 100644 index 1ed03fa9a9..0000000000 --- a/board/LaCie/netspace_v2/kwbimage.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -# - -# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash - -# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed - -# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B - -#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000618 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01 - -DATA 0xFFD01404 0x35143000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay - -DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP - -DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required - -DATA 0xFFD01410 0x0000000C # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 11, Cs0size=1Gb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required - -DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required - -DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required - -DATA 0xFFD0141C 0x00000632 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required - -DATA 0xFFD01420 0x00000004 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required - -DATA 0xFFD01424 0x0000F07F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required - -DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) - -DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB) - -DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled - -DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 - -DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required - -DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on - -DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write - -# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c deleted file mode 100644 index 011cc563d1..0000000000 --- a/board/LaCie/netspace_v2/netspace_v2.c +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011 Simon Guinot sguinot@lacie.com - * - * Based on Kirkwood support: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar prafulla@marvell.com - */ - -#include <common.h> -#include <command.h> -#include <env.h> -#include <init.h> -#include <net.h> -#include <asm/mach-types.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> -#include <asm/arch/mpp.h> -#include <asm/arch/gpio.h> - -#include "netspace_v2.h" -#include "../common/common.h" - -DECLARE_GLOBAL_DATA_PTR; - -int board_early_init_f(void) -{ - /* Gpio configuration */ - mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH, - NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH); - - /* Multi-Purpose Pins Functionality configuration */ - static const u32 kwmpp_config[] = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP4_NF_IO6, - MPP5_NF_IO7, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Fan speed (bit 1) */ - MPP8_TW_SDA, - MPP9_TW_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP12_GPO, /* Red led */ - MPP14_GPIO, /* USB fuse */ - MPP16_GPIO, /* SATA 0 power */ - MPP17_GPIO, /* SATA 1 power */ - MPP18_NF_IO0, - MPP19_NF_IO1, - MPP20_SATA1_ACTn, - MPP21_SATA0_ACTn, - MPP22_GPIO, /* Fan speed (bit 0) */ - MPP23_GPIO, /* Fan power */ - MPP24_GPIO, /* USB mode select */ - MPP25_GPIO, /* Fan rotation fail */ - MPP26_GPIO, /* USB vbus-in detection */ - MPP28_GPIO, /* USB enable vbus-out */ - MPP29_GPIO, /* Blue led (slow register) */ - MPP30_GPIO, /* Blue led (command register) */ - MPP31_GPIO, /* Board power off */ - MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */ - MPP33_GPIO, /* Fan speed (bit 2) */ - 0 - }; - kirkwood_mpp_conf(kwmpp_config, NULL); - - return 0; -} - -int board_init(void) -{ - /* Machine number */ - gd->bd->bi_arch_number = CONFIG_MACH_TYPE; - - /* Boot parameters address */ - gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; - - return 0; -} - -#if defined(CONFIG_MISC_INIT_R) -int misc_init_r(void) -{ -#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR) - if (!env_get("ethaddr")) { - uchar mac[6]; - if (lacie_read_mac_address(mac) == 0) - eth_env_set_enetaddr("ethaddr", mac); - } -#endif - return 0; -} -#endif - -#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) -/* Configure and initialize PHY */ -void reset_phy(void) -{ -#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2) - mv_phy_88e1318_init("egiga0", 0); -#else - mv_phy_88e1116_init("egiga0", 8); -#endif -} -#endif - -#if defined(CONFIG_KIRKWOOD_GPIO) -/* Return GPIO button status */ -static int -do_read_button(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON); -} - -U_BOOT_CMD(button, 1, 1, do_read_button, - "Return GPIO button status 0=off 1=on", ""); -#endif diff --git a/board/LaCie/netspace_v2/netspace_v2.h b/board/LaCie/netspace_v2/netspace_v2.h deleted file mode 100644 index 2c930171ea..0000000000 --- a/board/LaCie/netspace_v2/netspace_v2.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Simon Guinot sguinot@lacie.com - * - * Based on Kirkwood support: - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar prafulla@marvell.com - */ - -#ifndef NETSPACE_V2_H -#define NETSPACE_V2_H - -/* GPIO configuration */ -#define NETSPACE_V2_OE_LOW 0x06004000 -#define NETSPACE_V2_OE_HIGH 0x00000031 -#define NETSPACE_V2_OE_VAL_LOW 0x10030000 -#define NETSPACE_V2_OE_VAL_HIGH 0x00000000 - -#define NETSPACE_V2_GPIO_BUTTON 32 - -#endif /* NETSPACE_V2_H */ diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig deleted file mode 100644 index 6144eb5fad..0000000000 --- a/configs/inetspace_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" IS v2" -CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig deleted file mode 100644 index c744d2c58e..0000000000 --- a/configs/netspace_lite_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS v2 Lite" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig deleted file mode 100644 index 8602729fcb..0000000000 --- a/configs/netspace_max_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS Max v2" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig deleted file mode 100644 index ba9301de4d..0000000000 --- a/configs/netspace_mini_v2_defconfig +++ /dev/null @@ -1,48 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS v2 Mini" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig deleted file mode 100644 index 6ba1ef423e..0000000000 --- a/configs/netspace_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS v2" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y
On Thu, Jun 18, 2020 at 11:15:16PM +0530, Jagan Teki wrote:
This board has not been converted to CONFIG_DM by the deadline.
I am working at converting this board too, along with net2big_v2.
Simon
Remove it.
Patch-cc: Simon Guinot simon.guinot@sequanux.org Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Changes for v3:
- new patch
arch/arm/mach-kirkwood/Kconfig | 4 - board/LaCie/netspace_v2/Kconfig | 12 -- board/LaCie/netspace_v2/MAINTAINERS | 14 -- board/LaCie/netspace_v2/Makefile | 10 -- board/LaCie/netspace_v2/kwbimage-is2.cfg | 149 ---------------------- board/LaCie/netspace_v2/kwbimage-ns2l.cfg | 149 ---------------------- board/LaCie/netspace_v2/kwbimage.cfg | 149 ---------------------- board/LaCie/netspace_v2/netspace_v2.c | 120 ----------------- board/LaCie/netspace_v2/netspace_v2.h | 22 ---- configs/inetspace_v2_defconfig | 53 -------- configs/netspace_lite_v2_defconfig | 53 -------- configs/netspace_max_v2_defconfig | 53 -------- configs/netspace_mini_v2_defconfig | 48 ------- configs/netspace_v2_defconfig | 53 -------- 14 files changed, 889 deletions(-) delete mode 100644 board/LaCie/netspace_v2/Kconfig delete mode 100644 board/LaCie/netspace_v2/MAINTAINERS delete mode 100644 board/LaCie/netspace_v2/Makefile delete mode 100644 board/LaCie/netspace_v2/kwbimage-is2.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage-ns2l.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage.cfg delete mode 100644 board/LaCie/netspace_v2/netspace_v2.c delete mode 100644 board/LaCie/netspace_v2/netspace_v2.h delete mode 100644 configs/inetspace_v2_defconfig delete mode 100644 configs/netspace_lite_v2_defconfig delete mode 100644 configs/netspace_max_v2_defconfig delete mode 100644 configs/netspace_mini_v2_defconfig delete mode 100644 configs/netspace_v2_defconfig
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index ad6aef45bf..899c079773 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -35,9 +35,6 @@ config TARGET_KM_KIRKWOOD bool "KM Kirkwood Board" select VENDOR_KM
-config TARGET_NETSPACE_V2
- bool "LaCie netspace_v2 Board"
config TARGET_IB62X0 bool "ib62x0 Board"
@@ -77,7 +74,6 @@ source "board/cloudengines/pogo_e02/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" source "board/keymile/Kconfig" -source "board/LaCie/netspace_v2/Kconfig" source "board/raidsonic/ib62x0/Kconfig" source "board/Seagate/dockstar/Kconfig" source "board/Seagate/goflexhome/Kconfig" diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig deleted file mode 100644 index 930b822dfb..0000000000 --- a/board/LaCie/netspace_v2/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_NETSPACE_V2
-config SYS_BOARD
- default "netspace_v2"
-config SYS_VENDOR
- default "LaCie"
-config SYS_CONFIG_NAME
- default "lacie_kw"
-endif diff --git a/board/LaCie/netspace_v2/MAINTAINERS b/board/LaCie/netspace_v2/MAINTAINERS deleted file mode 100644 index 55fd50d4eb..0000000000 --- a/board/LaCie/netspace_v2/MAINTAINERS +++ /dev/null @@ -1,14 +0,0 @@ -NETSPACE_V2 BOARD -M: Simon Guinot simon.guinot@sequanux.org -S: Maintained -F: board/LaCie/netspace_v2/ -F: include/configs/lacie_kw.h -F: configs/inetspace_v2_defconfig -F: configs/netspace_max_v2_defconfig -F: configs/netspace_v2_defconfig
-NETSPACE_LITE_V2 BOARD -#M: - -S: Maintained -F: configs/netspace_lite_v2_defconfig -F: configs/netspace_mini_v2_defconfig diff --git a/board/LaCie/netspace_v2/Makefile b/board/LaCie/netspace_v2/Makefile deleted file mode 100644 index a6270bdd4b..0000000000 --- a/board/LaCie/netspace_v2/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com
-obj-y := netspace_v2.o ../common/common.o diff --git a/board/LaCie/netspace_v2/kwbimage-is2.cfg b/board/LaCie/netspace_v2/kwbimage-is2.cfg deleted file mode 100644 index 50f584ae70..0000000000 --- a/board/LaCie/netspace_v2/kwbimage-is2.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -#
-# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash
-# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000618 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01
-DATA 0xFFD01404 0x35143000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay
-DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP
-DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required
-DATA 0xFFD01410 0x00000008 # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 10, Cs0size=512Mb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required
-DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required
-DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required
-DATA 0xFFD0141C 0x00000632 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required
-DATA 0xFFD01420 0x00000004 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required
-DATA 0xFFD01424 0x0000F07F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required
-DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
-DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x07FFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB)
-DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
-DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
-DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required
-DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on
-DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write
-# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/netspace_v2/kwbimage-ns2l.cfg b/board/LaCie/netspace_v2/kwbimage-ns2l.cfg deleted file mode 100644 index 092353a06d..0000000000 --- a/board/LaCie/netspace_v2/kwbimage-ns2l.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -#
-# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash
-# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000618 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01
-DATA 0xFFD01404 0x34143000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay
-DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP
-DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required
-DATA 0xFFD01410 0x0000DDDD # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 10, Cs0size=512Mb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required
-DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required
-DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required
-DATA 0xFFD0141C 0x00000632 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required
-DATA 0xFFD01420 0x00000004 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required
-DATA 0xFFD01424 0x0000F07F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required
-DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
-DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x07FFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB)
-DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
-DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
-DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required
-DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on
-DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write
-# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/netspace_v2/kwbimage.cfg b/board/LaCie/netspace_v2/kwbimage.cfg deleted file mode 100644 index 1ed03fa9a9..0000000000 --- a/board/LaCie/netspace_v2/kwbimage.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2011 Simon Guinot sguinot@lacie.com -# -# Based on Kirkwood support: -# (C) Copyright 2009 -# Marvell Semiconductor <www.marvell.com> -# Written-by: Prafulla Wadaskar prafulla@marvell.com -# Refer doc/README.kwbimage for more details about how-to configure -# and create kirkwood boot image -#
-# Boot Media configurations -BOOT_FROM spi # Boot from SPI flash
-# SOC registers configuration using bootrom header extension -# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
-# Configure RGMII-0 interface pad voltage to 1.8V -DATA 0xFFD100e0 0x1B1B1B9B
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz -DATA 0xFFD01400 0x43000618 # DDR Configuration register -# bit13-0: 0xa00 (2560 DDR2 clks refresh rate) -# bit23-14: zero -# bit24: 1= enable exit self refresh mode on DDR access -# bit25: 1 required -# bit29-26: zero -# bit31-30: 01
-DATA 0xFFD01404 0x35143000 # DDR Controller Control Low -# bit 4: 0=addr/cmd in smame cycle -# bit 5: 0=clk is driven during self refresh, we don't care for APX -# bit 6: 0=use recommended falling edge of clk for addr/cmd -# bit14: 0=input buffer always powered up -# bit18: 1=cpu lock transaction enabled -# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 -# bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM -# bit30-28: 3 required -# bit31: 0=no additional STARTBURST delay
-DATA 0xFFD01408 0x11012228 # DDR Timing (Low) (active cycles value +1) -# bit7-4: TRCD -# bit11- 8: TRP -# bit15-12: TWR -# bit19-16: TWTR -# bit20: TRAS msb -# bit23-21: 0x0 -# bit27-24: TRRD -# bit31-28: TRTP
-DATA 0xFFD0140C 0x00000A19 # DDR Timing (High) -# bit6-0: TRFC -# bit8-7: TR2R -# bit10-9: TR2W -# bit12-11: TW2W -# bit31-13: zero required
-DATA 0xFFD01410 0x0000000C # DDR Address Control -# bit1-0: 00, Cs0width=x8 -# bit3-2: 11, Cs0size=1Gb -# bit5-4: 00, Cs2width=nonexistent -# bit7-6: 00, Cs1size =nonexistent -# bit9-8: 00, Cs2width=nonexistent -# bit11-10: 00, Cs2size =nonexistent -# bit13-12: 00, Cs3width=nonexistent -# bit15-14: 00, Cs3size =nonexistent -# bit16: 0, Cs0AddrSel -# bit17: 0, Cs1AddrSel -# bit18: 0, Cs2AddrSel -# bit19: 0, Cs3AddrSel -# bit31-20: 0 required
-DATA 0xFFD01414 0x00000000 # DDR Open Pages Control -# bit0: 0, OpenPage enabled -# bit31-1: 0 required
-DATA 0xFFD01418 0x00000000 # DDR Operation -# bit3-0: 0x0, DDR cmd -# bit31-4: 0 required
-DATA 0xFFD0141C 0x00000632 # DDR Mode -# bit2-0: 2, BurstLen=2 required -# bit3: 0, BurstType=0 required -# bit6-4: 4, CL=5 -# bit7: 0, TestMode=0 normal -# bit8: 0, DLL reset=0 normal -# bit11-9: 6, auto-precharge write recovery ???????????? -# bit12: 0, PD must be zero -# bit31-13: 0 required
-DATA 0xFFD01420 0x00000004 # DDR Extended Mode -# bit0: 0, DDR DLL enabled -# bit1: 1, DDR drive strenght reduced -# bit2: 1, DDR ODT control lsd enabled -# bit5-3: 000, required -# bit6: 1, DDR ODT control msb, enabled -# bit9-7: 000, required -# bit10: 0, differential DQS enabled -# bit11: 0, required -# bit12: 0, DDR output buffer enabled -# bit31-13: 0 required
-DATA 0xFFD01424 0x0000F07F # DDR Controller Control High -# bit2-0: 111, required -# bit3 : 1 , MBUS Burst Chop disabled -# bit6-4: 111, required -# bit7 : 1 , D2P Latency enabled -# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz -# bit9 : 0 , no half clock cycle addition to dataout -# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals -# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh -# bit15-12: 1111 required -# bit31-16: 0 required
-DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) -DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
-DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 -DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size -# bit0: 1, Window enabled -# bit1: 0, Write Protect disabled -# bit3-2: 00, CS0 hit selected -# bit23-4: ones, required -# bit31-24: 0x07, Size (i.e. 128MB)
-DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled -DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled -DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
-DATA 0xFFD01494 0x00010000 # DDR ODT Control (Low) -# bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 -# bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
-DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) -# bit1-0: 00, ODT0 controlled by ODT Control (low) register above -# bit3-2: 01, ODT1 active NEVER! -# bit31-4: zero, required
-DATA 0xFFD0149C 0x0000E40F # CPU ODT Control -# bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0 -# bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0 -# bit11-10:1, DQ_ODTSel. ODT select turned on
-DATA 0xFFD01480 0x00000001 # DDR Initialization Control -#bit0=1, enable DDR init upon this register write
-# End of Header extension -DATA 0x0 0x0 diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c deleted file mode 100644 index 011cc563d1..0000000000 --- a/board/LaCie/netspace_v2/netspace_v2.c +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (C) 2011 Simon Guinot sguinot@lacie.com
- Based on Kirkwood support:
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#include <common.h> -#include <command.h> -#include <env.h> -#include <init.h> -#include <net.h> -#include <asm/mach-types.h> -#include <asm/arch/cpu.h> -#include <asm/arch/soc.h> -#include <asm/arch/mpp.h> -#include <asm/arch/gpio.h>
-#include "netspace_v2.h" -#include "../common/common.h"
-DECLARE_GLOBAL_DATA_PTR;
-int board_early_init_f(void) -{
- /* Gpio configuration */
- mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);- /* Multi-Purpose Pins Functionality configuration */
- static const u32 kwmpp_config[] = {
MPP0_SPI_SCn,MPP1_SPI_MOSI,MPP2_SPI_SCK,MPP3_SPI_MISO,MPP4_NF_IO6,MPP5_NF_IO7,MPP6_SYSRST_OUTn,MPP7_GPO, /* Fan speed (bit 1) */MPP8_TW_SDA,MPP9_TW_SCK,MPP10_UART0_TXD,MPP11_UART0_RXD,MPP12_GPO, /* Red led */MPP14_GPIO, /* USB fuse */MPP16_GPIO, /* SATA 0 power */MPP17_GPIO, /* SATA 1 power */MPP18_NF_IO0,MPP19_NF_IO1,MPP20_SATA1_ACTn,MPP21_SATA0_ACTn,MPP22_GPIO, /* Fan speed (bit 0) */MPP23_GPIO, /* Fan power */MPP24_GPIO, /* USB mode select */MPP25_GPIO, /* Fan rotation fail */MPP26_GPIO, /* USB vbus-in detection */MPP28_GPIO, /* USB enable vbus-out */MPP29_GPIO, /* Blue led (slow register) */MPP30_GPIO, /* Blue led (command register) */MPP31_GPIO, /* Board power off */MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */MPP33_GPIO, /* Fan speed (bit 2) */0- };
- kirkwood_mpp_conf(kwmpp_config, NULL);
- return 0;
-}
-int board_init(void) -{
- /* Machine number */
- gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
- /* Boot parameters address */
- gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
- return 0;
-}
-#if defined(CONFIG_MISC_INIT_R) -int misc_init_r(void) -{ -#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
- if (!env_get("ethaddr")) {
uchar mac[6];if (lacie_read_mac_address(mac) == 0)eth_env_set_enetaddr("ethaddr", mac);- }
-#endif
- return 0;
-} -#endif
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) -/* Configure and initialize PHY */ -void reset_phy(void) -{ -#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
- mv_phy_88e1318_init("egiga0", 0);
-#else
- mv_phy_88e1116_init("egiga0", 8);
-#endif -} -#endif
-#if defined(CONFIG_KIRKWOOD_GPIO) -/* Return GPIO button status */ -static int -do_read_button(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{
- return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
-}
-U_BOOT_CMD(button, 1, 1, do_read_button,
"Return GPIO button status 0=off 1=on", "");-#endif diff --git a/board/LaCie/netspace_v2/netspace_v2.h b/board/LaCie/netspace_v2/netspace_v2.h deleted file mode 100644 index 2c930171ea..0000000000 --- a/board/LaCie/netspace_v2/netspace_v2.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- Copyright (C) 2011 Simon Guinot sguinot@lacie.com
- Based on Kirkwood support:
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef NETSPACE_V2_H -#define NETSPACE_V2_H
-/* GPIO configuration */ -#define NETSPACE_V2_OE_LOW 0x06004000 -#define NETSPACE_V2_OE_HIGH 0x00000031 -#define NETSPACE_V2_OE_VAL_LOW 0x10030000 -#define NETSPACE_V2_OE_VAL_HIGH 0x00000000
-#define NETSPACE_V2_GPIO_BUTTON 32
-#endif /* NETSPACE_V2_H */ diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig deleted file mode 100644 index 6144eb5fad..0000000000 --- a/configs/inetspace_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" IS v2" -CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig deleted file mode 100644 index c744d2c58e..0000000000 --- a/configs/netspace_lite_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS v2 Lite" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig deleted file mode 100644 index 8602729fcb..0000000000 --- a/configs/netspace_max_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS Max v2" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_STORAGE=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig deleted file mode 100644 index ba9301de4d..0000000000 --- a/configs/netspace_mini_v2_defconfig +++ /dev/null @@ -1,48 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS v2 Mini" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig deleted file mode 100644 index 6ba1ef423e..0000000000 --- a/configs/netspace_v2_defconfig +++ /dev/null @@ -1,53 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x600000 -CONFIG_TARGET_NETSPACE_V2=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x70000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_IDENT_STRING=" NS v2" -CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" -CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200" -CONFIG_USE_PREBOOT=y -CONFIG_CONSOLE_MUX=y -CONFIG_MISC_INIT_R=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="ns2> " -CONFIG_CMD_EEPROM=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=20000000 -CONFIG_ENV_ADDR=0x70000 -CONFIG_MVSATA_IDE=y -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_USB=y -CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_STORAGE=y
2.25.1
Hi Jagan,
On Fri, 19 Jun 2020, 5:45 AM Jagan Teki, jagan@amarulasolutions.com wrote:
Series of kirkwood boards to switch DM_SPI and drop which are not DM enabled still.
Any inputs? Jagan.
I had a quick glance over the series and it looks good to me.
I'm fortunate enough to be able to get into the office so I'll try and give this a spin on the kirkwood board I have on Monday.
Bhargav Shah (1):
spi: kirkwood: Drop nondm code
Jagan Teki (3): arm: Remove d2net_v2 board db-88f6281-bp-nand: Enable DM_SPI/SPI_FLASH arm: Remove netspace_v2 board
arch/arm/mach-kirkwood/Kconfig | 8 - board/LaCie/net2big_v2/Kconfig | 12 - board/LaCie/net2big_v2/MAINTAINERS | 7 - board/LaCie/net2big_v2/Makefile | 13 -- board/LaCie/net2big_v2/kwbimage.cfg | 149 ------------- board/LaCie/net2big_v2/net2big_v2.c | 257 ---------------------- board/LaCie/net2big_v2/net2big_v2.h | 28 --- board/LaCie/netspace_v2/Kconfig | 12 - board/LaCie/netspace_v2/MAINTAINERS | 14 -- board/LaCie/netspace_v2/Makefile | 10 - board/LaCie/netspace_v2/kwbimage-is2.cfg | 149 ------------- board/LaCie/netspace_v2/kwbimage-ns2l.cfg | 149 ------------- board/LaCie/netspace_v2/kwbimage.cfg | 149 ------------- board/LaCie/netspace_v2/netspace_v2.c | 120 ---------- board/LaCie/netspace_v2/netspace_v2.h | 22 -- configs/d2net_v2_defconfig | 53 ----- configs/db-88f6281-bp-nand_defconfig | 4 +- configs/inetspace_v2_defconfig | 53 ----- configs/net2big_v2_defconfig | 53 ----- configs/netspace_lite_v2_defconfig | 53 ----- configs/netspace_max_v2_defconfig | 53 ----- configs/netspace_mini_v2_defconfig | 48 ---- configs/netspace_v2_defconfig | 53 ----- drivers/spi/Kconfig | 12 +- drivers/spi/kirkwood_spi.c | 136 ++---------- include/configs/lacie_kw.h | 152 ------------- scripts/config_whitelist.txt | 1 - 27 files changed, 21 insertions(+), 1749 deletions(-) delete mode 100644 board/LaCie/net2big_v2/Kconfig delete mode 100644 board/LaCie/net2big_v2/MAINTAINERS delete mode 100644 board/LaCie/net2big_v2/Makefile delete mode 100644 board/LaCie/net2big_v2/kwbimage.cfg delete mode 100644 board/LaCie/net2big_v2/net2big_v2.c delete mode 100644 board/LaCie/net2big_v2/net2big_v2.h delete mode 100644 board/LaCie/netspace_v2/Kconfig delete mode 100644 board/LaCie/netspace_v2/MAINTAINERS delete mode 100644 board/LaCie/netspace_v2/Makefile delete mode 100644 board/LaCie/netspace_v2/kwbimage-is2.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage-ns2l.cfg delete mode 100644 board/LaCie/netspace_v2/kwbimage.cfg delete mode 100644 board/LaCie/netspace_v2/netspace_v2.c delete mode 100644 board/LaCie/netspace_v2/netspace_v2.h delete mode 100644 configs/d2net_v2_defconfig delete mode 100644 configs/inetspace_v2_defconfig delete mode 100644 configs/net2big_v2_defconfig delete mode 100644 configs/netspace_lite_v2_defconfig delete mode 100644 configs/netspace_max_v2_defconfig delete mode 100644 configs/netspace_mini_v2_defconfig delete mode 100644 configs/netspace_v2_defconfig delete mode 100644 include/configs/lacie_kw.h
-- 2.25.1
On Fri, Jun 19, 2020 at 8:31 PM Chris Packham judge.packham@gmail.com wrote:
Hi Jagan,
On Fri, 19 Jun 2020, 5:45 AM Jagan Teki, jagan@amarulasolutions.com wrote:
Series of kirkwood boards to switch DM_SPI and drop which are not DM enabled still.
Any inputs? Jagan.
I had a quick glance over the series and it looks good to me.
I'm fortunate enough to be able to get into the office so I'll try and give this a spin on the kirkwood board I have on Monday.
Tooks a bit longer to dust off the kirkwood board than I expected. For this series
Tested-by: Chris Packham judge.packham@gmail.com
participants (4)
-
Chris Packham -
Jagan Teki -
Simon Guinot -
Tom Rini