[U-Boot] [PATCH] powerpc/85xx: Fix setting of LIODN prop in PCIe nodes on P3041/P5020

From: Laurentiu TUDOR Laurentiu.Tudor@freescale.com
We utilize the compatible string to find the node to add fsl,liodn property to. However P3041 & P5020 don't have "fsl,p4080-pcie" compatible for their PCIe controllers as they aren't backwards compatible.
Allow the macro's to specify the PCIe compatible to use to allow SoC uniqueness. On P3041 & P5020 we utilize "fsl,qoriq-pcie-v2.2" for the PCIe controllers.
Signed-off-by: Laurentiu TUDOR Laurentiu.Tudor@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org --- arch/powerpc/cpu/mpc85xx/p3041_ids.c | 10 +++++----- arch/powerpc/cpu/mpc85xx/p4080_ids.c | 8 ++++---- arch/powerpc/cpu/mpc85xx/p5020_ids.c | 10 +++++----- arch/powerpc/include/asm/fsl_liodn.h | 4 ++-- 4 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index febbee9..1255898 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -1,5 +1,5 @@ /* - * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -52,10 +52,10 @@ struct liodn_id_table liodn_tbl[] = { SET_SATA_LIODN(1, 127), SET_SATA_LIODN(2, 128),
- SET_PCI_LIODN(1, 193), - SET_PCI_LIODN(2, 194), - SET_PCI_LIODN(3, 195), - SET_PCI_LIODN(4, 196), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
SET_DMA_LIODN(1, 197), SET_DMA_LIODN(2, 198), diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index df25048..fd155c8 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -1,5 +1,5 @@ /* - * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -44,9 +44,9 @@ struct liodn_id_table liodn_tbl[] = {
SET_SDHC_LIODN(1, 156),
- SET_PCI_LIODN(1, 193), - SET_PCI_LIODN(2, 194), - SET_PCI_LIODN(3, 195), + SET_PCI_LIODN("fsl,p4080-pcie", 1, 193), + SET_PCI_LIODN("fsl,p4080-pcie", 2, 194), + SET_PCI_LIODN("fsl,p4080-pcie", 3, 195),
SET_DMA_LIODN(1, 196), SET_DMA_LIODN(2, 197), diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index febbee9..1255898 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -1,5 +1,5 @@ /* - * Copyright 2010 Freescale Semiconductor, Inc. + * Copyright 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -52,10 +52,10 @@ struct liodn_id_table liodn_tbl[] = { SET_SATA_LIODN(1, 127), SET_SATA_LIODN(2, 128),
- SET_PCI_LIODN(1, 193), - SET_PCI_LIODN(2, 194), - SET_PCI_LIODN(3, 195), - SET_PCI_LIODN(4, 196), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195), + SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
SET_DMA_LIODN(1, 197), SET_DMA_LIODN(2, 198), diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index f76676c..0ec5c0a 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -70,8 +70,8 @@ extern void fdt_fixup_liodn(void *blob); SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\ CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
-#define SET_PCI_LIODN(pciNum, liodn) \ - SET_GUTS_LIODN("fsl,p4080-pcie", liodn, pex##pciNum##liodnr,\ +#define SET_PCI_LIODN(compat, pciNum, liodn) \ + SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\ CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
/* reg nodes for DMA start @ 0x300 */

On Mar 15, 2011, at 1:14 PM, Kumar Gala wrote:
From: Laurentiu TUDOR Laurentiu.Tudor@freescale.com
We utilize the compatible string to find the node to add fsl,liodn property to. However P3041 & P5020 don't have "fsl,p4080-pcie" compatible for their PCIe controllers as they aren't backwards compatible.
Allow the macro's to specify the PCIe compatible to use to allow SoC uniqueness. On P3041 & P5020 we utilize "fsl,qoriq-pcie-v2.2" for the PCIe controllers.
Signed-off-by: Laurentiu TUDOR Laurentiu.Tudor@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org
arch/powerpc/cpu/mpc85xx/p3041_ids.c | 10 +++++----- arch/powerpc/cpu/mpc85xx/p4080_ids.c | 8 ++++---- arch/powerpc/cpu/mpc85xx/p5020_ids.c | 10 +++++----- arch/powerpc/include/asm/fsl_liodn.h | 4 ++-- 4 files changed, 16 insertions(+), 16 deletions(-)
applied to 85xx next
- k
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Kumar Gala