[U-Boot] [PATCH] OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000.
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com ---
Changes from Mani's original patch which is replaced by this [1]:
* Don't remove overflow handling in get_timer_masked() * Update omap3_zoom1.h, too. * Clean up timer related comments and macros in config files * Don't touch reset_timer_masked() * Switch divider clock divider from 256 to 8 to be able to get 1000Hz * Remove unused udelay_masked() * Minor clean up of get_tbclk()
[1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html
This patch is against U-Boot mainline commit 'b3dd629e78870ba2dc9f8032978721c0fa02a856' 'Prepare 2009.03-rc2'
cpu/arm_cortexa8/omap3/interrupts.c | 50 +++++++++++------------------------- include/configs/omap3_beagle.h | 11 +++---- include/configs/omap3_evm.h | 15 +++++----- include/configs/omap3_overo.h | 11 +++---- include/configs/omap3_pandora.h | 11 +++---- include/configs/omap3_zoom1.h | 11 +++---- 6 files changed, 43 insertions(+), 66 deletions(-)
Index: u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c =================================================================== --- u-boot-main.orig/cpu/arm_cortexa8/omap3/interrupts.c +++ u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c @@ -169,7 +169,16 @@ static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
-/* nothing really to do with interrupts, just starts up a counter. */ +/* + * Nothing really to do with interrupts, just starts up a counter. + * We run the counter with 13MHz, divided by 8, resulting in timer + * frequency of 1.625MHz. With 32bit counter register, counter + * overflows in ~44min + */ + +/* 13MHz / 8 = 1.625MHz */ +#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PVT)) + int interrupt_init(void) { /* start the counter ticking up, reload value on overflow */ @@ -232,50 +241,25 @@ void udelay(unsigned long usec) void reset_timer_masked(void) { /* reset time, capture current incrementer value time */ - lastinc = readl(&timer_base->tcrr); + lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); timestamp = 0; /* start "advancing" time stamp from 0 */ }
ulong get_timer_masked(void) { - ulong now = readl(&timer_base->tcrr); /* current tick value */ + /* current tick value */ + ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
if (now >= lastinc) /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ timestamp += (now - lastinc); else /* we have rollover of incrementer */ - timestamp += (0xFFFFFFFF - lastinc) + now; + timestamp += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ)) + - lastinc) + now; lastinc = now; return timestamp; }
-/* waits specified delay value and resets timestamp */ -void udelay_masked(unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - /* if "big" number, spread normalization to seconds */ - if (usec >= 1000) { - /* start to normalize for usec to ticks per sec */ - tmo = usec / 1000; - /* find number of "ticks" to wait to achieve target */ - tmo *= CONFIG_SYS_HZ; - tmo /= 1000; /* finish normalize. */ - } else { /* else small number, */ - /* don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000 * 1000); - } - endtime = get_timer_masked() + tmo; - - do { - ulong now = get_timer_masked(); - diff = endtime - now; - } while (diff >= 0); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. @@ -291,7 +275,5 @@ unsigned long long get_ticks(void) */ ulong get_tbclk(void) { - ulong tbclk; - tbclk = CONFIG_SYS_HZ; - return tbclk; + return CONFIG_SYS_HZ; } Index: u-boot-main/include/configs/omap3_beagle.h =================================================================== --- u-boot-main.orig/include/configs/omap3_beagle.h +++ u-boot-main/include/configs/omap3_beagle.h @@ -220,14 +220,13 @@ /* load address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_evm.h =================================================================== --- u-boot-main.orig/include/configs/omap3_evm.h +++ u-boot-main/include/configs/omap3_evm.h @@ -216,17 +216,16 @@ /* in Hz */
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ - /* address */
+ /* address */ /* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define V_PVT 7 - -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_overo.h =================================================================== --- u-boot-main.orig/include/configs/omap3_overo.h +++ u-boot-main/include/configs/omap3_overo.h @@ -213,14 +213,13 @@ /* address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_pandora.h =================================================================== --- u-boot-main.orig/include/configs/omap3_pandora.h +++ u-boot-main/include/configs/omap3_pandora.h @@ -215,14 +215,13 @@ /* address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_zoom1.h =================================================================== --- u-boot-main.orig/include/configs/omap3_zoom1.h +++ u-boot-main/include/configs/omap3_zoom1.h @@ -222,14 +222,13 @@ /* load address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define V_PVT 7 - #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT)) +#define CONFIG_SYS_PVT 2 /* Divisor: 2^(PVT+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes
On 11:19 Tue 17 Mar , Dirk Behme wrote:
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
Changes from Mani's original patch which is replaced by this [1]:
- Don't remove overflow handling in get_timer_masked()
- Update omap3_zoom1.h, too.
- Clean up timer related comments and macros in config files
- Don't touch reset_timer_masked()
- Switch divider clock divider from 256 to 8 to be able to get 1000Hz
- Remove unused udelay_masked()
- Minor clean up of get_tbclk()
[1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html
This patch is against U-Boot mainline commit 'b3dd629e78870ba2dc9f8032978721c0fa02a856' 'Prepare 2009.03-rc2'
cpu/arm_cortexa8/omap3/interrupts.c | 50 +++++++++++------------------------- include/configs/omap3_beagle.h | 11 +++---- include/configs/omap3_evm.h | 15 +++++----- include/configs/omap3_overo.h | 11 +++---- include/configs/omap3_pandora.h | 11 +++---- include/configs/omap3_zoom1.h | 11 +++---- 6 files changed, 43 insertions(+), 66 deletions(-)
Index: u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/interrupts.c +++ u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c @@ -169,7 +169,16 @@ static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
-/* nothing really to do with interrupts, just starts up a counter. */ +/*
- Nothing really to do with interrupts, just starts up a counter.
- We run the counter with 13MHz, divided by 8, resulting in timer
- frequency of 1.625MHz. With 32bit counter register, counter
- overflows in ~44min
- */
It will be better to use the 12Mhz source clock and set the divider to 4 so you will a a timer frequency to 3MHz and a perfect Match clock it will overflow ealier but the timer will be exact
Best Regards, J.
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 11:19 Tue 17 Mar , Dirk Behme wrote:
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
Changes from Mani's original patch which is replaced by this [1]:
- Don't remove overflow handling in get_timer_masked()
- Update omap3_zoom1.h, too.
- Clean up timer related comments and macros in config files
- Don't touch reset_timer_masked()
- Switch divider clock divider from 256 to 8 to be able to get 1000Hz
- Remove unused udelay_masked()
- Minor clean up of get_tbclk()
[1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html
This patch is against U-Boot mainline commit 'b3dd629e78870ba2dc9f8032978721c0fa02a856' 'Prepare 2009.03-rc2'
cpu/arm_cortexa8/omap3/interrupts.c | 50 +++++++++++------------------------- include/configs/omap3_beagle.h | 11 +++---- include/configs/omap3_evm.h | 15 +++++----- include/configs/omap3_overo.h | 11 +++---- include/configs/omap3_pandora.h | 11 +++---- include/configs/omap3_zoom1.h | 11 +++---- 6 files changed, 43 insertions(+), 66 deletions(-)
Index: u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/interrupts.c +++ u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c @@ -169,7 +169,16 @@ static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
-/* nothing really to do with interrupts, just starts up a counter. */ +/*
- Nothing really to do with interrupts, just starts up a counter.
- We run the counter with 13MHz, divided by 8, resulting in timer
- frequency of 1.625MHz. With 32bit counter register, counter
- overflows in ~44min
- */
It will be better to use the 12Mhz source clock and set the divider to 4 so you will a a timer frequency to 3MHz and a perfect Match clock it will overflow ealier but the timer will be exact
Why do you think that existing code doesn't give exact value? With this patch we get a nice 1000 Hz tick.
Existing patch is the most non-intrusive (i.e. touch only what's necessary), easy and small fix for broken OMAP3 timer code. And it gives fine 1000 Hz. Yes, everything can be done more perfect. But often this isn't necessary. So please apply this version.
Dirk
Btw.: Could be agree on the "without too long delays" part of
http://lists.denx.de/pipermail/u-boot/2009-March/049885.html
?
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090331202939.GI24923@game.jcrosoft.org you wrote:
On 11:19 Tue 17 Mar , Dirk Behme wrote:
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
What is the status of this patch?
I see no reason to delay it.
Best regards,
Wolfgang Denk
On Thu, Apr 02, 2009 at 12:43:53AM +0200, Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090331202939.GI24923@game.jcrosoft.org you wrote:
On 11:19 Tue 17 Mar , Dirk Behme wrote:
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
What is the status of this patch?
I see no reason to delay it.
Wolfgang,
it will no longer apply beacuse of commit 81472d893fa565c9d300928a40e504a689bde131 and I feel a bit shy for causing troubles, updated follows in separate mail
Best regards, ladis
From: Manikandan Pillai mani.pillai@ti.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com Signed-off-by: Ladislav Michl ladis@linux-mips.org --- Changes from Dirk's patch which is replaced by this [2]:
* Fix conflicts after commit 81472d893fa565c9d300928a40e504a689bde131
Changes from Mani's original patch which is replaced by this [1]:
* Don't remove overflow handling in get_timer_masked() * Update omap3_zoom1.h, too. * Clean up timer related comments and macros in config files * Don't touch reset_timer_masked() * Switch divider clock divider from 256 to 8 to be able to get 1000Hz * Remove unused udelay_masked() * Minor clean up of get_tbclk()
[1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html [2] http://lists.denx.de/pipermail/u-boot/2009-March/049146.html --- cpu/arm_cortexa8/omap3/interrupts.c | 50 +++++++++++----------------------- include/configs/omap3_beagle.h | 9 +++--- include/configs/omap3_evm.h | 9 +++--- include/configs/omap3_overo.h | 12 ++++---- include/configs/omap3_pandora.h | 11 ++++--- include/configs/omap3_zoom1.h | 11 ++++--- 6 files changed, 44 insertions(+), 58 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c index 5d9c4e3..c75bc8b 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/interrupts.c @@ -169,7 +169,16 @@ static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
-/* nothing really to do with interrupts, just starts up a counter. */ +/* + * Nothing really to do with interrupts, just starts up a counter. + * We run the counter with 13MHz, divided by 8, resulting in timer + * frequency of 1.625MHz. With 32bit counter register, counter + * overflows in ~44min + */ + +/* 13MHz / 8 = 1.625MHz */ +#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) + int interrupt_init(void) { /* start the counter ticking up, reload value on overflow */ @@ -232,50 +241,25 @@ void udelay(unsigned long usec) void reset_timer_masked(void) { /* reset time, capture current incrementer value time */ - lastinc = readl(&timer_base->tcrr); + lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); timestamp = 0; /* start "advancing" time stamp from 0 */ }
ulong get_timer_masked(void) { - ulong now = readl(&timer_base->tcrr); /* current tick value */ + /* current tick value */ + ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
if (now >= lastinc) /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ timestamp += (now - lastinc); else /* we have rollover of incrementer */ - timestamp += (0xFFFFFFFF - lastinc) + now; + timestamp += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ)) + - lastinc) + now; lastinc = now; return timestamp; }
-/* waits specified delay value and resets timestamp */ -void udelay_masked(unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - /* if "big" number, spread normalization to seconds */ - if (usec >= 1000) { - /* start to normalize for usec to ticks per sec */ - tmo = usec / 1000; - /* find number of "ticks" to wait to achieve target */ - tmo *= CONFIG_SYS_HZ; - tmo /= 1000; /* finish normalize. */ - } else { /* else small number, */ - /* don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000 * 1000); - } - endtime = get_timer_masked() + tmo; - - do { - ulong now = get_timer_masked(); - diff = endtime - now; - } while (diff >= 0); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. @@ -291,7 +275,5 @@ unsigned long long get_ticks(void) */ ulong get_tbclk(void) { - ulong tbclk; - tbclk = CONFIG_SYS_HZ; - return tbclk; + return CONFIG_SYS_HZ; } diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 7db1eb7..88a57d3 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -223,12 +223,13 @@ /* load address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 2f532d5..d36e689 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -216,12 +216,13 @@ /* address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 0c32100..ec8529e 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -208,14 +208,14 @@
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ - /* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index fb4e50d..f44d071 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -212,12 +212,13 @@ /* address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 883234a..bfe40b3 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -220,12 +220,13 @@ /* load address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes
On Thu, Apr 02, 2009 at 12:43:53AM +0200, Wolfgang Denk wrote:
In message 20090331202939.GI24923@game.jcrosoft.org you wrote:
On 11:19 Tue 17 Mar , Dirk Behme wrote:
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
What is the status of this patch?
I see no reason to delay it.
After messing with OMAP1 timer code (which is copied again and again over tree) I found such a reason. It is called 'void udelay(unsigned long usec)' implementation and I hereby leaving its bugfixing as an excercise for a reader [1]. Patch 'arm925t: Fix CONFIG_SYS_HZ to 1000', which is on its way to the list, can be used as a reference. Oh well, since it seems unlikely proper timer API will step in before 2009.06 leaves the door, let's fix it one by one...
ladis
[1] Diligent reader is welcome to base his work on the updated patch http://lists.denx.de/pipermail/u-boot/2009-April/050170.html
Dear Ladis,
Ladislav Michl wrote:
On Thu, Apr 02, 2009 at 12:43:53AM +0200, Wolfgang Denk wrote:
In message 20090331202939.GI24923@game.jcrosoft.org you wrote:
On 11:19 Tue 17 Mar , Dirk Behme wrote:
Fix OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000. Clean up macros and comments.
Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
What is the status of this patch?
I see no reason to delay it.
After messing with OMAP1 timer code (which is copied again and again over tree) I found such a reason. It is called 'void udelay(unsigned long usec)' implementation and I hereby leaving its bugfixing as an excercise for a reader [1].
Would you mind giving some more details? This would avoid wasting time to re-think about it (and maybe doing it wrong again) and would let us better use the time for fixing the issues you see.
Many thanks
Dirk
Patch 'arm925t: Fix CONFIG_SYS_HZ to 1000', which is on its way to the list, can be used as a reference. Oh well, since it seems unlikely proper timer API will step in before 2009.06 leaves the door, let's fix it one by one...
ladis
[1] Diligent reader is welcome to base his work on the updated patch http://lists.denx.de/pipermail/u-boot/2009-April/050170.html
On Mon, Apr 20, 2009 at 07:27:29PM +0200, Dirk Behme wrote:
Ladislav Michl wrote:
After messing with OMAP1 timer code (which is copied again and again over tree) I found such a reason. It is called 'void udelay(unsigned long usec)' implementation and I hereby leaving its bugfixing as an excercise for a reader [1].
Would you mind giving some more details? This would avoid wasting time to re-think about it (and maybe doing it wrong again) and would let us better use the time for fixing the issues you see.
udelay is implemented using get_timer_masked and since that omap3 patch limits timer resolution to 1ms, you get into trouble asking it to delay 100us as some drivers do.
ladis
participants (4)
-
Dirk Behme -
Jean-Christophe PLAGNIOL-VILLARD -
Ladislav Michl -
Wolfgang Denk