[U-Boot] [PATCH v2 0/6] x86: Support microcode in a single place
As part of the effort to support Atom processors it became apparent the they can only support microcode updates before RAM is available. In this early environment the device tree is not available.
This series solves this problem by updating ifdtool to provide very early microcode access on these platforms.
Changes in v2: - Add function comments - Fix problem with specifying the full microcode filename - Allow 'list' command to display a list of matching microcode chunks - Print a message when generating microcode - Expand the help a little - Print an error when an ambiguous microcode model is given - Finish off comments in write_uboot() function - Write the correct microcode pointer to U-Boot (fix fdt->addr bug) - Update microcode with output from updated tool - Add new patch to correct problems in the microcode loading - Update microcode file to version 5_cv - Drop patches that have already been applied
Simon Glass (6): x86: Add a script to process Intel microcode files x86: ifdtool: Add support for early microcode access x86: Move microcode updates into a separate directory x86: ivybridge: Update the microcode x86: Correct problems in the microcode loading x86: Convert microcode format to device-tree-only
Makefile | 4 +- arch/x86/cpu/ivybridge/microcode_intel.c | 27 +- arch/x86/cpu/queensbay/M0220661105.inc | 1288 ------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/link.dts | 4 +- arch/x86/dts/m12206a7_00000028.dtsi | 622 ------------ arch/x86/dts/m12306a9_00000017.dtsi | 750 -------------- arch/x86/dts/microcode/m0220661105_cv.dtsi | 366 +++++++ arch/x86/dts/microcode/m12206a7_00000029.dtsi | 686 +++++++++++++ arch/x86/dts/microcode/m12306a9_0000001b.dtsi | 814 ++++++++++++++++ tools/Makefile | 1 + tools/ifdtool.c | 110 ++- tools/microcode-tool | 1 + tools/microcode-tool.py | 245 +++++ 15 files changed, 2248 insertions(+), 2688 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc delete mode 100644 arch/x86/dts/m12206a7_00000028.dtsi delete mode 100644 arch/x86/dts/m12306a9_00000017.dtsi create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi create mode 100644 arch/x86/dts/microcode/m12206a7_00000029.dtsi create mode 100644 arch/x86/dts/microcode/m12306a9_0000001b.dtsi create mode 120000 tools/microcode-tool create mode 100755 tools/microcode-tool.py
Intel delivers microcode updates in a microcode.dat file which must be split up into individual files for each CPU. Add a tool which performs this task. It can list available microcode updates for each model and produce a new microcode update in U-Boot's .dtsi format.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Add function comments - Fix problem with specifying the full microcode filename - Allow 'list' command to display a list of matching microcode chunks - Print a message when generating microcode - Expand the help a little - Print an error when an ambiguous microcode model is given
tools/microcode-tool | 1 + tools/microcode-tool.py | 245 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 246 insertions(+) create mode 120000 tools/microcode-tool create mode 100755 tools/microcode-tool.py
diff --git a/tools/microcode-tool b/tools/microcode-tool new file mode 120000 index 0000000..8be8507 --- /dev/null +++ b/tools/microcode-tool @@ -0,0 +1 @@ +microcode-tool.py \ No newline at end of file diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py new file mode 100755 index 0000000..5dbb0db --- /dev/null +++ b/tools/microcode-tool.py @@ -0,0 +1,245 @@ +#!/usr/bin/env python +# +# Copyright (c) 2014 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# +# +# Intel microcode update tool + +from optparse import OptionParser +import os +import re +import struct +import sys + +MICROCODE_DIR = 'arch/x86/dts/microcode' + +class Microcode: + """Holds information about the microcode for a particular model of CPU. + + Attributes: + name: Name of the CPU this microcode is for, including any version + information (e.g. 'm12206a7_00000029') + model: Model code string (this is cpuid(1).eax, e.g. '206a7') + words: List of hex words containing the microcode. The first 16 words + are the public header. + """ + def __init__(self, name, data): + self.name = name + # Convert data into a list of hex words + self.words = [] + for value in ''.join(data).split(','): + hexval = value.strip() + if hexval: + self.words.append(int(hexval, 0)) + + # The model is in the 4rd hex word + self.model = '%x' % self.words[3] + +def ParseFile(fname): + """Parse a micrcode.dat file and return the component parts + + Args: + fname: Filename to parse + Returns: + 3-Tuple: + date: String containing date from the file's header + license: List of text lines for the license file + microcodes: List of Microcode objects from the file + """ + re_date = re.compile('/* *(.* [0-9]{4}) **/$') + re_license = re.compile('/[^-*+] *(.*)$') + re_name = re.compile('/* *(.*).inc **/', re.IGNORECASE) + microcodes = {} + license = [] + date = '' + data = [] + name = None + with open(fname) as fd: + for line in fd: + line = line.rstrip() + m_date = re_date.match(line) + m_license = re_license.match(line) + m_name = re_name.match(line) + if m_name: + if name: + microcodes[name] = Microcode(name, data) + name = m_name.group(1).lower() + data = [] + elif m_license: + license.append(m_license.group(1)) + elif m_date: + date = m_date.group(1) + else: + data.append(line) + if name: + microcodes[name] = Microcode(name, data) + return date, license, microcodes + +def List(date, microcodes, model): + """List the available microcode chunks + + Args: + date: Date of the microcode file + microcodes: Dict of Microcode objects indexed by name + model: Model string to search for, or None + """ + print 'Date: %s' % date + if model: + mcode_list, tried = FindMicrocode(microcodes, model.lower()) + print 'Matching models %s:' % (', '.join(tried)) + else: + print 'All models:' + mcode_list = [microcodes[m] for m in microcodes.keys()] + for mcode in mcode_list: + print '%-20s: model %s' % (mcode.name, mcode.model) + +def FindMicrocode(microcodes, model): + """Find all the microcode chunks which match the given model. + + This model is something like 306a9 (the value returned in eax from + cpuid(1) when running on Intel CPUs). But we allow a partial match, + omitting the last 1 or two characters to allow many families to have the + same microcode. + + If the model name is ambiguous we return a list of matches. + + Args: + microcodes: Dict of Microcode objects indexed by name + model: String containing model name to find + Returns: + Tuple: + List of matching Microcode objects + List of abbreviations we tried + """ + # Allow a full name to be used + mcode = microcodes.get(model) + if mcode: + return [mcode], [] + + tried = [] + found = [] + for i in range(3): + abbrev = model[:-i] if i else model + tried.append(abbrev) + for mcode in microcodes.values(): + if mcode.model.startswith(abbrev): + found.append(mcode) + if found: + break + return found, tried + +def CreateFile(date, license, mcode, outfile): + """Create a microcode file in U-Boot's .dtsi format + + Args: + date: String containing date of original microcode file + license: List of text lines for the license file + mcode: Microcode object to write + outfile: Filename to write to ('-' for stdout) + """ + out = '''/*%s + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <%d>; +intel,update-revision = <%#x>; +intel,date-code = <%#x>; +intel,processor-signature = <%#x>; +intel,checksum = <%#x>; +intel,loader-revision = <%d>; +intel,processor-flags = <%#x>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = <%s +\t>;''' + words = '' + for i in range(len(mcode.words)): + if not (i & 3): + words += '\n' + val = mcode.words[i] + # Change each word so it will be little-endian in the FDT + # This data is needed before RAM is available on some platforms so we + # cannot do an endianness swap on boot. + val = struct.unpack("<I", struct.pack(">I", val))[0] + words += '\t%#010x' % val + + # Take care to avoid adding a space before a tab + text = '' + for line in license: + if line[0] == '\t': + text += '\n *' + line + else: + text += '\n * ' + line + args = [text] + args += [mcode.words[i] for i in range(7)] + args.append(words) + if outfile == '-': + print out % tuple(args) + else: + if not outfile: + outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi') + print >>sys.stderr, "Writing micrcode for '%s' to '%s'" % ( + mcode.name, outfile) + with open(outfile, 'w') as fd: + print >>fd, out % tuple(args) + + +commands = 'create,license,list'.split(',') +parser = OptionParser() +parser.add_option('-d', '--mcfile', type='string', action='store', + help='Name of microcode.dat file') +parser.add_option('-m', '--model', type='string', action='store', + help='Model name to extract') +parser.add_option('-o', '--outfile', type='string', action='store', + help='Filename to use for output (- for stdout), default is' + ' %s/<name>.dtsi' % MICROCODE_DIR) +parser.usage += """ command + +Process an Intel microcode file (use -h for help). Commands: + + create Create microcode .dtsi file for a model + list List available models in microcode file + license Print the license + +Typical usage: + + ./tools/microcode-tool -d microcode.dat -m 306a create + +This will find the appropriate file and write it to %s.""" % MICROCODE_DIR + +(options, args) = parser.parse_args() +if not args: + parser.error('Please specify a command') +cmd = args[0] +if cmd not in commands: + parser.error("Unknown command '%s'" % cmd) + +if not options.mcfile: + parser.error('You must specify a microcode file') +date, license, microcodes = ParseFile(options.mcfile) + +if cmd == 'list': + List(date, microcodes, options.model) +elif cmd == 'license': + print '\n'.join(license) +elif cmd == 'create': + if not options.model: + parser.error('You must specify a model to create') + model = options.model.lower() + mcode_list, tried = FindMicrocode(microcodes, model) + if not mcode_list: + parser.error("Unknown model '%s' (%s) - try 'list' to list" % + (model, ', '.join(tried))) + if len(mcode_list) > 1: + parser.error("Ambiguous model '%s' (%s) matched %s - try 'list' to list" + " or specify a particular file" % + (model, ', '.join(tried), + ', '.join([m.name for m in mcode_list]))) + CreateFile(date, license, mcode_list[0], options.outfile) +else: + parser.error("Unknown command '%s'" % cmd)
Hi Simon,
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
Intel delivers microcode updates in a microcode.dat file which must be split up into individual files for each CPU. Add a tool which performs this task. It can list available microcode updates for each model and produce a new microcode update in U-Boot's .dtsi format.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Add function comments
- Fix problem with specifying the full microcode filename
- Allow 'list' command to display a list of matching microcode chunks
- Print a message when generating microcode
- Expand the help a little
- Print an error when an ambiguous microcode model is given
tools/microcode-tool | 1 + tools/microcode-tool.py | 245 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 246 insertions(+) create mode 120000 tools/microcode-tool create mode 100755 tools/microcode-tool.py
diff --git a/tools/microcode-tool b/tools/microcode-tool new file mode 120000 index 0000000..8be8507 --- /dev/null +++ b/tools/microcode-tool @@ -0,0 +1 @@ +microcode-tool.py \ No newline at end of file diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py new file mode 100755 index 0000000..5dbb0db --- /dev/null +++ b/tools/microcode-tool.py @@ -0,0 +1,245 @@ +#!/usr/bin/env python +# +# Copyright (c) 2014 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# +# +# Intel microcode update tool
+from optparse import OptionParser +import os +import re +import struct +import sys
+MICROCODE_DIR = 'arch/x86/dts/microcode'
+class Microcode:
- """Holds information about the microcode for a particular model of CPU.
- Attributes:
name: Name of the CPU this microcode is for, including any versioninformation (e.g. 'm12206a7_00000029')model: Model code string (this is cpuid(1).eax, e.g. '206a7')words: List of hex words containing the microcode. The first 16 wordsare the public header.- """
- def __init__(self, name, data):
self.name = name# Convert data into a list of hex wordsself.words = []for value in ''.join(data).split(','):hexval = value.strip()if hexval:self.words.append(int(hexval, 0))# The model is in the 4rd hex wordself.model = '%x' % self.words[3]+def ParseFile(fname):
- """Parse a micrcode.dat file and return the component parts
- Args:
fname: Filename to parse- Returns:
3-Tuple:date: String containing date from the file's headerlicense: List of text lines for the license filemicrocodes: List of Microcode objects from the file- """
- re_date = re.compile('/* *(.* [0-9]{4}) **/$')
- re_license = re.compile('/[^-*+] *(.*)$')
- re_name = re.compile('/* *(.*).inc **/', re.IGNORECASE)
- microcodes = {}
- license = []
- date = ''
- data = []
- name = None
- with open(fname) as fd:
for line in fd:line = line.rstrip()m_date = re_date.match(line)m_license = re_license.match(line)m_name = re_name.match(line)if m_name:if name:microcodes[name] = Microcode(name, data)name = m_name.group(1).lower()data = []elif m_license:license.append(m_license.group(1))elif m_date:date = m_date.group(1)else:data.append(line)- if name:
microcodes[name] = Microcode(name, data)- return date, license, microcodes
+def List(date, microcodes, model):
- """List the available microcode chunks
- Args:
date: Date of the microcode filemicrocodes: Dict of Microcode objects indexed by namemodel: Model string to search for, or None- """
- print 'Date: %s' % date
- if model:
mcode_list, tried = FindMicrocode(microcodes, model.lower())print 'Matching models %s:' % (', '.join(tried))- else:
print 'All models:'mcode_list = [microcodes[m] for m in microcodes.keys()]- for mcode in mcode_list:
print '%-20s: model %s' % (mcode.name, mcode.model)+def FindMicrocode(microcodes, model):
- """Find all the microcode chunks which match the given model.
- This model is something like 306a9 (the value returned in eax from
- cpuid(1) when running on Intel CPUs). But we allow a partial match,
- omitting the last 1 or two characters to allow many families to have the
- same microcode.
- If the model name is ambiguous we return a list of matches.
- Args:
microcodes: Dict of Microcode objects indexed by namemodel: String containing model name to find- Returns:
Tuple:List of matching Microcode objectsList of abbreviations we tried- """
- # Allow a full name to be used
- mcode = microcodes.get(model)
- if mcode:
return [mcode], []- tried = []
- found = []
- for i in range(3):
abbrev = model[:-i] if i else modeltried.append(abbrev)for mcode in microcodes.values():if mcode.model.startswith(abbrev):found.append(mcode)if found:break- return found, tried
+def CreateFile(date, license, mcode, outfile):
- """Create a microcode file in U-Boot's .dtsi format
- Args:
date: String containing date of original microcode filelicense: List of text lines for the license filemcode: Microcode object to writeoutfile: Filename to write to ('-' for stdout)- """
- out = '''/*%s
- This is a device tree fragment. Use #include to add these properties to a
- node.
- */
+compatible = "intel,microcode"; +intel,header-version = <%d>; +intel,update-revision = <%#x>; +intel,date-code = <%#x>; +intel,processor-signature = <%#x>; +intel,checksum = <%#x>; +intel,loader-revision = <%d>; +intel,processor-flags = <%#x>;
+/* The first 48-bytes are the public header which repeats the above data */ +data = <%s +\t>;'''
- words = ''
- for i in range(len(mcode.words)):
if not (i & 3):words += '\n'val = mcode.words[i]# Change each word so it will be little-endian in the FDT# This data is needed before RAM is available on some platforms so we# cannot do an endianness swap on boot.val = struct.unpack("<I", struct.pack(">I", val))[0]words += '\t%#010x' % val- # Take care to avoid adding a space before a tab
- text = ''
- for line in license:
if line[0] == '\t':text += '\n *' + lineelse:text += '\n * ' + line- args = [text]
- args += [mcode.words[i] for i in range(7)]
- args.append(words)
- if outfile == '-':
print out % tuple(args)- else:
if not outfile:outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi')print >>sys.stderr, "Writing micrcode for '%s' to '%s'" % (mcode.name, outfile)with open(outfile, 'w') as fd:print >>fd, out % tuple(args)+commands = 'create,license,list'.split(',') +parser = OptionParser() +parser.add_option('-d', '--mcfile', type='string', action='store',
help='Name of microcode.dat file')+parser.add_option('-m', '--model', type='string', action='store',
help='Model name to extract')+parser.add_option('-o', '--outfile', type='string', action='store',
help='Filename to use for output (- for stdout), default is'' %s/<name>.dtsi' % MICROCODE_DIR)+parser.usage += """ command
+Process an Intel microcode file (use -h for help). Commands:
- create Create microcode .dtsi file for a model
- list List available models in microcode file
- license Print the license
+Typical usage:
- ./tools/microcode-tool -d microcode.dat -m 306a create
+This will find the appropriate file and write it to %s.""" % MICROCODE_DIR
+(options, args) = parser.parse_args() +if not args:
- parser.error('Please specify a command')
+cmd = args[0] +if cmd not in commands:
- parser.error("Unknown command '%s'" % cmd)
+if not options.mcfile:
- parser.error('You must specify a microcode file')
+date, license, microcodes = ParseFile(options.mcfile)
+if cmd == 'list':
- List(date, microcodes, options.model)
+elif cmd == 'license':
- print '\n'.join(license)
+elif cmd == 'create':
- if not options.model:
parser.error('You must specify a model to create')- model = options.model.lower()
- mcode_list, tried = FindMicrocode(microcodes, model)
- if not mcode_list:
parser.error("Unknown model '%s' (%s) - try 'list' to list" %(model, ', '.join(tried)))- if len(mcode_list) > 1:
parser.error("Ambiguous model '%s' (%s) matched %s - try 'list' to list"" or specify a particular file" %(model, ', '.join(tried),', '.join([m.name for m in mcode_list])))- CreateFile(date, license, mcode_list[0], options.outfile)
+else:
- parser.error("Unknown command '%s'" % cmd)
--
$ ./tools/microcode-tool -d microcode.dat -m m0220661105_cv create Writing micrcode for 'm0220661105_cv' to 'arch/x86/dts/microcode/m0220661105_cv.dtsi' Traceback (most recent call last): File "./tools/microcode-tool", line 243, in <module> CreateFile(date, license, mcode_list[0], options.outfile) File "./tools/microcode-tool", line 188, in CreateFile with open(outfile, 'w') as fd: IOError: [Errno 2] No such file or directory: 'arch/x86/dts/microcode/m0220661105_cv.dtsi'
My understanding is that when calling microcode-tool without '-o' option, a default dtsi file will be created in arch/x86/dts/microcode/ directory with the model number as the file name. However testing above shows some python error. Could you please either print some user friendly message, or just create a default dtsi file?
Regards, Bin
Hi Bin,
On 16 December 2014 at 01:04, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
Intel delivers microcode updates in a microcode.dat file which must be split up into individual files for each CPU. Add a tool which performs this task. It can list available microcode updates for each model and produce a new microcode update in U-Boot's .dtsi format.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Add function comments
- Fix problem with specifying the full microcode filename
- Allow 'list' command to display a list of matching microcode chunks
- Print a message when generating microcode
- Expand the help a little
- Print an error when an ambiguous microcode model is given
tools/microcode-tool | 1 + tools/microcode-tool.py | 245 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 246 insertions(+) create mode 120000 tools/microcode-tool create mode 100755 tools/microcode-tool.py
diff --git a/tools/microcode-tool b/tools/microcode-tool new file mode 120000 index 0000000..8be8507 --- /dev/null +++ b/tools/microcode-tool @@ -0,0 +1 @@ +microcode-tool.py \ No newline at end of file diff --git a/tools/microcode-tool.py b/tools/microcode-tool.py new file mode 100755 index 0000000..5dbb0db --- /dev/null +++ b/tools/microcode-tool.py @@ -0,0 +1,245 @@ +#!/usr/bin/env python +# +# Copyright (c) 2014 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# +# +# Intel microcode update tool
+from optparse import OptionParser +import os +import re +import struct +import sys
+MICROCODE_DIR = 'arch/x86/dts/microcode'
+class Microcode:
- """Holds information about the microcode for a particular model of CPU.
- Attributes:
name: Name of the CPU this microcode is for, including any versioninformation (e.g. 'm12206a7_00000029')model: Model code string (this is cpuid(1).eax, e.g. '206a7')words: List of hex words containing the microcode. The first 16 wordsare the public header.- """
- def __init__(self, name, data):
self.name = name# Convert data into a list of hex wordsself.words = []for value in ''.join(data).split(','):hexval = value.strip()if hexval:self.words.append(int(hexval, 0))# The model is in the 4rd hex wordself.model = '%x' % self.words[3]+def ParseFile(fname):
- """Parse a micrcode.dat file and return the component parts
- Args:
fname: Filename to parse- Returns:
3-Tuple:date: String containing date from the file's headerlicense: List of text lines for the license filemicrocodes: List of Microcode objects from the file- """
- re_date = re.compile('/* *(.* [0-9]{4}) **/$')
- re_license = re.compile('/[^-*+] *(.*)$')
- re_name = re.compile('/* *(.*).inc **/', re.IGNORECASE)
- microcodes = {}
- license = []
- date = ''
- data = []
- name = None
- with open(fname) as fd:
for line in fd:line = line.rstrip()m_date = re_date.match(line)m_license = re_license.match(line)m_name = re_name.match(line)if m_name:if name:microcodes[name] = Microcode(name, data)name = m_name.group(1).lower()data = []elif m_license:license.append(m_license.group(1))elif m_date:date = m_date.group(1)else:data.append(line)- if name:
microcodes[name] = Microcode(name, data)- return date, license, microcodes
+def List(date, microcodes, model):
- """List the available microcode chunks
- Args:
date: Date of the microcode filemicrocodes: Dict of Microcode objects indexed by namemodel: Model string to search for, or None- """
- print 'Date: %s' % date
- if model:
mcode_list, tried = FindMicrocode(microcodes, model.lower())print 'Matching models %s:' % (', '.join(tried))- else:
print 'All models:'mcode_list = [microcodes[m] for m in microcodes.keys()]- for mcode in mcode_list:
print '%-20s: model %s' % (mcode.name, mcode.model)+def FindMicrocode(microcodes, model):
- """Find all the microcode chunks which match the given model.
- This model is something like 306a9 (the value returned in eax from
- cpuid(1) when running on Intel CPUs). But we allow a partial match,
- omitting the last 1 or two characters to allow many families to have the
- same microcode.
- If the model name is ambiguous we return a list of matches.
- Args:
microcodes: Dict of Microcode objects indexed by namemodel: String containing model name to find- Returns:
Tuple:List of matching Microcode objectsList of abbreviations we tried- """
- # Allow a full name to be used
- mcode = microcodes.get(model)
- if mcode:
return [mcode], []- tried = []
- found = []
- for i in range(3):
abbrev = model[:-i] if i else modeltried.append(abbrev)for mcode in microcodes.values():if mcode.model.startswith(abbrev):found.append(mcode)if found:break- return found, tried
+def CreateFile(date, license, mcode, outfile):
- """Create a microcode file in U-Boot's .dtsi format
- Args:
date: String containing date of original microcode filelicense: List of text lines for the license filemcode: Microcode object to writeoutfile: Filename to write to ('-' for stdout)- """
- out = '''/*%s
- This is a device tree fragment. Use #include to add these properties to a
- node.
- */
+compatible = "intel,microcode"; +intel,header-version = <%d>; +intel,update-revision = <%#x>; +intel,date-code = <%#x>; +intel,processor-signature = <%#x>; +intel,checksum = <%#x>; +intel,loader-revision = <%d>; +intel,processor-flags = <%#x>;
+/* The first 48-bytes are the public header which repeats the above data */ +data = <%s +\t>;'''
- words = ''
- for i in range(len(mcode.words)):
if not (i & 3):words += '\n'val = mcode.words[i]# Change each word so it will be little-endian in the FDT# This data is needed before RAM is available on some platforms so we# cannot do an endianness swap on boot.val = struct.unpack("<I", struct.pack(">I", val))[0]words += '\t%#010x' % val- # Take care to avoid adding a space before a tab
- text = ''
- for line in license:
if line[0] == '\t':text += '\n *' + lineelse:text += '\n * ' + line- args = [text]
- args += [mcode.words[i] for i in range(7)]
- args.append(words)
- if outfile == '-':
print out % tuple(args)- else:
if not outfile:outfile = os.path.join(MICROCODE_DIR, mcode.name + '.dtsi')print >>sys.stderr, "Writing micrcode for '%s' to '%s'" % (mcode.name, outfile)with open(outfile, 'w') as fd:print >>fd, out % tuple(args)+commands = 'create,license,list'.split(',') +parser = OptionParser() +parser.add_option('-d', '--mcfile', type='string', action='store',
help='Name of microcode.dat file')+parser.add_option('-m', '--model', type='string', action='store',
help='Model name to extract')+parser.add_option('-o', '--outfile', type='string', action='store',
help='Filename to use for output (- for stdout), default is'' %s/<name>.dtsi' % MICROCODE_DIR)+parser.usage += """ command
+Process an Intel microcode file (use -h for help). Commands:
- create Create microcode .dtsi file for a model
- list List available models in microcode file
- license Print the license
+Typical usage:
- ./tools/microcode-tool -d microcode.dat -m 306a create
+This will find the appropriate file and write it to %s.""" % MICROCODE_DIR
+(options, args) = parser.parse_args() +if not args:
- parser.error('Please specify a command')
+cmd = args[0] +if cmd not in commands:
- parser.error("Unknown command '%s'" % cmd)
+if not options.mcfile:
- parser.error('You must specify a microcode file')
+date, license, microcodes = ParseFile(options.mcfile)
+if cmd == 'list':
- List(date, microcodes, options.model)
+elif cmd == 'license':
- print '\n'.join(license)
+elif cmd == 'create':
- if not options.model:
parser.error('You must specify a model to create')- model = options.model.lower()
- mcode_list, tried = FindMicrocode(microcodes, model)
- if not mcode_list:
parser.error("Unknown model '%s' (%s) - try 'list' to list" %(model, ', '.join(tried)))- if len(mcode_list) > 1:
parser.error("Ambiguous model '%s' (%s) matched %s - try 'list' to list"" or specify a particular file" %(model, ', '.join(tried),', '.join([m.name for m in mcode_list])))- CreateFile(date, license, mcode_list[0], options.outfile)
+else:
- parser.error("Unknown command '%s'" % cmd)
--
$ ./tools/microcode-tool -d microcode.dat -m m0220661105_cv create Writing micrcode for 'm0220661105_cv' to 'arch/x86/dts/microcode/m0220661105_cv.dtsi' Traceback (most recent call last): File "./tools/microcode-tool", line 243, in <module> CreateFile(date, license, mcode_list[0], options.outfile) File "./tools/microcode-tool", line 188, in CreateFile with open(outfile, 'w') as fd: IOError: [Errno 2] No such file or directory: 'arch/x86/dts/microcode/m0220661105_cv.dtsi'
My understanding is that when calling microcode-tool without '-o' option, a default dtsi file will be created in arch/x86/dts/microcode/ directory with the model number as the file name. However testing above shows some python error. Could you please either print some user friendly message, or just create a default dtsi file?
I think it just needs to create the directory automatically. In my tree it already has this directory. The message seems OK to me though. I'll fix up the script a bit more.
Regards, Simon
Some Intel CPUs use an 'FSP' binary blob which provides an inflexible means of starting up the CPU. One result is that microcode updates can only be done before RAM is available and therefore parsing of the device tree is impracticle.
Worse, the addess of the microcode update must be stored in ROM since a pointer to its start address and size is passed to the 'FSP' blob. It is not possible to perform any calculations to obtain the address and size.
To work around this, ifdtool is enhanced to work out the address and size of the first microcode update it finds in the supplied device tree. It then writes these into the correct place in the ROM. U-Boot can then start up the FSP correctly.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Finish off comments in write_uboot() function - Write the correct microcode pointer to U-Boot (fix fdt->addr bug)
tools/Makefile | 1 + tools/ifdtool.c | 110 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 103 insertions(+), 8 deletions(-)
diff --git a/tools/Makefile b/tools/Makefile index a4216a1..e549f8e 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -126,6 +126,7 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl HOSTCFLAGS_mkexynosspl.o := -pedantic
+ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o hostprogs-$(CONFIG_X86) += ifdtool
hostprogs-$(CONFIG_MX23) += mxsboot diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 4077ba8..fe8366b 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -18,6 +18,7 @@ #include <unistd.h> #include <sys/types.h> #include <sys/stat.h> +#include <libfdt.h> #include "ifdtool.h"
#undef DEBUG @@ -34,6 +35,8 @@
enum input_file_type_t { IF_normal, + IF_fdt, + IF_uboot, };
struct input_file { @@ -703,7 +706,7 @@ int inject_region(char *image, int size, int region_type, char *region_fname) * 0xffffffff so use an address relative to that. For an * 8MB ROM the start address is 0xfff80000. * @write_fname: Filename to add to the image - * @return 0 if OK, -ve on error + * @return number of bytes written if OK, -ve on error */ static int write_data(char *image, int size, unsigned int addr, const char *write_fname) @@ -715,7 +718,7 @@ static int write_data(char *image, int size, unsigned int addr, if (write_fd < 0) return write_fd;
- offset = addr + size; + offset = (uint32_t)(addr + size); debug("Writing %s to offset %#x\n", write_fname, offset);
if (offset < 0 || offset + write_size > size) { @@ -731,6 +734,68 @@ static int write_data(char *image, int size, unsigned int addr,
close(write_fd);
+ return write_size; +} + +/** + * write_uboot() - Write U-Boot, device tree and microcode pointer + * + * This writes U-Boot into a place in the flash, followed by its device tree. + * The microcode pointer is written so that U-Boot can find the microcode in + * the device tree very early in boot. + * + * @image: Pointer to image + * @size: Size of image in bytes + * @uboot: Input file information for u-boot.bin + * @fdt: Input file information for u-boot.dtb + * @ucode_ptr: Address in U-Boot where the microcode pointer should be placed + * @return 0 if OK, -ve on error + */ +static int write_uboot(char *image, int size, struct input_file *uboot, + struct input_file *fdt, unsigned int ucode_ptr) +{ + const void *blob; + const char *data; + int uboot_size; + uint32_t *ptr; + int data_size; + int offset; + int node; + int ret; + + uboot_size = write_data(image, size, uboot->addr, uboot->fname); + if (uboot_size < 0) + return uboot_size; + fdt->addr = uboot->addr + uboot_size; + debug("U-Boot size %#x, FDT at %#x\n", uboot_size, fdt->addr); + ret = write_data(image, size, fdt->addr, fdt->fname); + if (ret < 0) + return ret; + + if (ucode_ptr) { + blob = (void *)image + (uint32_t)(fdt->addr + size); + debug("DTB at %lx\n", (char *)blob - image); + node = fdt_node_offset_by_compatible(blob, 0, + "intel,microcode"); + if (node < 0) { + debug("No microcode found in FDT: %s\n", + fdt_strerror(node)); + return -ENOENT; + } + data = fdt_getprop(blob, node, "data", &data_size); + if (!data) { + debug("No microcode data found in FDT: %s\n", + fdt_strerror(data_size)); + return -ENOENT; + } + offset = ucode_ptr - uboot->addr; + ptr = (void *)image + offset; + ptr[0] = uboot->addr + (data - image); + ptr[1] = data_size; + debug("Wrote microcode pointer at %x: addr=%x, size=%x\n", + ucode_ptr, ptr[0], ptr[1]); + } + return 0; }
@@ -800,7 +865,7 @@ int main(int argc, char *argv[]) char *desc_fname = NULL, *addr_str = NULL; int region_type = -1, inputfreq = 0; enum spi_frequency spifreq = SPI_FREQUENCY_20MHZ; - struct input_file input_file[WRITE_MAX], *ifile; + struct input_file input_file[WRITE_MAX], *ifile, *fdt = NULL; unsigned char wr_idx, wr_num = 0; int rom_size = -1; bool write_it; @@ -808,6 +873,8 @@ int main(int argc, char *argv[]) char *outfile = NULL; struct stat buf; int size = 0; + unsigned int ucode_ptr = 0; + bool have_uboot = false; int bios_fd; char *image; int ret; @@ -817,18 +884,21 @@ int main(int argc, char *argv[]) {"descriptor", 1, NULL, 'D'}, {"em100", 0, NULL, 'e'}, {"extract", 0, NULL, 'x'}, + {"fdt", 1, NULL, 'f'}, {"inject", 1, NULL, 'i'}, {"lock", 0, NULL, 'l'}, + {"microcode", 1, NULL, 'm'}, {"romsize", 1, NULL, 'r'}, {"spifreq", 1, NULL, 's'}, {"unlock", 0, NULL, 'u'}, + {"uboot", 1, NULL, 'U'}, {"write", 1, NULL, 'w'}, {"version", 0, NULL, 'v'}, {"help", 0, NULL, 'h'}, {0, 0, 0, 0} };
- while ((opt = getopt_long(argc, argv, "cdD:ehi:lr:s:uvw:x?", + while ((opt = getopt_long(argc, argv, "cdD:ef:hi:lm:r:s:uU:vw:x?", long_options, &option_index)) != EOF) { switch (opt) { case 'c': @@ -871,6 +941,9 @@ int main(int argc, char *argv[]) case 'l': mode_locked = 1; break; + case 'm': + ucode_ptr = strtoul(optarg, NULL, 0); + break; case 'r': rom_size = strtol(optarg, NULL, 0); debug("ROM size %d\n", rom_size); @@ -904,6 +977,8 @@ int main(int argc, char *argv[]) exit(EXIT_SUCCESS); break; case 'w': + case 'U': + case 'f': ifile = &input_file[wr_num]; mode_write = 1; if (wr_num < WRITE_MAX) { @@ -913,7 +988,12 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); } ifile->addr = strtol(optarg, NULL, 0); - ifile->type = IF_normal; + ifile->type = opt == 'f' ? IF_fdt : + opt == 'U' ? IF_uboot : IF_normal; + if (ifile->type == IF_fdt) + fdt = ifile; + else if (ifile->type == IF_uboot) + have_uboot = true; wr_num++; } else { fprintf(stderr, @@ -970,6 +1050,13 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); }
+ if (have_uboot && !fdt) { + fprintf(stderr, + "You must supply a device tree file for U-Boot\n\n"); + print_usage(argv[0]); + exit(EXIT_FAILURE); + } + filename = argv[optind]; if (optind + 2 != argc) outfile = argv[optind + 1]; @@ -1034,9 +1121,16 @@ int main(int argc, char *argv[]) if (mode_write) { for (wr_idx = 0; wr_idx < wr_num; wr_idx++) { ifile = &input_file[wr_idx]; - ret = write_data(image, size, ifile->addr, + if (ifile->type == IF_fdt) { + continue; + } else if (ifile->type == IF_uboot) { + ret = write_uboot(image, size, ifile, fdt, + ucode_ptr); + } else { + ret = write_data(image, size, ifile->addr, ifile->fname); - if (ret) + } + if (ret < 0) break; } } @@ -1071,5 +1165,5 @@ int main(int argc, char *argv[]) free(image); close(bios_fd);
- return ret ? 1 : 0; + return ret < 0 ? 1 : 0; }
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
Some Intel CPUs use an 'FSP' binary blob which provides an inflexible means of starting up the CPU. One result is that microcode updates can only be done before RAM is available and therefore parsing of the device tree is impracticle.
Worse, the addess of the microcode update must be stored in ROM since a pointer to its start address and size is passed to the 'FSP' blob. It is not possible to perform any calculations to obtain the address and size.
To work around this, ifdtool is enhanced to work out the address and size of the first microcode update it finds in the supplied device tree. It then writes these into the correct place in the ROM. U-Boot can then start up the FSP correctly.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Finish off comments in write_uboot() function
- Write the correct microcode pointer to U-Boot (fix fdt->addr bug)
tools/Makefile | 1 + tools/ifdtool.c | 110 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 103 insertions(+), 8 deletions(-)
diff --git a/tools/Makefile b/tools/Makefile index a4216a1..e549f8e 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -126,6 +126,7 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl HOSTCFLAGS_mkexynosspl.o := -pedantic
+ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o hostprogs-$(CONFIG_X86) += ifdtool
hostprogs-$(CONFIG_MX23) += mxsboot diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 4077ba8..fe8366b 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -18,6 +18,7 @@ #include <unistd.h> #include <sys/types.h> #include <sys/stat.h> +#include <libfdt.h> #include "ifdtool.h"
#undef DEBUG @@ -34,6 +35,8 @@
enum input_file_type_t { IF_normal,
IF_fdt,IF_uboot,};
struct input_file { @@ -703,7 +706,7 @@ int inject_region(char *image, int size, int region_type, char *region_fname)
0xffffffff so use an address relative to that. For an8MB ROM the start address is 0xfff80000.- @write_fname: Filename to add to the image
- @return 0 if OK, -ve on error
*/
- @return number of bytes written if OK, -ve on error
static int write_data(char *image, int size, unsigned int addr, const char *write_fname) @@ -715,7 +718,7 @@ static int write_data(char *image, int size, unsigned int addr, if (write_fd < 0) return write_fd;
offset = addr + size;
offset = (uint32_t)(addr + size); debug("Writing %s to offset %#x\n", write_fname, offset); if (offset < 0 || offset + write_size > size) {@@ -731,6 +734,68 @@ static int write_data(char *image, int size, unsigned int addr,
close(write_fd);
return write_size;+}
+/**
- write_uboot() - Write U-Boot, device tree and microcode pointer
- This writes U-Boot into a place in the flash, followed by its device tree.
- The microcode pointer is written so that U-Boot can find the microcode in
- the device tree very early in boot.
- @image: Pointer to image
- @size: Size of image in bytes
- @uboot: Input file information for u-boot.bin
- @fdt: Input file information for u-boot.dtb
- @ucode_ptr: Address in U-Boot where the microcode pointer should be placed
- @return 0 if OK, -ve on error
- */
+static int write_uboot(char *image, int size, struct input_file *uboot,
struct input_file *fdt, unsigned int ucode_ptr)+{
const void *blob;const char *data;int uboot_size;uint32_t *ptr;int data_size;int offset;int node;int ret;uboot_size = write_data(image, size, uboot->addr, uboot->fname);if (uboot_size < 0)return uboot_size;fdt->addr = uboot->addr + uboot_size;debug("U-Boot size %#x, FDT at %#x\n", uboot_size, fdt->addr);ret = write_data(image, size, fdt->addr, fdt->fname);if (ret < 0)return ret;if (ucode_ptr) {blob = (void *)image + (uint32_t)(fdt->addr + size);debug("DTB at %lx\n", (char *)blob - image);node = fdt_node_offset_by_compatible(blob, 0,"intel,microcode");if (node < 0) {debug("No microcode found in FDT: %s\n",fdt_strerror(node));return -ENOENT;}data = fdt_getprop(blob, node, "data", &data_size);if (!data) {debug("No microcode data found in FDT: %s\n",fdt_strerror(data_size));return -ENOENT;}offset = ucode_ptr - uboot->addr;ptr = (void *)image + offset;ptr[0] = uboot->addr + (data - image);ptr[1] = data_size;debug("Wrote microcode pointer at %x: addr=%x, size=%x\n",ucode_ptr, ptr[0], ptr[1]);}return 0;}
@@ -800,7 +865,7 @@ int main(int argc, char *argv[]) char *desc_fname = NULL, *addr_str = NULL; int region_type = -1, inputfreq = 0; enum spi_frequency spifreq = SPI_FREQUENCY_20MHZ;
struct input_file input_file[WRITE_MAX], *ifile;
struct input_file input_file[WRITE_MAX], *ifile, *fdt = NULL; unsigned char wr_idx, wr_num = 0; int rom_size = -1; bool write_it;@@ -808,6 +873,8 @@ int main(int argc, char *argv[]) char *outfile = NULL; struct stat buf; int size = 0;
unsigned int ucode_ptr = 0;bool have_uboot = false; int bios_fd; char *image; int ret;@@ -817,18 +884,21 @@ int main(int argc, char *argv[]) {"descriptor", 1, NULL, 'D'}, {"em100", 0, NULL, 'e'}, {"extract", 0, NULL, 'x'},
{"fdt", 1, NULL, 'f'}, {"inject", 1, NULL, 'i'}, {"lock", 0, NULL, 'l'},{"microcode", 1, NULL, 'm'}, {"romsize", 1, NULL, 'r'}, {"spifreq", 1, NULL, 's'}, {"unlock", 0, NULL, 'u'},{"uboot", 1, NULL, 'U'}, {"write", 1, NULL, 'w'}, {"version", 0, NULL, 'v'}, {"help", 0, NULL, 'h'}, {0, 0, 0, 0} };
while ((opt = getopt_long(argc, argv, "cdD:ehi:lr:s:uvw:x?",
while ((opt = getopt_long(argc, argv, "cdD:ef:hi:lm:r:s:uU:vw:x?", long_options, &option_index)) != EOF) { switch (opt) { case 'c':@@ -871,6 +941,9 @@ int main(int argc, char *argv[]) case 'l': mode_locked = 1; break;
case 'm':ucode_ptr = strtoul(optarg, NULL, 0);break; case 'r': rom_size = strtol(optarg, NULL, 0); debug("ROM size %d\n", rom_size);@@ -904,6 +977,8 @@ int main(int argc, char *argv[]) exit(EXIT_SUCCESS); break; case 'w':
case 'U':case 'f': ifile = &input_file[wr_num]; mode_write = 1; if (wr_num < WRITE_MAX) {@@ -913,7 +988,12 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); } ifile->addr = strtol(optarg, NULL, 0);
ifile->type = IF_normal;
ifile->type = opt == 'f' ? IF_fdt :opt == 'U' ? IF_uboot : IF_normal;if (ifile->type == IF_fdt)fdt = ifile;else if (ifile->type == IF_uboot)have_uboot = true; wr_num++; } else { fprintf(stderr,@@ -970,6 +1050,13 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); }
if (have_uboot && !fdt) {fprintf(stderr,"You must supply a device tree file for U-Boot\n\n");print_usage(argv[0]);exit(EXIT_FAILURE);}filename = argv[optind]; if (optind + 2 != argc) outfile = argv[optind + 1];@@ -1034,9 +1121,16 @@ int main(int argc, char *argv[]) if (mode_write) { for (wr_idx = 0; wr_idx < wr_num; wr_idx++) { ifile = &input_file[wr_idx];
ret = write_data(image, size, ifile->addr,
if (ifile->type == IF_fdt) {continue;} else if (ifile->type == IF_uboot) {ret = write_uboot(image, size, ifile, fdt,ucode_ptr);} else {ret = write_data(image, size, ifile->addr, ifile->fname);
if (ret)
}if (ret < 0) break; } }@@ -1071,5 +1165,5 @@ int main(int argc, char *argv[]) free(image); close(bios_fd);
return ret ? 1 : 0;
return ret < 0 ? 1 : 0;}
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On 16 December 2014 at 02:33, Bin Meng bmeng.cn@gmail.com wrote:
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
Some Intel CPUs use an 'FSP' binary blob which provides an inflexible means of starting up the CPU. One result is that microcode updates can only be done before RAM is available and therefore parsing of the device tree is impracticle.
Worse, the addess of the microcode update must be stored in ROM since a pointer to its start address and size is passed to the 'FSP' blob. It is not possible to perform any calculations to obtain the address and size.
To work around this, ifdtool is enhanced to work out the address and size of the first microcode update it finds in the supplied device tree. It then writes these into the correct place in the ROM. U-Boot can then start up the FSP correctly.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Finish off comments in write_uboot() function
- Write the correct microcode pointer to U-Boot (fix fdt->addr bug)
tools/Makefile | 1 + tools/ifdtool.c | 110 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 2 files changed, 103 insertions(+), 8 deletions(-)
diff --git a/tools/Makefile b/tools/Makefile index a4216a1..e549f8e 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -126,6 +126,7 @@ hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl HOSTCFLAGS_mkexynosspl.o := -pedantic
+ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o hostprogs-$(CONFIG_X86) += ifdtool
hostprogs-$(CONFIG_MX23) += mxsboot diff --git a/tools/ifdtool.c b/tools/ifdtool.c index 4077ba8..fe8366b 100644 --- a/tools/ifdtool.c +++ b/tools/ifdtool.c @@ -18,6 +18,7 @@ #include <unistd.h> #include <sys/types.h> #include <sys/stat.h> +#include <libfdt.h> #include "ifdtool.h"
#undef DEBUG @@ -34,6 +35,8 @@
enum input_file_type_t { IF_normal,
IF_fdt,IF_uboot,};
struct input_file { @@ -703,7 +706,7 @@ int inject_region(char *image, int size, int region_type, char *region_fname)
0xffffffff so use an address relative to that. For an8MB ROM the start address is 0xfff80000.- @write_fname: Filename to add to the image
- @return 0 if OK, -ve on error
*/
- @return number of bytes written if OK, -ve on error
static int write_data(char *image, int size, unsigned int addr, const char *write_fname) @@ -715,7 +718,7 @@ static int write_data(char *image, int size, unsigned int addr, if (write_fd < 0) return write_fd;
offset = addr + size;
offset = (uint32_t)(addr + size); debug("Writing %s to offset %#x\n", write_fname, offset); if (offset < 0 || offset + write_size > size) {@@ -731,6 +734,68 @@ static int write_data(char *image, int size, unsigned int addr,
close(write_fd);
return write_size;+}
+/**
- write_uboot() - Write U-Boot, device tree and microcode pointer
- This writes U-Boot into a place in the flash, followed by its device tree.
- The microcode pointer is written so that U-Boot can find the microcode in
- the device tree very early in boot.
- @image: Pointer to image
- @size: Size of image in bytes
- @uboot: Input file information for u-boot.bin
- @fdt: Input file information for u-boot.dtb
- @ucode_ptr: Address in U-Boot where the microcode pointer should be placed
- @return 0 if OK, -ve on error
- */
+static int write_uboot(char *image, int size, struct input_file *uboot,
struct input_file *fdt, unsigned int ucode_ptr)+{
const void *blob;const char *data;int uboot_size;uint32_t *ptr;int data_size;int offset;int node;int ret;uboot_size = write_data(image, size, uboot->addr, uboot->fname);if (uboot_size < 0)return uboot_size;fdt->addr = uboot->addr + uboot_size;debug("U-Boot size %#x, FDT at %#x\n", uboot_size, fdt->addr);ret = write_data(image, size, fdt->addr, fdt->fname);if (ret < 0)return ret;if (ucode_ptr) {blob = (void *)image + (uint32_t)(fdt->addr + size);debug("DTB at %lx\n", (char *)blob - image);node = fdt_node_offset_by_compatible(blob, 0,"intel,microcode");if (node < 0) {debug("No microcode found in FDT: %s\n",fdt_strerror(node));return -ENOENT;}data = fdt_getprop(blob, node, "data", &data_size);if (!data) {debug("No microcode data found in FDT: %s\n",fdt_strerror(data_size));return -ENOENT;}offset = ucode_ptr - uboot->addr;ptr = (void *)image + offset;ptr[0] = uboot->addr + (data - image);ptr[1] = data_size;debug("Wrote microcode pointer at %x: addr=%x, size=%x\n",ucode_ptr, ptr[0], ptr[1]);}return 0;}
@@ -800,7 +865,7 @@ int main(int argc, char *argv[]) char *desc_fname = NULL, *addr_str = NULL; int region_type = -1, inputfreq = 0; enum spi_frequency spifreq = SPI_FREQUENCY_20MHZ;
struct input_file input_file[WRITE_MAX], *ifile;
struct input_file input_file[WRITE_MAX], *ifile, *fdt = NULL; unsigned char wr_idx, wr_num = 0; int rom_size = -1; bool write_it;@@ -808,6 +873,8 @@ int main(int argc, char *argv[]) char *outfile = NULL; struct stat buf; int size = 0;
unsigned int ucode_ptr = 0;bool have_uboot = false; int bios_fd; char *image; int ret;@@ -817,18 +884,21 @@ int main(int argc, char *argv[]) {"descriptor", 1, NULL, 'D'}, {"em100", 0, NULL, 'e'}, {"extract", 0, NULL, 'x'},
{"fdt", 1, NULL, 'f'}, {"inject", 1, NULL, 'i'}, {"lock", 0, NULL, 'l'},{"microcode", 1, NULL, 'm'}, {"romsize", 1, NULL, 'r'}, {"spifreq", 1, NULL, 's'}, {"unlock", 0, NULL, 'u'},{"uboot", 1, NULL, 'U'}, {"write", 1, NULL, 'w'}, {"version", 0, NULL, 'v'}, {"help", 0, NULL, 'h'}, {0, 0, 0, 0} };
while ((opt = getopt_long(argc, argv, "cdD:ehi:lr:s:uvw:x?",
while ((opt = getopt_long(argc, argv, "cdD:ef:hi:lm:r:s:uU:vw:x?", long_options, &option_index)) != EOF) { switch (opt) { case 'c':@@ -871,6 +941,9 @@ int main(int argc, char *argv[]) case 'l': mode_locked = 1; break;
case 'm':ucode_ptr = strtoul(optarg, NULL, 0);break; case 'r': rom_size = strtol(optarg, NULL, 0); debug("ROM size %d\n", rom_size);@@ -904,6 +977,8 @@ int main(int argc, char *argv[]) exit(EXIT_SUCCESS); break; case 'w':
case 'U':case 'f': ifile = &input_file[wr_num]; mode_write = 1; if (wr_num < WRITE_MAX) {@@ -913,7 +988,12 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); } ifile->addr = strtol(optarg, NULL, 0);
ifile->type = IF_normal;
ifile->type = opt == 'f' ? IF_fdt :opt == 'U' ? IF_uboot : IF_normal;if (ifile->type == IF_fdt)fdt = ifile;else if (ifile->type == IF_uboot)have_uboot = true; wr_num++; } else { fprintf(stderr,@@ -970,6 +1050,13 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); }
if (have_uboot && !fdt) {fprintf(stderr,"You must supply a device tree file for U-Boot\n\n");print_usage(argv[0]);exit(EXIT_FAILURE);}filename = argv[optind]; if (optind + 2 != argc) outfile = argv[optind + 1];@@ -1034,9 +1121,16 @@ int main(int argc, char *argv[]) if (mode_write) { for (wr_idx = 0; wr_idx < wr_num; wr_idx++) { ifile = &input_file[wr_idx];
ret = write_data(image, size, ifile->addr,
if (ifile->type == IF_fdt) {continue;} else if (ifile->type == IF_uboot) {ret = write_uboot(image, size, ifile, fdt,ucode_ptr);} else {ret = write_data(image, size, ifile->addr, ifile->fname);
if (ret)
}if (ret < 0) break; } }@@ -1071,5 +1165,5 @@ int main(int argc, char *argv[]) free(image); close(bios_fd);
return ret ? 1 : 0;
return ret < 0 ? 1 : 0;}
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Applied to u-boot-x86.
We might end up with a few of these, so put them in their own directory.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
arch/x86/dts/link.dts | 4 ++-- arch/x86/dts/{ => microcode}/m12206a7_00000028.dtsi | 0 arch/x86/dts/{ => microcode}/m12306a9_00000017.dtsi | 0 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/x86/dts/{ => microcode}/m12206a7_00000028.dtsi (100%) rename arch/x86/dts/{ => microcode}/m12306a9_00000017.dtsi (100%)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 592af16..c435a67 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@
microcode { update@0 { -#include "m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000028.dtsi" }; update@1 { -#include "m12306a9_00000017.dtsi" +#include "microcode/m12306a9_00000017.dtsi" }; };
diff --git a/arch/x86/dts/m12206a7_00000028.dtsi b/arch/x86/dts/microcode/m12206a7_00000028.dtsi similarity index 100% rename from arch/x86/dts/m12206a7_00000028.dtsi rename to arch/x86/dts/microcode/m12206a7_00000028.dtsi diff --git a/arch/x86/dts/m12306a9_00000017.dtsi b/arch/x86/dts/microcode/m12306a9_00000017.dtsi similarity index 100% rename from arch/x86/dts/m12306a9_00000017.dtsi rename to arch/x86/dts/microcode/m12306a9_00000017.dtsi
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
We might end up with a few of these, so put them in their own directory.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2: None
arch/x86/dts/link.dts | 4 ++-- arch/x86/dts/{ => microcode}/m12206a7_00000028.dtsi | 0 arch/x86/dts/{ => microcode}/m12306a9_00000017.dtsi | 0 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/x86/dts/{ => microcode}/m12206a7_00000028.dtsi (100%) rename arch/x86/dts/{ => microcode}/m12306a9_00000017.dtsi (100%)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 592af16..c435a67 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@
microcode { update@0 {-#include "m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000028.dtsi" }; update@1 { -#include "m12306a9_00000017.dtsi" +#include "microcode/m12306a9_00000017.dtsi" }; };
diff --git a/arch/x86/dts/m12206a7_00000028.dtsi b/arch/x86/dts/microcode/m12206a7_00000028.dtsi similarity index 100% rename from arch/x86/dts/m12206a7_00000028.dtsi rename to arch/x86/dts/microcode/m12206a7_00000028.dtsi diff --git a/arch/x86/dts/m12306a9_00000017.dtsi b/arch/x86/dts/microcode/m12306a9_00000017.dtsi similarity index 100% rename from arch/x86/dts/m12306a9_00000017.dtsi rename to arch/x86/dts/microcode/m12306a9_00000017.dtsi --
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On 16 December 2014 at 02:34, Bin Meng bmeng.cn@gmail.com wrote:
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
We might end up with a few of these, so put them in their own directory.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2: None
arch/x86/dts/link.dts | 4 ++-- arch/x86/dts/{ => microcode}/m12206a7_00000028.dtsi | 0 arch/x86/dts/{ => microcode}/m12306a9_00000017.dtsi | 0 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/x86/dts/{ => microcode}/m12206a7_00000028.dtsi (100%) rename arch/x86/dts/{ => microcode}/m12306a9_00000017.dtsi (100%)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index 592af16..c435a67 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@
microcode { update@0 {-#include "m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000028.dtsi" }; update@1 { -#include "m12306a9_00000017.dtsi" +#include "microcode/m12306a9_00000017.dtsi" }; };
diff --git a/arch/x86/dts/m12206a7_00000028.dtsi b/arch/x86/dts/microcode/m12206a7_00000028.dtsi similarity index 100% rename from arch/x86/dts/m12206a7_00000028.dtsi rename to arch/x86/dts/microcode/m12206a7_00000028.dtsi diff --git a/arch/x86/dts/m12306a9_00000017.dtsi b/arch/x86/dts/microcode/m12306a9_00000017.dtsi similarity index 100% rename from arch/x86/dts/m12306a9_00000017.dtsi rename to arch/x86/dts/microcode/m12306a9_00000017.dtsi --
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Applied to u-boot-x86.
There are new microcode revisions available. Update them. Also change the format so that the first 48 bytes are not omitted from the device tree data.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Update microcode with output from updated tool
arch/x86/cpu/ivybridge/microcode_intel.c | 2 + arch/x86/dts/link.dts | 4 +- arch/x86/dts/microcode/m12206a7_00000028.dtsi | 622 -------------------- arch/x86/dts/microcode/m12206a7_00000029.dtsi | 686 ++++++++++++++++++++++ arch/x86/dts/microcode/m12306a9_00000017.dtsi | 750 ------------------------ arch/x86/dts/microcode/m12306a9_0000001b.dtsi | 814 ++++++++++++++++++++++++++ 6 files changed, 1504 insertions(+), 1374 deletions(-) delete mode 100644 arch/x86/dts/microcode/m12206a7_00000028.dtsi create mode 100644 arch/x86/dts/microcode/m12206a7_00000029.dtsi delete mode 100644 arch/x86/dts/microcode/m12306a9_00000017.dtsi create mode 100644 arch/x86/dts/microcode/m12306a9_0000001b.dtsi
diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c index 8c11a63..79c075f 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/ivybridge/microcode_intel.c @@ -40,6 +40,8 @@ static int microcode_decode_node(const void *blob, int node, update->data = fdt_getprop(blob, node, "data", &update->size); if (!update->data) return -EINVAL; + update->data += 48; + update->size -= 48;
update->header_version = fdtdec_get_int(blob, node, "intel,header-version", 0); diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts index c435a67..a739080 100644 --- a/arch/x86/dts/link.dts +++ b/arch/x86/dts/link.dts @@ -214,10 +214,10 @@
microcode { update@0 { -#include "microcode/m12206a7_00000028.dtsi" +#include "microcode/m12206a7_00000029.dtsi" }; update@1 { -#include "microcode/m12306a9_00000017.dtsi" +#include "microcode/m12306a9_0000001b.dtsi" }; };
diff --git a/arch/x86/dts/microcode/m12206a7_00000028.dtsi b/arch/x86/dts/microcode/m12206a7_00000028.dtsi deleted file mode 100644 index bcd5248..0000000 --- a/arch/x86/dts/microcode/m12206a7_00000028.dtsi +++ /dev/null @@ -1,622 +0,0 @@ -/* - * Copyright (c) <1995-2013>, Intel Corporation. - * All rights reserved. - * - * Redistribution. Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x28>; -intel,date-code = <0x04242012>; -intel,processor-signature = <0x000206a7>; -intel,checksum = <0xf3e9935d>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000028 - 0x00000000 0x00000000 0x20120423 0x000008f1 - 0x00000001 0x000206a7 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x000008f1 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x52b813ac 0xdb8994c7 0x70e9f6bb 0x9d6db2ff - 0xf4d70f5d 0x5b1eccf6 0xac59106f 0x0ae2e2c1 - 0x1a7bbeb1 0x355a1d62 0x2e7eb594 0x09f8dea9 - 0x432a49e4 0xbf520253 0xdafa4010 0x893a858a - 0x766e0efb 0xd91e196d 0x838bd2ef 0xe5146494 - 0xd515f413 0x29704828 0xe85598b6 0xdcbe6c51 - 0x88eabbfa 0xa1e8909f 0xd8931721 0x35386554 - 0x089a78a7 0xd9914775 0xd4644748 0x1556a4dc - 0xf44448f6 0xd054d7db 0xf30f2b7d 0x5ae223d0 - 0xcbbb48b0 0x5c8b0383 0x177de157 0x9c1e5f73 - 0x2ec28289 0xd72a7b6c 0x823b6eb2 0x35e02171 - 0xba8deae4 0x06f4d468 0x13dbafaa 0x72b419f1 - 0x033385b5 0x05806920 0x4c6034cf 0x9bd117dc - 0x976e2d04 0x250330f0 0x7250b5e1 0x184980c2 - 0x12a9d7d6 0x1bc808f9 0xae79994f 0xc6f87901 - 0xc0e3132f 0x671491c5 0x236cad39 0x37889d9c - 0x67f7c3f3 0x964a6be5 0xbcced7da 0x57eeaa6e - 0x7bca1522 0x654fee4c 0x2a1ca5d9 0xa1803cf3 - 0x00000011 0x8c316d2c 0x17603b7e 0x32e42981 - 0xc26c1400 0xf0fbccb6 0xeab6b43a 0x11d456a5 - 0x5b912d46 0x15195fe0 0x542f6db3 0x0b7f212e - 0x47718dd9 0x7c41b108 0x06c21111 0x4445d5ea - 0xb4fb8128 0xe07404a6 0x8d503da4 0x78fc7e44 - 0xb9919656 0x9968c797 0x87f26ab0 0x23bb1af7 - 0x1ec5d761 0x26f30d2c 0x7cdb747c 0xe4d42033 - 0x8a5d4801 0x768aff57 0xbcfd5d11 0x7c853c2d - 0x231e6207 0x8b1988a6 0xd68fdb75 0x58dcb417 - 0x44422ef9 0x2a186ebb 0x7d27e85f 0x36ac31f7 - 0x1e487e77 0x2b0b8c37 0xd8ba682f 0x2cba791b - 0xe6d3dece 0x1b2c2a99 0x4e5decab 0xfbd313a3 - 0xdbc78294 0x5a80cce7 0x2d8e0f0b 0xcf564f71 - 0x073d1f37 0x25162870 0x96cdb85b 0x9c553048 - 0x24eba740 0xfc0f352e 0x0c83be68 0x89b5076c - 0xc39c4355 0x6a4cf25c 0x2bbd2682 0xc524fdb9 - 0x7ea19bae 0x191ad6f1 0xd3fbf3bf 0x21bf77fa - 0x8f77fec4 0x0f90f635 0xe55e165c 0x868d58c0 - 0x966bc0ad 0x6c276364 0x9d8f7eff 0x4b7925d4 - 0x8b2f9326 0x4ab7b47e 0x33a9087c 0xf31ab949 - 0x69831dfb 0x4711a215 0x8128c1fa 0x8481c213 - 0x7401b01b 0xfdcfdc50 0xd6b55266 0xae9b23ac - 0xfa2ad275 0xa225bb45 0x4dd720c4 0x760a20e6 - 0x5f1223c9 0x2f334372 0x6e1dcdab 0xe8ee8638 - 0x1c19ba8a 0xef9341c4 0x360aaa9d 0x90452ea9 - 0x65852446 0xe9398fa3 0xbba6a631 0x1a3e90b9 - 0xe2a73a56 0x6e8c0747 0x35c7c53d 0xcc1ac842 - 0x183356af 0xb6e98608 0x987b43c2 0xa8a3cfd2 - 0xc2c5fce0 0xcc3af64a 0xd6d3a291 0xe59ad1f5 - 0x124ca513 0x9522b50a 0x25150477 0xa2eb5797 - 0x7fc63626 0x648c48e3 0x9f5797ff 0x2307b84d - 0x980625a4 0xabc05983 0x24980807 0x773c4f99 - 0x3407b872 0x07c3657a 0xa2cd9e48 0x49c1e6a8 - 0xa881b84c 0xf804d72c 0xb5319d2a 0x3e39780f - 0x97518822 0x0acd54c2 0x0721a9ff 0x10e1d2fd - 0xa7b6db77 0x845b1a56 0xef00160e 0x6b41bfd5 - 0xc994df0d 0xcf44a5ca 0x794b36a4 0xf9fdb127 - 0x922a1366 0x822aa8a9 0x4b137bd5 0x5722a49f - 0x8933719a 0x17edc1a9 0x079d9538 0x21fae7d5 - 0xe534fd73 0x9d3038d5 0x48c3a056 0x5b22d58a - 0x6f142866 0xf1d767cd 0xb51ad5a6 0x34a0ef85 - 0x0111703e 0xca4b3a30 0xa0f3c34d 0x9d48775a - 0x3f2059f9 0xf2fe2c36 0x588861a9 0xed5bd9fe - 0x8231f7cb 0x8c115969 0x3f82ba00 0x21b3730c - 0xba757997 0x3ec0bb2c 0x16f11def 0x5d4356c6 - 0xdc2e0bc2 0x58c1eb6e 0x313ede0c 0xb68fcc52 - 0x84d3e1b5 0xcc6d9201 0x95046196 0x276b527b - 0x80a4a729 0xe782916d 0x5cf09e0b 0x98aaf9fa - 0x1de6dd43 0xab4f1962 0x49ece734 0x81455488 - 0xc2597b61 0x5b22af85 0x646f7b94 0x09213a1f - 0x08edf7e4 0x963d343c 0x059ba888 0xb4e804ed - 0xe7cc826c 0xf87bafc7 0xeecaec10 0x8e60919c - 0xbf14c996 0xd3dcaee3 0xb8fa0b7e 0x81563c6e - 0x7f59a258 0x2f344446 0x374d8aa6 0x9b6de5c9 - 0xbf992857 0xbc5b94fc 0x28adb080 0x17e41044 - 0xb87b469e 0xda504d12 0xf21bef8b 0xce75c1e3 - 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Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x29>; +intel,date-code = <0x6122013>; +intel,processor-signature = <0x206a7>; +intel,checksum = <0xc9c91df0>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x29000000 0x13201206 0xa7060200 + 0xf01dc9c9 0x01000000 0x12000000 0xd0270000 + 0x00280000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x29000000 + 0x00000000 0x00000000 0x11061320 0xd1090000 + 0x01000000 0xa7060200 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xd1090000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0xfd2a2f68 0x82ac7ebb 0xa4916328 0x7480b81b + 0xd329a777 0x25750339 0x9a8f7a9b 0xf1da9cb8 + 0xb1be7b1a 0x621d5a35 0x94b57e2e 0xa9def809 + 0xe4492a43 0x530252bf 0x1040fada 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--- a/arch/x86/dts/microcode/m12306a9_00000017.dtsi +++ /dev/null @@ -1,750 +0,0 @@ -/* - * Copyright (c) <1995-2013>, Intel Corporation. - * All rights reserved. - * - * Redistribution. Redistribution and use in binary form, without modification, are - * permitted provided that the following conditions are met: - * .Redistributions must reproduce the above copyright notice and the following - * disclaimer in the documentation and/or other materials provided with the - * distribution. - * Neither the name of Intel Corporation nor the names of its suppliers may be used - * to endorse or promote products derived from this software without specific prior - * written permission. - * .No reverse engineering, decompilation, or disassembly of this software is - * permitted. - * ."Binary form" includes any format commonly used for electronic conveyance - * which is a reversible, bit-exact translation of binary representation to ASCII or - * ISO text, for example, "uuencode." - * - * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT - * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER - * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - *--- - * This is a device tree fragment. Use #include to add these properties to a - * node. - */ - -compatible = "intel,microcode"; -intel,header-version = <1>; -intel,update-revision = <0x17>; -intel,date-code = <0x01092013>; -intel,processor-signature = <0x000306a9>; -intel,checksum = <0x3546450b>; -intel,loader-revision = <1>; -intel,processor-flags = <0x12>; - -/* The 48-byte public header is omitted. */ -data = < - 0x00000000 0x000000a1 0x00020001 0x00000017 - 0x00000000 0x00000000 0x20130107 0x00000a61 - 0x00000001 0x000306a9 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 - 0x86c5b0d4 0xf6978804 0x7f4f5870 0x6319dc3c - 0xbb3b7d61 0x33cf9075 0xe8424658 0xf611a357 - 0x5a3401db 0x42caecce 0xb4d8e75e 0xe6dbaf24 - 0x7861b35f 0x6bd717bc 0x23b9b731 0x82ec1ac8 - 0x20337b64 0x5396dbf1 0x59973bff 0x724bc7e9 - 0x5237193b 0x0b8647c1 0x6a0d0e16 0xbf9ddb5b - 0xace2cc1c 0xad707638 0x056f102f 0xa37e60f8 - 0x76255642 0xfb86e030 0xb8069a40 0x367795f1 - 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0x96076ba4 0x250dc2f7 0xc4093548 0x030e777d - 0x7ea40933 0x8da7b1dd 0x59c0b79f 0x807d437c - 0xf5233ddf 0x54c1983f 0xfc18771b 0xe74b85f0 - 0xdbd725b5 0x70cdd153 0x4ffe300c 0xfda4bdae - 0xf4ac75d2 0x91c4e15a 0x34d92b97 0x16356a79 - >; diff --git a/arch/x86/dts/microcode/m12306a9_0000001b.dtsi b/arch/x86/dts/microcode/m12306a9_0000001b.dtsi new file mode 100644 index 0000000..53417c2 --- /dev/null +++ b/arch/x86/dts/microcode/m12306a9_0000001b.dtsi @@ -0,0 +1,814 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x1b>; +intel,date-code = <0x5292014>; +intel,processor-signature = <0x306a9>; +intel,checksum = <0x579ae07a>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x1b000000 0x14202905 0xa9060300 + 0x7ae09a57 0x01000000 0x12000000 0xd02f0000 + 0x00300000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x1b000000 + 0x00000000 0x00000000 0x16051420 0x610b0000 + 0x01000000 0xa9060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0xc2b13ad8 0x6ce74fea 0xd364ad12 0xf6404a69 + 0xc89041e4 0x217fa2f6 0x6ff6e43f 0x79cde4eb + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 0x31b7b923 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On 15 December 2014 at 22:02, Simon Glass sjg@chromium.org wrote:
There are new microcode revisions available. Update them. Also change the format so that the first 48 bytes are not omitted from the device tree data.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Update microcode with output from updated tool
arch/x86/cpu/ivybridge/microcode_intel.c | 2 + arch/x86/dts/link.dts | 4 +- arch/x86/dts/microcode/m12206a7_00000028.dtsi | 622 -------------------- arch/x86/dts/microcode/m12206a7_00000029.dtsi | 686 ++++++++++++++++++++++ arch/x86/dts/microcode/m12306a9_00000017.dtsi | 750 ------------------------ arch/x86/dts/microcode/m12306a9_0000001b.dtsi | 814 ++++++++++++++++++++++++++ 6 files changed, 1504 insertions(+), 1374 deletions(-) delete mode 100644 arch/x86/dts/microcode/m12206a7_00000028.dtsi create mode 100644 arch/x86/dts/microcode/m12206a7_00000029.dtsi delete mode 100644 arch/x86/dts/microcode/m12306a9_00000017.dtsi create mode 100644 arch/x86/dts/microcode/m12306a9_0000001b.dtsi
Applied to u-boot-x86.
There are several problems in the code. The device tree decode is incorrect in ways that are masked due to a matching bug. Both are fixed. Also microcode_read_rev() should be inline and called before the microcode is written.
Note: microcode writing does not work correctly on ivybridge for me. Further work is needed to resolve this. But this patch tidies up the existing code so that will be easier.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Add new patch to correct problems in the microcode loading
arch/x86/cpu/ivybridge/microcode_intel.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c index 79c075f..0817751 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/ivybridge/microcode_intel.c @@ -50,17 +50,17 @@ static int microcode_decode_node(const void *blob, int node, update->date_code = fdtdec_get_int(blob, node, "intel,date-code", 0); update->processor_signature = fdtdec_get_int(blob, node, - "intel.processor-signature", 0); + "intel,processor-signature", 0); update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0); update->loader_revision = fdtdec_get_int(blob, node, - "loader-revision", 0); + "intel,loader-revision", 0); update->processor_flags = fdtdec_get_int(blob, node, - "processor-flags", 0); + "intel,processor-flags", 0);
return 0; }
-static uint32_t microcode_read_rev(void) +static inline uint32_t microcode_read_rev(void) { /* * Some Intel CPUs can be very finicky about the CPUID sequence used. @@ -116,6 +116,7 @@ int microcode_update_intel(void) { struct microcode_update cpu, update; const void *blob = gd->fdt_blob; + int skipped; int count; int node; int ret; @@ -123,12 +124,13 @@ int microcode_update_intel(void) microcode_read_cpu(&cpu); node = 0; count = 0; + skipped = 0; do { node = fdtdec_next_compatible(blob, node, COMPAT_INTEL_MICROCODE); if (node < 0) { debug("%s: Found %d updates\n", __func__, count); - return count ? 0 : -ENOENT; + return count ? 0 : skipped ? -EEXIST : -ENOENT; }
ret = microcode_decode_node(blob, node, &update); @@ -137,12 +139,15 @@ int microcode_update_intel(void) ret); return ret; } - if (update.processor_signature == cpu.processor_signature && - (update.processor_flags & cpu.processor_flags)) { - debug("%s: Update already exists\n", __func__); - return -EEXIST; + if (!(update.processor_signature == cpu.processor_signature && + (update.processor_flags & cpu.processor_flags))) { + debug("%s: Skipping non-matching update, sig=%x, pf=%x\n", + __func__, update.processor_signature, + update.processor_flags); + skipped++; + continue; } - + ret = microcode_read_rev(); wrmsr(0x79, (ulong)update.data, 0); debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n", microcode_read_rev(), update.date_code & 0xffff,
Hi Simon,
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
There are several problems in the code. The device tree decode is incorrect in ways that are masked due to a matching bug. Both are fixed. Also microcode_read_rev() should be inline and called before the microcode is written.
Note: microcode writing does not work correctly on ivybridge for me. Further work is needed to resolve this. But this patch tidies up the existing code so that will be easier.
Yep, I noticed that with the new microcode.dtsi generated from the microcode tool, the endianness is different from previous ivybridge one. I think the new one is correct due to dts is using big-endian while IA processor is little-endian. I just wonder why previous dtsi could work on ivybridge? And now since we are using little-endian so we should decode dts using little-endian too. Is this endianness issue that causes the microcode writing does not work on ivybridge?
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Add new patch to correct problems in the microcode loading
arch/x86/cpu/ivybridge/microcode_intel.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/microcode_intel.c b/arch/x86/cpu/ivybridge/microcode_intel.c index 79c075f..0817751 100644 --- a/arch/x86/cpu/ivybridge/microcode_intel.c +++ b/arch/x86/cpu/ivybridge/microcode_intel.c @@ -50,17 +50,17 @@ static int microcode_decode_node(const void *blob, int node, update->date_code = fdtdec_get_int(blob, node, "intel,date-code", 0); update->processor_signature = fdtdec_get_int(blob, node,
"intel.processor-signature", 0);
"intel,processor-signature", 0); update->checksum = fdtdec_get_int(blob, node, "intel,checksum", 0); update->loader_revision = fdtdec_get_int(blob, node,
"loader-revision", 0);
"intel,loader-revision", 0); update->processor_flags = fdtdec_get_int(blob, node,
"processor-flags", 0);
"intel,processor-flags", 0); return 0;}
-static uint32_t microcode_read_rev(void) +static inline uint32_t microcode_read_rev(void) { /* * Some Intel CPUs can be very finicky about the CPUID sequence used. @@ -116,6 +116,7 @@ int microcode_update_intel(void) { struct microcode_update cpu, update; const void *blob = gd->fdt_blob;
int skipped; int count; int node; int ret;@@ -123,12 +124,13 @@ int microcode_update_intel(void) microcode_read_cpu(&cpu); node = 0; count = 0;
skipped = 0; do { node = fdtdec_next_compatible(blob, node, COMPAT_INTEL_MICROCODE); if (node < 0) { debug("%s: Found %d updates\n", __func__, count);
return count ? 0 : -ENOENT;
return count ? 0 : skipped ? -EEXIST : -ENOENT; } ret = microcode_decode_node(blob, node, &update);@@ -137,12 +139,15 @@ int microcode_update_intel(void) ret); return ret; }
if (update.processor_signature == cpu.processor_signature &&(update.processor_flags & cpu.processor_flags)) {debug("%s: Update already exists\n", __func__);return -EEXIST;
if (!(update.processor_signature == cpu.processor_signature &&(update.processor_flags & cpu.processor_flags))) {debug("%s: Skipping non-matching update, sig=%x, pf=%x\n",__func__, update.processor_signature,update.processor_flags);skipped++;continue; }
ret = microcode_read_rev(); wrmsr(0x79, (ulong)update.data, 0); debug("microcode: updated to revision 0x%x date=%04x-%02x-%02x\n", microcode_read_rev(), update.date_code & 0xffff,--
Regards, Bin
Hi Bin,
On 16 December 2014 at 02:41, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
There are several problems in the code. The device tree decode is incorrect in ways that are masked due to a matching bug. Both are fixed. Also microcode_read_rev() should be inline and called before the microcode is written.
Note: microcode writing does not work correctly on ivybridge for me. Further work is needed to resolve this. But this patch tidies up the existing code so that will be easier.
Yep, I noticed that with the new microcode.dtsi generated from the microcode tool, the endianness is different from previous ivybridge one. I think the new one is correct due to dts is using big-endian while IA processor is little-endian. I just wonder why previous dtsi could work on ivybridge? And now since we are using little-endian so we should decode dts using little-endian too. Is this endianness issue that causes the microcode writing does not work on ivybridge?
I think what happened is that I originally tested an early version of the code (perhaps before device tree), but because the error handling was broken I did not notice when it started failing, perhaps due to something unrelated. I'll get back to looking at it again sometime but for now I'm a bit stuck.
[snip]
Regards, Simon
On 16 December 2014 at 09:31, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 16 December 2014 at 02:41, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
There are several problems in the code. The device tree decode is incorrect in ways that are masked due to a matching bug. Both are fixed. Also microcode_read_rev() should be inline and called before the microcode is written.
Note: microcode writing does not work correctly on ivybridge for me. Further work is needed to resolve this. But this patch tidies up the existing code so that will be easier.
Yep, I noticed that with the new microcode.dtsi generated from the microcode tool, the endianness is different from previous ivybridge one. I think the new one is correct due to dts is using big-endian while IA processor is little-endian. I just wonder why previous dtsi could work on ivybridge? And now since we are using little-endian so we should decode dts using little-endian too. Is this endianness issue that causes the microcode writing does not work on ivybridge?
I think what happened is that I originally tested an early version of the code (perhaps before device tree), but because the error handling was broken I did not notice when it started failing, perhaps due to something unrelated. I'll get back to looking at it again sometime but for now I'm a bit stuck.
Applied to u-boot-x86.
To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed.
Also move the microcode for queensbay (unfortunately the wrong version).
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Update microcode file to version 5_cv - Drop patches that have already been applied
Makefile | 4 +- arch/x86/cpu/queensbay/M0220661105.inc | 1288 ---------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/microcode/m0220661105_cv.dtsi | 366 ++++++++ 5 files changed, 380 insertions(+), 1296 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi
diff --git a/Makefile b/Makefile index 67a7ecb..49c4a89 100644 --- a/Makefile +++ b/Makefile @@ -947,7 +947,9 @@ ifneq ($(CONFIG_X86_RESET_VECTOR),) rom: u-boot.rom FORCE
IFDTOOL=$(objtree)/tools/ifdtool -IFDTOOL_FLAGS = -w $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin +IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb +IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d' ' -f1) +IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot.bin IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin
ifneq ($(CONFIG_HAVE_INTEL_ME),) diff --git a/arch/x86/cpu/queensbay/M0220661105.inc b/arch/x86/cpu/queensbay/M0220661105.inc deleted file mode 100644 index f2b2b4e..0000000 --- a/arch/x86/cpu/queensbay/M0220661105.inc +++ /dev/null @@ -1,1288 +0,0 @@ -/* - * Copyright (C) 2013, Intel Corporation - * - * SPDX-License-Identifier: Intel - */ - -/* External Header */ -.long 0x00000001 /* Header Version */ -.long 0x00000105 /* Update Revision */ -.long 0x07182011 /* Date */ -.long 0x00020661 /* Processor Signature */ -.long 0x52558795 /* Checksum */ -.long 0x00000001 /* Loader Revision */ -.long 0x00000002 /* Processor Flags */ -.long 0x000013d0 /* Data Size (excluding headers) */ -.long 0x00001400 /* Total Size (including headers) */ -.long 0x00000000 /* Reserved */ -.long 0x00000000 /* Reserved */ -.long 0x00000000 /* Reserved */ -/* Data */ -.long 0x00000000 -.long 0x000000a1 -.long 0x00020001 -.long 0x00000105 -.long 0x00000019 -.long 0x00050100 -.long 0x20110715 -.long 0x00000401 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temp_ram_init_params: - .long ucode_start /* microcode base */ - .long ucode_size /* microcode size */ +_dt_ucode_base_size: + /* These next two fields are filled in by ifdtool */ + .long 0 /* microcode base */ + .long 0 /* microcode size */ .long CONFIG_SYS_MONITOR_BASE /* code region base */ .long CONFIG_SYS_MONITOR_LEN /* code region size */ - - .balign 4 -ucode_start: - .include "arch/x86/cpu/queensbay/M0220661105.inc" -ucode_size = ( . - ucode_start) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 399dafb..3f43f3c 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -50,4 +50,11 @@ memory-map = <0xffe00000 0x00200000>; }; }; + + microcode { + update@0 { +#include "microcode/m0220661105_cv.dtsi" + }; + }; + }; diff --git a/arch/x86/dts/microcode/m0220661105_cv.dtsi b/arch/x86/dts/microcode/m0220661105_cv.dtsi new file mode 100644 index 0000000..b4632c5 --- /dev/null +++ b/arch/x86/dts/microcode/m0220661105_cv.dtsi @@ -0,0 +1,366 @@ +/* + * Copyright (c) <1995-2014>, Intel Corporation. + * All rights reserved. + * Redistribution. Redistribution and use in binary form, without modification, are + * permitted provided that the following conditions are met: + * .Redistributions must reproduce the above copyright notice and the following + * disclaimer in the documentation and/or other materials provided with the + * distribution. + * .Neither the name of Intel Corporation nor the names of its suppliers may be used + * to endorse or promote products derived from this software without specific prior + * written permission. + * .No reverse engineering, decompilation, or disassembly of this software is + * permitted. + * ."Binary form" includes any format commonly used for electronic conveyance + * which is a reversible, bit-exact translation of binary representation to ASCII or + * ISO text, for example, "uuencode." + * DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT + * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x105>; +intel,date-code = <0x7182011>; +intel,processor-signature = <0x20661>; +intel,checksum = <0x52558795>; +intel,loader-revision = <1>; +intel,processor-flags = <0x2>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x05010000 0x11201807 0x61060200 + 0x95875552 0x01000000 0x02000000 0xd0130000 + 0x00140000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x05010000 + 0x19000000 0x00010500 0x15071120 0x01040000 + 0x01000000 0x61060200 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x9557a557 0x7d7a0fe3 0x8e2fbe53 0x0db9e346 + 0xd35c00d6 0x21bb34b7 0x662b6406 0xa0425035 + 0x3d028208 0xcb843695 0xee06be0a 0x9817efa7 + 0xb86c0d16 0x45f70c93 0x79fdc3af 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On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed.
Also move the microcode for queensbay (unfortunately the wrong version).
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Update microcode file to version 5_cv
- Drop patches that have already been applied
Makefile | 4 +- arch/x86/cpu/queensbay/M0220661105.inc | 1288 ---------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/microcode/m0220661105_cv.dtsi | 366 ++++++++ 5 files changed, 380 insertions(+), 1296 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi
diff --git a/Makefile b/Makefile index 67a7ecb..49c4a89 100644 --- a/Makefile +++ b/Makefile @@ -947,7 +947,9 @@ ifneq ($(CONFIG_X86_RESET_VECTOR),) rom: u-boot.rom FORCE
IFDTOOL=$(objtree)/tools/ifdtool -IFDTOOL_FLAGS = -w $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot-dtb.bin +IFDTOOL_FLAGS = -f 0:$(objtree)/u-boot.dtb +IFDTOOL_FLAGS += -m 0x$(shell $(NM) u-boot |grep _dt_ucode_base_size |cut -d' ' -f1) +IFDTOOL_FLAGS += -U $(CONFIG_SYS_TEXT_BASE):$(objtree)/u-boot.bin IFDTOOL_FLAGS += -w $(CONFIG_SYS_X86_START16):$(objtree)/u-boot-x86-16bit.bin
ifneq ($(CONFIG_HAVE_INTEL_ME),) diff --git a/arch/x86/cpu/queensbay/M0220661105.inc b/arch/x86/cpu/queensbay/M0220661105.inc deleted file mode 100644 index f2b2b4e..0000000 --- a/arch/x86/cpu/queensbay/M0220661105.inc +++ /dev/null @@ -1,1288 +0,0 @@ -/*
- Copyright (C) 2013, Intel Corporation
- SPDX-License-Identifier: Intel
- */
-/* External Header */ -.long 0x00000001 /* Header Version */ -.long 0x00000105 /* Update Revision */ -.long 0x07182011 /* Date */ -.long 0x00020661 /* Processor Signature */ -.long 0x52558795 /* Checksum */ -.long 0x00000001 /* Loader Revision */ -.long 0x00000002 /* Processor Flags */ -.long 0x000013d0 /* Data Size (excluding headers) */ -.long 0x00001400 /* Total Size (including headers) */ -.long 0x00000000 /* Reserved */ -.long 0x00000000 /* Reserved */ -.long 0x00000000 /* Reserved */ -/* Data */ -.long 0x00000000 -.long 0x000000a1 -.long 0x00020001 -.long 0x00000105 -.long 0x00000019 -.long 0x00050100 -.long 0x20110715 -.long 0x00000401 -.long 0x00000001 -.long 0x00020661 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x00000000 -.long 0x57a55795 -.long 0xe30f7a7d -.long 0x53be2f8e -.long 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0xe0085450 -.long 0x4cc3cd21 -.long 0x596026bd -.long 0x3e672f6e -.long 0x1b3c52e4 -.long 0xb36ba53b -.long 0x3839341c -.long 0x54dfc0ab -.long 0xe8f1a48b -.long 0x92c5d4fb -.long 0x84c878b6 -.long 0xf1e23bff -.long 0x703501ca -.long 0xdf9805fb -.long 0x1dccb93c -.long 0xa38cbae3 -.long 0xeeecd7c3 -.long 0x0b4ae80a -.long 0xc3f0700d -.long 0xff103196 diff --git a/arch/x86/cpu/queensbay/tnc_car.S b/arch/x86/cpu/queensbay/tnc_car.S index ce001ed..70059b6 100644 --- a/arch/x86/cpu/queensbay/tnc_car.S +++ b/arch/x86/cpu/queensbay/tnc_car.S @@ -116,12 +116,9 @@ temp_ram_init_romstack: .long temp_ram_init_ret .long temp_ram_init_params temp_ram_init_params:
.long ucode_start /* microcode base */.long ucode_size /* microcode size */+_dt_ucode_base_size:
/* These next two fields are filled in by ifdtool */.long 0 /* microcode base */.long 0 /* microcode size */ .long CONFIG_SYS_MONITOR_BASE /* code region base */ .long CONFIG_SYS_MONITOR_LEN /* code region size */
.balign 4-ucode_start:
.include "arch/x86/cpu/queensbay/M0220661105.inc"-ucode_size = ( . - ucode_start) diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 399dafb..3f43f3c 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -50,4 +50,11 @@ memory-map = <0xffe00000 0x00200000>; }; };
microcode {update@0 {+#include "microcode/m0220661105_cv.dtsi"
};};}; diff --git a/arch/x86/dts/microcode/m0220661105_cv.dtsi b/arch/x86/dts/microcode/m0220661105_cv.dtsi new file mode 100644 index 0000000..b4632c5 --- /dev/null +++ b/arch/x86/dts/microcode/m0220661105_cv.dtsi @@ -0,0 +1,366 @@ +/*
- Copyright (c) <1995-2014>, Intel Corporation.
- All rights reserved.
- Redistribution. Redistribution and use in binary form, without modification, are
- permitted provided that the following conditions are met:
.Redistributions must reproduce the above copyright notice and the following
- disclaimer in the documentation and/or other materials provided with the
- distribution.
.Neither the name of Intel Corporation nor the names of its suppliers may be used
- to endorse or promote products derived from this software without specific prior
- written permission.
.No reverse engineering, decompilation, or disassembly of this software is
- permitted.
."Binary form" includes any format commonly used for electronic conveyance
- which is a reversible, bit-exact translation of binary representation to ASCII or
- ISO text, for example, "uuencode."
- DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
- HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
- OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- This is a device tree fragment. Use #include to add these properties to a
- node.
- */
+compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x105>; +intel,date-code = <0x7182011>; +intel,processor-signature = <0x20661>; +intel,checksum = <0x52558795>; +intel,loader-revision = <1>; +intel,processor-flags = <0x2>;
+/* The first 48-bytes are the public header which repeats the above data */ +data = <
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Reviewed-by: Bin Meng bmeng.cn@gmail.com
Tested on Intel Crown Bay
Tested-by: Bin Meng bmeng.cn@gmail.com
Hi Bin,
On 16 December 2014 at 03:01, Bin Meng bmeng.cn@gmail.com wrote:
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed.
Also move the microcode for queensbay (unfortunately the wrong version).
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Update microcode file to version 5_cv
- Drop patches that have already been applied
Makefile | 4 +- arch/x86/cpu/queensbay/M0220661105.inc | 1288 ---------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/microcode/m0220661105_cv.dtsi | 366 ++++++++ 5 files changed, 380 insertions(+), 1296 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi
[snip]
--
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Tested on Intel Crown Bay
Tested-by: Bin Meng bmeng.cn@gmail.com
This patch is for you, I cannot apply it as it depends on one of your patches. If I apply your patch then it breaks the build.
So it would be best if you squashed this patch into one of yours. I'll push everything to x86/master (except the microcode patch which needs another rev) ready for you to rebase your patches.
Regards, Simon
Hi Simon,
On Wed, Dec 17, 2014 at 10:49 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 16 December 2014 at 03:01, Bin Meng bmeng.cn@gmail.com wrote:
On Tue, Dec 16, 2014 at 1:02 PM, Simon Glass sjg@chromium.org wrote:
To avoid having two microcode formats, adjust the build system to support obtaining the microcode from the device tree, even in the case where it must be made available before the device tree can be accessed.
Also move the microcode for queensbay (unfortunately the wrong version).
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v2:
- Update microcode file to version 5_cv
- Drop patches that have already been applied
Makefile | 4 +- arch/x86/cpu/queensbay/M0220661105.inc | 1288 ---------------------------- arch/x86/cpu/queensbay/tnc_car.S | 11 +- arch/x86/dts/crownbay.dts | 7 + arch/x86/dts/microcode/m0220661105_cv.dtsi | 366 ++++++++ 5 files changed, 380 insertions(+), 1296 deletions(-) delete mode 100644 arch/x86/cpu/queensbay/M0220661105.inc create mode 100644 arch/x86/dts/microcode/m0220661105_cv.dtsi
[snip]
--
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Tested on Intel Crown Bay
Tested-by: Bin Meng bmeng.cn@gmail.com
This patch is for you, I cannot apply it as it depends on one of your patches. If I apply your patch then it breaks the build.
So it would be best if you squashed this patch into one of yours. I'll push everything to x86/master (except the microcode patch which needs another rev) ready for you to rebase your patches.
Regards, Simon
This patch is integrated into my series @ http://patchwork.ozlabs.org/patch/422192/. Thanks!
Regards, Bin
participants (2)
-
Bin Meng -
Simon Glass