[RFC 0/6] Exynos5: Update devicetree files from linux kernel
Exynos5 is using old devicetree file for only U-boot. It's difficult to adjust the driver-model and sync codes with linux. This patchset is to copy exynos5 devicetree files from linux v5.16.
I don't have all exynos5 boards, so it's difficult to check whether all boards are working fine or not. If this is worthful job, I will work this continously. Otherwise, I will drop this RFC patches.
Tested on XU3 boards.
Jaehoon Chung (6): ARM: exynos5: sync devicetree files from linux kernel board: exynos5-dt-type: add hardkernel,odroid-xu3 compatible mmc: exynos_dw_mmc: add exynos5420 compatible mmc: exynos_dw_mmc: remove the error message and not return i2c: exynos_hs_i2c: add samsung,exynos5250-hsi2c compatible power: s2pms11: change the subnode name to regulators
arch/arm/dts/cros-adc-thermistors.dtsi | 41 + arch/arm/dts/exynos-syscon-restart.dtsi | 20 + arch/arm/dts/exynos4-cpu-thermal.dtsi | 48 + arch/arm/dts/exynos5.dtsi | 384 ++--- arch/arm/dts/exynos5250-arndale.dts | 638 +++++++- arch/arm/dts/exynos5250-pinctrl.dtsi | 1080 +++++++++---- arch/arm/dts/exynos5250-smdk5250.dts | 367 +++-- arch/arm/dts/exynos5250-snow-common.dtsi | 709 +++++++++ arch/arm/dts/exynos5250-snow-rev5.dts | 56 + arch/arm/dts/exynos5250-snow.dts | 549 +------ arch/arm/dts/exynos5250-spring.dts | 677 ++++---- arch/arm/dts/exynos5250.dtsi | 1298 +++++++++++++-- arch/arm/dts/exynos5420-cpus.dtsi | 163 ++ arch/arm/dts/exynos5420-peach-pit.dts | 1228 ++++++++++---- arch/arm/dts/exynos5420-pinctrl.dtsi | 734 +++++++++ arch/arm/dts/exynos5420-smdk5420.dts | 488 ++++-- arch/arm/dts/exynos5420-trip-points.dtsi | 31 + arch/arm/dts/exynos5420.dtsi | 1413 +++++++++++++++++ arch/arm/dts/exynos5422-cpus.dtsi | 170 ++ arch/arm/dts/exynos5422-odroid-core.dtsi | 1071 +++++++++++++ arch/arm/dts/exynos5422-odroidxu3-audio.dtsi | 83 + arch/arm/dts/exynos5422-odroidxu3-common.dtsi | 505 ++++++ arch/arm/dts/exynos5422-odroidxu3-lite.dts | 127 ++ arch/arm/dts/exynos5422-odroidxu3.dts | 336 +--- arch/arm/dts/exynos5422-odroidxu4.dts | 92 ++ arch/arm/dts/exynos54xx-odroidxu-leds.dtsi | 48 + arch/arm/dts/exynos54xx.dtsi | 376 +++-- arch/arm/dts/exynos5800-peach-pi.dts | 1080 +++++++++++-- arch/arm/dts/exynos5800.dtsi | 162 ++ board/samsung/common/exynos5-dt-types.c | 1 + drivers/i2c/exynos_hs_i2c.c | 1 + drivers/mmc/exynos_dw_mmc.c | 10 +- drivers/power/pmic/s2mps11.c | 2 +- include/dt-bindings/clock/exynos-audss-clk.h | 27 + include/dt-bindings/clock/exynos5250.h | 181 +++ include/dt-bindings/clock/exynos5420.h | 277 ++++ include/dt-bindings/clock/maxim,max77686.h | 20 + include/dt-bindings/clock/samsung,s2mps11.h | 20 + include/dt-bindings/pinctrl/samsung.h | 77 + include/dt-bindings/sound/samsung-i2s.h | 15 + 40 files changed, 11944 insertions(+), 2661 deletions(-) create mode 100644 arch/arm/dts/cros-adc-thermistors.dtsi create mode 100644 arch/arm/dts/exynos-syscon-restart.dtsi create mode 100644 arch/arm/dts/exynos4-cpu-thermal.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-common.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-rev5.dts create mode 100644 arch/arm/dts/exynos5420-cpus.dtsi create mode 100644 arch/arm/dts/exynos5420-pinctrl.dtsi create mode 100644 arch/arm/dts/exynos5420-trip-points.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/dts/exynos5422-cpus.dtsi create mode 100644 arch/arm/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-audio.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-common.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-lite.dts create mode 100644 arch/arm/dts/exynos5422-odroidxu4.dts create mode 100644 arch/arm/dts/exynos54xx-odroidxu-leds.dtsi create mode 100644 arch/arm/dts/exynos5800.dtsi create mode 100644 include/dt-bindings/clock/exynos-audss-clk.h create mode 100644 include/dt-bindings/clock/exynos5250.h create mode 100644 include/dt-bindings/clock/exynos5420.h create mode 100644 include/dt-bindings/clock/maxim,max77686.h create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h create mode 100644 include/dt-bindings/pinctrl/samsung.h create mode 100644 include/dt-bindings/sound/samsung-i2s.h
Update exynos5 series dts from linux kernel(v5.16)
Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- arch/arm/dts/cros-adc-thermistors.dtsi | 41 + arch/arm/dts/exynos-syscon-restart.dtsi | 20 + arch/arm/dts/exynos4-cpu-thermal.dtsi | 48 + arch/arm/dts/exynos5.dtsi | 384 ++--- arch/arm/dts/exynos5250-arndale.dts | 638 +++++++- arch/arm/dts/exynos5250-pinctrl.dtsi | 1080 +++++++++---- arch/arm/dts/exynos5250-smdk5250.dts | 367 +++-- arch/arm/dts/exynos5250-snow-common.dtsi | 709 +++++++++ arch/arm/dts/exynos5250-snow-rev5.dts | 56 + arch/arm/dts/exynos5250-snow.dts | 549 +------ arch/arm/dts/exynos5250-spring.dts | 677 ++++---- arch/arm/dts/exynos5250.dtsi | 1298 +++++++++++++-- arch/arm/dts/exynos5420-cpus.dtsi | 163 ++ arch/arm/dts/exynos5420-peach-pit.dts | 1228 ++++++++++---- arch/arm/dts/exynos5420-pinctrl.dtsi | 734 +++++++++ arch/arm/dts/exynos5420-smdk5420.dts | 488 ++++-- arch/arm/dts/exynos5420-trip-points.dtsi | 31 + arch/arm/dts/exynos5420.dtsi | 1413 +++++++++++++++++ arch/arm/dts/exynos5422-cpus.dtsi | 170 ++ arch/arm/dts/exynos5422-odroid-core.dtsi | 1071 +++++++++++++ arch/arm/dts/exynos5422-odroidxu3-audio.dtsi | 83 + arch/arm/dts/exynos5422-odroidxu3-common.dtsi | 505 ++++++ arch/arm/dts/exynos5422-odroidxu3-lite.dts | 127 ++ arch/arm/dts/exynos5422-odroidxu3.dts | 336 +--- arch/arm/dts/exynos5422-odroidxu4.dts | 92 ++ arch/arm/dts/exynos54xx-odroidxu-leds.dtsi | 48 + arch/arm/dts/exynos54xx.dtsi | 376 +++-- arch/arm/dts/exynos5800-peach-pi.dts | 1080 +++++++++++-- arch/arm/dts/exynos5800.dtsi | 162 ++ include/dt-bindings/clock/exynos-audss-clk.h | 27 + include/dt-bindings/clock/exynos5250.h | 181 +++ include/dt-bindings/clock/exynos5420.h | 277 ++++ include/dt-bindings/clock/maxim,max77686.h | 20 + include/dt-bindings/clock/samsung,s2mps11.h | 20 + include/dt-bindings/pinctrl/samsung.h | 77 + include/dt-bindings/sound/samsung-i2s.h | 15 + 36 files changed, 11938 insertions(+), 2653 deletions(-) create mode 100644 arch/arm/dts/cros-adc-thermistors.dtsi create mode 100644 arch/arm/dts/exynos-syscon-restart.dtsi create mode 100644 arch/arm/dts/exynos4-cpu-thermal.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-common.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-rev5.dts create mode 100644 arch/arm/dts/exynos5420-cpus.dtsi create mode 100644 arch/arm/dts/exynos5420-pinctrl.dtsi create mode 100644 arch/arm/dts/exynos5420-trip-points.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/dts/exynos5422-cpus.dtsi create mode 100644 arch/arm/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-audio.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-common.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-lite.dts create mode 100644 arch/arm/dts/exynos5422-odroidxu4.dts create mode 100644 arch/arm/dts/exynos54xx-odroidxu-leds.dtsi create mode 100644 arch/arm/dts/exynos5800.dtsi create mode 100644 include/dt-bindings/clock/exynos-audss-clk.h create mode 100644 include/dt-bindings/clock/exynos5250.h create mode 100644 include/dt-bindings/clock/exynos5420.h create mode 100644 include/dt-bindings/clock/maxim,max77686.h create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h create mode 100644 include/dt-bindings/pinctrl/samsung.h create mode 100644 include/dt-bindings/sound/samsung-i2s.h
diff --git a/arch/arm/dts/cros-adc-thermistors.dtsi b/arch/arm/dts/cros-adc-thermistors.dtsi new file mode 100644 index 000000000000..97e616f7b841 --- /dev/null +++ b/arch/arm/dts/cros-adc-thermistors.dtsi @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Thermistor dts fragment for devices that use Thermistors as + * children of the IIO based ADC. + * + * Currently, used by Exynos5420 based Peach PIT and + * Exynos5800 based Peach PI. + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. +*/ + +&adc { + thermistor3 { + compatible = "murata,ncp15wb473"; + pullup-uv = <1800000>; + pullup-ohm = <47000>; + pulldown-ohm = <0>; + io-channels = <&adc 3>; + }; + thermistor4 { + compatible = "murata,ncp15wb473"; + pullup-uv = <1800000>; + pullup-ohm = <47000>; + pulldown-ohm = <0>; + io-channels = <&adc 4>; + }; + thermistor5 { + compatible = "murata,ncp15wb473"; + pullup-uv = <1800000>; + pullup-ohm = <47000>; + pulldown-ohm = <0>; + io-channels = <&adc 5>; + }; + thermistor6 { + compatible = "murata,ncp15wb473"; + pullup-uv = <1800000>; + pullup-ohm = <47000>; + pulldown-ohm = <0>; + io-channels = <&adc 6>; + }; +}; diff --git a/arch/arm/dts/exynos-syscon-restart.dtsi b/arch/arm/dts/exynos-syscon-restart.dtsi new file mode 100644 index 000000000000..ecf416690a15 --- /dev/null +++ b/arch/arm/dts/exynos-syscon-restart.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos SoC syscon reboot/poweroff nodes common definition. + */ + +&pmu_system_controller { + poweroff: syscon-poweroff { + compatible = "syscon-poweroff"; + regmap = <&pmu_system_controller>; + offset = <0x330C>; /* PS_HOLD_CONTROL */ + mask = <0x5200>; /* reset value */ + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&pmu_system_controller>; + offset = <0x0400>; /* SWRESET */ + mask = <0x1>; + }; +}; diff --git a/arch/arm/dts/exynos4-cpu-thermal.dtsi b/arch/arm/dts/exynos4-cpu-thermal.dtsi new file mode 100644 index 000000000000..021d9fc1b492 --- /dev/null +++ b/arch/arm/dts/exynos4-cpu-thermal.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device tree sources for Exynos4 thermal zone + * + * Copyright (c) 2014 Lukasz Majewski l.majewski@samsung.com + */ + +#include <dt-bindings/thermal/thermal.h> + +/ { +thermal-zones { + cpu_thermal: cpu-thermal { + thermal-sensors = <&tmu 0>; + polling-delay-passive = <0>; + polling-delay = <0>; + trips { + cpu_alert0: cpu-alert-0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu_alert1: cpu-alert-1 { + temperature = <95000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu_alert2: cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu_alert0>; + }; + map1 { + trip = <&cpu_alert1>; + }; + }; + }; +}; +}; diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi index cdc965d90dad..9ce9fb3fc190 100644 --- a/arch/arm/dts/exynos5.dtsi +++ b/arch/arm/dts/exynos5.dtsi @@ -1,224 +1,230 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * Copyright (c) 2013 The Chromium OS Authors - * SAMSUNG EXYNOS5 SoC device tree source + * Samsung's Exynos5 SoC series common device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular + * SoCs from Exynos5 series can include this file and provide values for SoCs + * specfic bindings. */
-#include "skeleton.dtsi" -#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h>
/ { - compatible = "samsung,exynos5"; - interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>;
- combiner: interrupt-controller@10440000 { - compatible = "samsung,exynos4210-combiner"; - #interrupt-cells = <2>; - interrupt-controller; - samsung,combiner-nr = <32>; - reg = <0x10440000 0x1000>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; - }; - - gic: interrupt-controller@10481000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x10481000 0x1000>, - <0x10482000 0x1000>, - <0x10484000 0x2000>, - <0x10486000 0x2000>; - interrupts = <1 9 0xf04>; - }; - - sromc@12250000 { - compatible = "samsung,exynos-sromc"; - reg = <0x12250000 0x20>; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c_0: i2c@12C60000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C60000 0x100>; - interrupts = <0 56 0>; - #address-cells = <1>; - #size-cells = <0>; + aliases { + i2c0 = &i2c_0; + i2c1 = &i2c_1; + i2c2 = &i2c_2; + i2c3 = &i2c_3; + serial0 = &serial_0; + serial1 = &serial_1; + serial2 = &serial_2; + serial3 = &serial_3; };
- i2c_1: i2c@12C70000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C70000 0x100>; - interrupts = <0 57 0>; + soc: soc { + compatible = "simple-bus"; #address-cells = <1>; - #size-cells = <0>; - }; + #size-cells = <1>; + ranges;
- i2c_2: i2c@12C80000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C80000 0x100>; - interrupts = <0 58 0>; - #address-cells = <1>; - #size-cells = <0>; - }; + chipid: chipid@10000000 { + compatible = "samsung,exynos4210-chipid"; + reg = <0x10000000 0x100>; + };
- i2c_3: i2c@12C90000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12C90000 0x100>; - interrupts = <0 59 0>; - #address-cells = <1>; - #size-cells = <0>; - }; + sromc: memory-controller@12250000 { + compatible = "samsung,exynos4210-srom"; + reg = <0x12250000 0x14>; + };
- spi_0: spi@12d20000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-spi"; - reg = <0x12d20000 0x30>; - interrupts = <0 68 0>; - }; + combiner: interrupt-controller@10440000 { + compatible = "samsung,exynos4210-combiner"; + #interrupt-cells = <2>; + interrupt-controller; + samsung,combiner-nr = <32>; + reg = <0x10440000 0x1000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + };
- spi_1: spi@12d30000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-spi"; - reg = <0x12d30000 0x30>; - interrupts = <0 69 0>; - }; + gic: interrupt-controller@10481000 { + compatible = "arm,gic-400", "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x10481000 0x1000>, + <0x10482000 0x2000>, + <0x10484000 0x2000>, + <0x10486000 0x2000>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + };
- spi_2: spi@12d40000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-spi"; - reg = <0x12d40000 0x30>; - clock-frequency = <50000000>; - interrupts = <0 70 0>; - }; - - spi_3: spi@131a0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-spi"; - reg = <0x131a0000 0x30>; - interrupts = <0 129 0>; - }; + sysreg_system_controller: syscon@10050000 { + compatible = "samsung,exynos5-sysreg", "syscon"; + reg = <0x10050000 0x5000>; + };
- spi_4: spi@131b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-spi"; - reg = <0x131b0000 0x30>; - interrupts = <0 130 0>; - }; + serial_0: serial@12c00000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C00000 0x100>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + };
- ehci@12110000 { - compatible = "samsung,exynos-ehci"; - reg = <0x12110000 0x100>; - #address-cells = <1>; - #size-cells = <1>; + serial_1: serial@12c10000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C10000 0x100>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + };
- phy { - compatible = "samsung,exynos-usb-phy"; - reg = <0x12130000 0x100>; + serial_2: serial@12c20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C20000 0x100>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; }; - };
- tmu@10060000 { - compatible = "samsung,exynos-tmu"; - reg = <0x10060000 0x10000>; - }; + serial_3: serial@12c30000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C30000 0x100>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + };
- fimd@14400000 { - u-boot,dm-pre-reloc; - compatible = "samsung,exynos-fimd"; - reg = <0x14400000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - }; + i2c_0: i2c@12c60000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C60000 0x100>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + samsung,sysreg-phandle = <&sysreg_system_controller>; + status = "disabled"; + };
- dp: dp@145b0000 { - compatible = "samsung,exynos5-dp"; - reg = <0x145b0000 0x1000>; - }; + i2c_1: i2c@12c70000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C70000 0x100>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + samsung,sysreg-phandle = <&sysreg_system_controller>; + status = "disabled"; + };
- xhci0: xhci@12000000 { - compatible = "samsung,exynos5250-xhci"; - reg = <0x12000000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; + i2c_2: i2c@12c80000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C80000 0x100>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + samsung,sysreg-phandle = <&sysreg_system_controller>; + status = "disabled"; + };
- phy { - compatible = "samsung,exynos5250-usb3-phy"; - reg = <0x12100000 0x100>; + i2c_3: i2c@12c90000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12C90000 0x100>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + samsung,sysreg-phandle = <&sysreg_system_controller>; + status = "disabled"; }; - };
- mmc@12200000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-dwmmc"; - reg = <0x12200000 0x1000>; - interrupts = <0 75 0>; - }; + pwm: pwm@12dd0000 { + compatible = "samsung,exynos4210-pwm"; + reg = <0x12DD0000 0x100>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + samsung,pwm-outputs = <0>, <1>, <2>, <3>; + #pwm-cells = <3>; + };
- mmc@12210000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-dwmmc"; - reg = <0x12210000 0x1000>; - interrupts = <0 76 0>; - }; + rtc: rtc@101e0000 { + compatible = "samsung,s3c6410-rtc"; + reg = <0x101E0000 0x100>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + };
- mmc@12220000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-dwmmc"; - reg = <0x12220000 0x1000>; - interrupts = <0 77 0>; - }; + fimd: fimd@14400000 { + compatible = "samsung,exynos5250-fimd"; + interrupt-parent = <&combiner>; + reg = <0x14400000 0x40000>; + interrupt-names = "fifo", "vsync", "lcd_sys"; + interrupts = <18 4>, <18 5>, <18 6>; + samsung,sysreg = <&sysreg_system_controller>; + status = "disabled"; + };
- mmc@12230000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos-dwmmc"; - reg = <0x12230000 0x1000>; - interrupts = <0 78 0>; - }; + dp: dp-controller@145b0000 { + compatible = "samsung,exynos5-dp"; + reg = <0x145B0000 0x1000>; + interrupts = <10 3>; + interrupt-parent = <&combiner>; + status = "disabled"; + };
- serial@12C00000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C00000 0x100>; - interrupts = <0 51 0>; - id = <0>; - }; + sss: sss@10830000 { + compatible = "samsung,exynos4210-secss"; + reg = <0x10830000 0x300>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + };
- serial@12C10000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C10000 0x100>; - interrupts = <0 52 0>; - id = <1>; - }; + prng: rng@10830400 { + compatible = "samsung,exynos5250-prng"; + reg = <0x10830400 0x200>; + };
- serial@12C20000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C20000 0x100>; - interrupts = <0 53 0>; - id = <2>; - }; + trng: rng@10830600 { + compatible = "samsung,exynos5250-trng"; + reg = <0x10830600 0x100>; + };
- serial@12C30000 { - compatible = "samsung,exynos4210-uart"; - reg = <0x12C30000 0x100>; - interrupts = <0 54 0>; - u-boot,dm-pre-reloc; - id = <3>; + g2d: g2d@10850000 { + compatible = "samsung,exynos5250-g2d"; + reg = <0x10850000 0x1000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/dts/exynos5250-arndale.dts b/arch/arm/dts/exynos5250-arndale.dts index 60309c61f302..3583095fbb2a 100644 --- a/arch/arm/dts/exynos5250-arndale.dts +++ b/arch/arm/dts/exynos5250-arndale.dts @@ -1,46 +1,634 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * SAMSUNG Arndale board device tree source + * Samsung's Exynos5250 based Arndale board device tree source * * Copyright (c) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com */
/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/clock/samsung,s2mps11.h> +#include <dt-bindings/sound/samsung-i2s.h> #include "exynos5250.dtsi"
/ { - model = "SAMSUNG Arndale board based on EXYNOS5250"; - compatible = "samsung,arndale", "samsung,exynos5250"; + model = "Insignal Arndale evaluation board based on Exynos5250"; + compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5";
- aliases { - i2c0 = "/i2c@12C60000"; - i2c1 = "/i2c@12C70000"; - i2c2 = "/i2c@12C80000"; - i2c3 = "/i2c@12C90000"; - i2c4 = "/i2c@12CA0000"; - i2c5 = "/i2c@12CB0000"; - i2c6 = "/i2c@12CC0000"; - i2c7 = "/i2c@12CD0000"; - serial0 = "/serial@12C20000"; - console = "/serial@12C20000"; + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x80000000>; };
- mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; + chosen { + stdout-path = "serial2:115200n8"; };
- mmc@12210000 { - status = "disabled"; + gpio-keys { + compatible = "gpio-keys"; + + menu { + label = "SW-TACT2"; + gpios = <&gpx1 4 GPIO_ACTIVE_LOW>; + linux,code = <KEY_MENU>; + wakeup-source; + }; + + home { + label = "SW-TACT3"; + gpios = <&gpx1 5 GPIO_ACTIVE_LOW>; + linux,code = <KEY_HOME>; + wakeup-source; + }; + + up { + label = "SW-TACT4"; + gpios = <&gpx1 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_UP>; + wakeup-source; + }; + + down { + label = "SW-TACT5"; + gpios = <&gpx1 7 GPIO_ACTIVE_LOW>; + linux,code = <KEY_DOWN>; + wakeup-source; + }; + + back { + label = "SW-TACT6"; + gpios = <&gpx2 0 GPIO_ACTIVE_LOW>; + linux,code = <KEY_BACK>; + wakeup-source; + }; + + wakeup { + label = "SW-TACT7"; + gpios = <&gpx2 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_WAKEUP>; + wakeup-source; + }; + }; + + panel: panel { + compatible = "boe,hv070wsa-100"; + power-supply = <&vcc_3v3_reg>; + enable-gpios = <&gpd1 3 GPIO_ACTIVE_HIGH>; + port { + panel_ep: endpoint { + remote-endpoint = <&bridge_out_ep>; + }; + }; + }; + + main_dc_reg: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "MAIN_DC"; + regulator-always-on; + }; + + mmc_reg: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "VDD_MMC"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + reg_hdmi_en: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "hdmi-en"; + regulator-always-on; };
- mmc@12220000 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; + vcc_1v2_reg: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vcc_1v8_reg: regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "VCC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc_3v3_reg: regulator-5 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + sound { + compatible = "samsung,arndale-wm1811"; + samsung,audio-cpu = <&i2s0>; + samsung,audio-codec = <&wm1811>; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <24000000>; + }; + }; + + // SMSC USB3503 connected in hardware only mode as a PHY + usb_hub: usb-hub { + compatible = "smsc,usb3503a"; + + reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; + connect-gpios = <&gpd1 7 GPIO_ACTIVE_HIGH>; + }; +}; + +&clock { + assigned-clocks = <&clock CLK_FOUT_EPLL>; + assigned-clock-rates = <49152000>; +}; + +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-parents = <&clock CLK_FOUT_EPLL>; +}; + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; + +&dsi_0 { + vddcore-supply = <&ldo8_reg>; + vddio-supply = <&ldo10_reg>; + samsung,pll-clock-frequency = <24000000>; + samsung,burst-clock-frequency = <320000000>; + samsung,esc-clock-frequency = <10000000>; + status = "okay"; + + bridge@0 { + reg = <0>; + compatible = "toshiba,tc358764"; + vddc-supply = <&vcc_1v2_reg>; + vddio-supply = <&vcc_1v8_reg>; + vddlvds-supply = <&vcc_3v3_reg>; + reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + port@1 { + reg = <1>; + bridge_out_ep: endpoint { + remote-endpoint = <&panel_ep>; + }; + }; }; +}; + +&fimd { + status = "okay"; +}; + +&hdmi { + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd>; + status = "okay"; + ddc = <&i2c_ddc>; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; + vdd-supply = <&ldo8_reg>; +}; + +&i2c_0 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <20000>; + samsung,i2c-slave-addr = <0x66>; + + pmic@66 { + compatible = "samsung,s5m8767-pmic"; + reg = <0x66>; + interrupt-parent = <&gpx3>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&s5m8767_irq>; + wakeup-source; + + vinb1-supply = <&main_dc_reg>; + vinb2-supply = <&main_dc_reg>; + vinb3-supply = <&main_dc_reg>; + vinb4-supply = <&main_dc_reg>; + vinb5-supply = <&main_dc_reg>; + vinb6-supply = <&main_dc_reg>; + vinb7-supply = <&main_dc_reg>; + vinb8-supply = <&main_dc_reg>; + vinb9-supply = <&main_dc_reg>; + + vinl1-supply = <&buck7_reg>; + vinl2-supply = <&buck7_reg>; + vinl3-supply = <&buck7_reg>; + vinl4-supply = <&main_dc_reg>; + vinl5-supply = <&main_dc_reg>; + vinl6-supply = <&main_dc_reg>; + vinl7-supply = <&main_dc_reg>; + vinl8-supply = <&buck8_reg>; + vinl9-supply = <&buck8_reg>; + + s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_HIGH>, + <&gpd1 1 GPIO_ACTIVE_HIGH>, + <&gpd1 2 GPIO_ACTIVE_HIGH>; + s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>, + <&gpx2 4 GPIO_ACTIVE_HIGH>, + <&gpx2 5 GPIO_ACTIVE_HIGH>; + + s5m8767_osc: clocks { + compatible = "samsung,s5m8767-clk"; + #clock-cells = <1>; + clock-output-names = "s5m8767_ap", "unused1", "unused2"; + }; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "VDD_ALIVE_1.0V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo2_reg: LDO2 { + regulator-name = "VDD_28IO_DP_1.35V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo3_reg: LDO3 { + regulator-name = "VDD_COMMON1_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo4_reg: LDO4 { + regulator-name = "VDD_IOPERI_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + op_mode = <1>; + }; + + ldo5_reg: LDO5 { + regulator-name = "VDD_EXT_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo6_reg: LDO6 { + regulator-name = "VDD_MPLL_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo7_reg: LDO7 { + regulator-name = "VDD_XPLL_1.1V"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo8_reg: LDO8 { + regulator-name = "VDD_COMMON2_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo9_reg: LDO9 { + regulator-name = "VDD_33ON_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + op_mode = <1>; + }; + + ldo10_reg: LDO10 { + regulator-name = "VDD_COMMON3_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo11_reg: LDO11 { + regulator-name = "VDD_ABB2_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo12_reg: LDO12 { + regulator-name = "VDD_USB_3.0V"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo13_reg: LDO13 { + regulator-name = "VDDQ_C2C_W_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo14_reg: LDO14 { + regulator-name = "VDD18_ABB0_3_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo15_reg: LDO15 { + regulator-name = "VDD10_COMMON4_1.0V"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo16_reg: LDO16 { + regulator-name = "VDD18_HSIC_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo17_reg: LDO17 { + regulator-name = "VDDQ_MMC2_3_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + ldo18_reg: LDO18 { + regulator-name = "VDD_33ON_2.8V"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + op_mode = <1>; + }; + + ldo22_reg: LDO22 { + regulator-name = "EXT_33_OFF"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + op_mode = <1>; + }; + + ldo23_reg: LDO23 { + regulator-name = "EXT_28_OFF"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + op_mode = <1>; + }; + + ldo25_reg: LDO25 { + regulator-name = "PVDD_LDO25"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + op_mode = <1>; + }; + + ldo26_reg: LDO26 { + regulator-name = "EXT_18_OFF"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + op_mode = <1>; + }; + + buck1_reg: BUCK1 { + regulator-name = "VDD_MIF"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + buck2_reg: BUCK2 { + regulator-name = "VDD_ARM"; + regulator-min-microvolt = <912500>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + buck3_reg: BUCK3 { + regulator-name = "VDD_INT"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + buck4_reg: BUCK4 { + regulator-name = "VDD_G3D"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + buck5_reg: BUCK5 { + regulator-name = "VDD_MEM_1.35V"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1355000>; + regulator-always-on; + regulator-boot-on; + op_mode = <1>; + }; + + buck7_reg: BUCK7 { + regulator-name = "PVDD_BUCK7"; + regulator-always-on; + op_mode = <1>; + }; + + buck8_reg: BUCK8 { + regulator-name = "PVDD_BUCK8"; + regulator-always-on; + op_mode = <1>; + }; + + buck9_reg: BUCK9 { + regulator-name = "VDD_33_OFF_EXT1"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <3000000>; + op_mode = <1>; + }; + }; + }; +}; + +&i2c_3 { + status = "okay"; + + wm1811: audio-codec@1a { + compatible = "wlf,wm1811"; + reg = <0x1a>; + clocks = <&i2s0 CLK_I2S_CDCLK>; + clock-names = "MCLK1"; + + AVDD2-supply = <&main_dc_reg>; + CPVDD-supply = <&main_dc_reg>; + DBVDD1-supply = <&main_dc_reg>; + DBVDD2-supply = <&main_dc_reg>; + DBVDD3-supply = <&main_dc_reg>; + LDO1VDD-supply = <&main_dc_reg>; + SPKVDD1-supply = <&main_dc_reg>; + SPKVDD2-supply = <&main_dc_reg>; + + wlf,ldo1ena = <&gpb0 0 GPIO_ACTIVE_HIGH>; + wlf,ldo2ena = <&gpb0 1 GPIO_ACTIVE_HIGH>; + }; +}; + +&i2c_8 { + status = "okay"; + /* used by HDMI PHY */ + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_9 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40000>; +}; + +&i2s0 { + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>; + assigned-clock-parents = <&clock_audss EXYNOS_I2S_BUS>; + status = "okay"; +}; + +&i2s0_bus { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; +}; + +&mali { + mali-supply = <&buck4_reg>; + status = "okay"; +}; + +&mixer { + status = "okay"; +}; + +&mmc_0 { + status = "okay"; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + vmmc-supply = <&mmc_reg>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + bus-width = <8>; + cap-mmc-highspeed; +}; + +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + vmmc-supply = <&mmc_reg>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; +}; + +&pinctrl_0 { + s5m8767_irq: s5m8767-irq { + samsung,pins = "gpx3-2"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; + +&rtc { + clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&sata_phy { + status = "okay"; + samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; +}; + +&sata_phy_i2c { + status = "okay"; +};
- mmc@12230000 { - status = "disabled"; +&soc { + /* + * For unknown reasons HDMI-DDC does not work with Exynos I2C + * controllers. Lets use software I2C over GPIO pins as a workaround. + */ + i2c_ddc: i2c-10 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_gpio_bus>; + status = "okay"; + compatible = "i2c-gpio"; + sda-gpios = <&gpa0 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpa0 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; }; }; diff --git a/arch/arm/dts/exynos5250-pinctrl.dtsi b/arch/arm/dts/exynos5250-pinctrl.dtsi index 67755a1e08ff..d31a68672bfa 100644 --- a/arch/arm/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/dts/exynos5250-pinctrl.dtsi @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source * @@ -6,326 +7,827 @@ * * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device * tree nodes are listed in this file. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/ { - pinctrl@11400000 { - gpa0: gpa0 { - gpio-controller; - #gpio-cells = <2>; + */
- interrupt-controller; - #interrupt-cells = <2>; - }; - - gpa1: gpa1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpa2: gpa2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpb0: gpb0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpb1: gpb1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpb2: gpb2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpb3: gpb3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc0: gpc0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc1: gpc1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc2: gpc2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpc3: gpc3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpd0: gpd0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpd1: gpd1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpy0: gpy0 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy1: gpy1 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy2: gpy2 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy3: gpy3 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy4: gpy4 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy5: gpy5 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpy6: gpy6 { - gpio-controller; - #gpio-cells = <2>; - }; - - gpc4: gpc4 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpx0: gpx0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - interrupt-parent = <&combiner>; - #interrupt-cells = <2>; - interrupts = <23 0>, <24 0>, <25 0>, <25 1>, - <26 0>, <26 1>, <27 0>, <27 1>; - }; - - gpx1: gpx1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - interrupt-parent = <&combiner>; - #interrupt-cells = <2>; - interrupts = <28 0>, <28 1>, <29 0>, <29 1>, - <30 0>, <30 1>, <31 0>, <31 1>; - }; - - gpx2: gpx2 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpx3: gpx3 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - }; - - pinctrl@13400000 { - gpe0: gpe0 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpe1: gpe1 { - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; +#include <dt-bindings/pinctrl/samsung.h>
- gpf0: gpf0 { - gpio-controller; - #gpio-cells = <2>; +&pinctrl_0 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpf1: gpf1 { - gpio-controller; - #gpio-cells = <2>; + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpg0: gpg0 { - gpio-controller; - #gpio-cells = <2>; + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpg1: gpg1 { - gpio-controller; - #gpio-cells = <2>; + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpg2: gpg2 { - gpio-controller; - #gpio-cells = <2>; + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gph0: gph0 { - gpio-controller; - #gpio-cells = <2>; + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gph1: gph1 { - gpio-controller; - #gpio-cells = <2>; + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
+ gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; };
- pinctrl@10d10000 { - gpv0: gpv0 { - gpio-controller; - #gpio-cells = <2>; + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpv1: gpv1 { - gpio-controller; - #gpio-cells = <2>; + gpc2: gpc2 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpv2: gpv2 { - gpio-controller; - #gpio-cells = <2>; + gpc3: gpc3 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + };
- gpv3: gpv3 { - gpio-controller; - #gpio-cells = <2>; + gpd0: gpd0 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>;
- gpv4: gpv4 { - gpio-controller; - #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + };
- interrupt-controller; - #interrupt-cells = <2>; - }; + gpc4: gpc4 { + gpio-controller; + #gpio-cells = <2>;
+ interrupt-controller; + #interrupt-cells = <2>; };
- pinctrl@03860000 { - gpz: gpz { - gpio-controller; - #gpio-cells = <2>; + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>;
- interrupt-controller; - #interrupt-cells = <2>; - }; + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <23 0>, <24 0>, <25 0>, <25 1>, + <26 0>, <26 1>, <27 0>, <27 1>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <28 0>, <28 1>, <29 0>, <29 1>, + <30 0>, <30 1>, <31 0>, <31 1>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpa0-0", "gpa0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gpa0-2", "gpa0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c2_bus: i2c2-bus { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c2_hs_bus: i2c2-hs-bus { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c2_gpio_bus: i2c2-gpio-bus { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c3_bus: i2c3-bus { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c3_hs_bus: i2c3-hs-bus { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart3_data: uart3-data { + samsung,pins = "gpa1-4", "gpa1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpa2-0", "gpa2-2", "gpa2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c4_bus: i2c4-bus { + samsung,pins = "gpa2-0", "gpa2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c5_bus: i2c5-bus { + samsung,pins = "gpa2-2", "gpa2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2s1_bus: i2s1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + pcm1_bus: pcm1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + ac97_bus: ac97-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2s2_bus: i2s2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", + "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + pcm2_bus: pcm2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", + "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spdif_bus: spdif-bus { + samsung,pins = "gpb1-0", "gpb1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_5>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c6_bus: i2c6-bus { + samsung,pins = "gpb1-3", "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + pwm0_out: pwm0-out { + samsung,pins = "gpb2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpb2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpb2-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpb2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c7_bus: i2c7-bus { + samsung,pins = "gpb2-2", "gpb2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpb3-0", "gpb3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c1_bus: i2c1-bus { + samsung,pins = "gpb3-2", "gpb3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c0_hs_bus: i2c0-hs-bus { + samsung,pins = "gpb3-0", "gpb3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + i2c1_hs_bus: i2c1-hs-bus { + samsung,pins = "gpb3-2", "gpb3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpc0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpc0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd0_cd: sd0-cd { + samsung,pins = "gpc0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpc0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpc0-3", "gpc0-4", "gpc0-5", "gpc0-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpc1-0", "gpc1-1", "gpc1-2", "gpc1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpc2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpc2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd1_cd: sd1-cd { + samsung,pins = "gpc2-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpc2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpc2-3", "gpc2-4", "gpc2-5", "gpc2-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpc3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpc3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd2_cd: sd2-cd { + samsung,pins = "gpc3-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpc3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpc3-3", "gpc3-4", "gpc3-5", "gpc3-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd2_bus8: sd2-bus-width8 { + samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd3_clk: sd3-clk { + samsung,pins = "gpc4-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd3_cmd: sd3-cmd { + samsung,pins = "gpc4-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd3_cd: sd3-cd { + samsung,pins = "gpc4-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd3_bus1: sd3-bus-width1 { + samsung,pins = "gpc4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + sd3_bus4: sd3-bus-width4 { + samsung,pins = "gpc4-3", "gpc4-4", "gpc4-5", "gpc4-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV4>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpd0-0", "gpd0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gpd0-2", "gpd0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + dp_hpd: dp_hpd { + samsung,pins = "gpx0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hdmi_cec: hdmi-cec { + samsung,pins = "gpx3-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hdmi_hpd: hdmi-hpd { + samsung,pins = "gpx3-7"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; +}; + +&pinctrl_1 { + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph0: gph0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + cam_gpio_a: cam-gpio-a { + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", + "gpe1-0", "gpe1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_gpio_b: cam-gpio-b { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_i2c2_bus: cam-i2c2-bus { + samsung,pins = "gpe0-6", "gpe1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_spi1_bus: cam-spi1-bus { + samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_i2c1_bus: cam-i2c1-bus { + samsung,pins = "gpf0-2", "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_i2c0_bus: cam-i2c0-bus { + samsung,pins = "gpf0-0", "gpf0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_spi0_bus: cam-spi0-bus { + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_bayrgb_bus: cam-bayrgb-bus { + samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3", + "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7", + "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", + "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7", + "gpg2-0", "gpg2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + cam_port_a: cam-port-a { + samsung,pins = "gph0-0", "gph0-1", "gph0-2", "gph0-3", + "gph1-0", "gph1-1", "gph1-2", "gph1-3", + "gph1-4", "gph1-5", "gph1-6", "gph1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; + +&pinctrl_2 { + gpv0: gpv0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv1: gpv1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv2: gpv2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv3: gpv3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv4: gpv4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + c2c_rxd: c2c-rxd { + samsung,pins = "gpv0-0", "gpv0-1", "gpv0-2", "gpv0-3", + "gpv0-4", "gpv0-5", "gpv0-6", "gpv0-7", + "gpv1-0", "gpv1-1", "gpv1-2", "gpv1-3", + "gpv1-4", "gpv1-5", "gpv1-6", "gpv1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + c2c_txd: c2c-txd { + samsung,pins = "gpv2-0", "gpv2-1", "gpv2-2", "gpv2-3", + "gpv2-4", "gpv2-5", "gpv2-6", "gpv2-7", + "gpv3-0", "gpv3-1", "gpv3-2", "gpv3-3", + "gpv3-4", "gpv3-5", "gpv3-6", "gpv3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; + +&pinctrl_3 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + };
+ i2s0_bus: i2s0-bus { + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", + "gpz-4", "gpz-5", "gpz-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; }; diff --git a/arch/arm/dts/exynos5250-smdk5250.dts b/arch/arm/dts/exynos5250-smdk5250.dts index afe0cca48a93..39bbe18145cf 100644 --- a/arch/arm/dts/exynos5250-smdk5250.dts +++ b/arch/arm/dts/exynos5250-smdk5250.dts @@ -1,172 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0 /* - * SAMSUNG SMDK5250 board device tree source + * Samsung SMDK5250 board device tree source * * Copyright (c) 2012 Samsung Electronics Co., Ltd. * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ + */
/dts-v1/; -#include "exynos5250.dtsi" +#include <dt-bindings/clock/maxim,max77686.h> +#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> +#include "exynos5250.dtsi"
/ { - model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; - compatible = "samsung,smdk5250", "samsung,exynos5250"; + model = "Samsung SMDK5250 board based on Exynos5250"; + compatible = "samsung,smdk5250", "samsung,exynos5250", "samsung,exynos5";
aliases { - i2c0 = "/i2c@12C60000"; - i2c1 = "/i2c@12C70000"; - i2c2 = "/i2c@12C80000"; - i2c3 = "/i2c@12C90000"; - i2c4 = "/i2c@12CA0000"; - i2c5 = "/i2c@12CB0000"; - i2c6 = "/i2c@12CC0000"; - i2c7 = "/i2c@12CD0000"; - spi0 = "/spi@12d20000"; - spi1 = "/spi@12d30000"; - spi2 = "/spi@12d40000"; - spi3 = "/spi@131a0000"; - spi4 = "/spi@131b0000"; - mmc0 = "/mmc@12200000"; - mmc1 = "/mmc@12210000"; - mmc2 = "/mmc@12220000"; - mmc3 = "/mmc@12230000"; - serial0 = "/serial@12C30000"; - console = "/serial@12C30000"; - i2s = "/sound@3830000"; };
- sromc@12250000 { - compatible = "samsung,exynos5-sromc"; - bank = <1>; - srom-timing = <1 9 12 1 6 1 1>; - width = <2>; - lan@5000000 { - compatible = "smsc,lan9215", "smsc,lan"; - reg = <0x5000000 0x100>; - phy-mode = "mii"; - }; + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x80000000>; };
- sound@3830000 { - samsung,codec-type = "wm8994"; + chosen { + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M init=/linuxrc"; + stdout-path = "serial2:115200n8"; };
- sound@12d60000 { - status = "disabled"; + vdd: fixed-regulator-vdd { + compatible = "regulator-fixed"; + regulator-name = "vdd-supply"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; };
- i2c@12C70000 { - wm8994: soundcodec@1a { - reg = <0x1a>; - u-boot,i2c-offset-len = <2>; - compatible = "wolfson,wm8994"; - #sound-dai-cells = <1>; - }; + dbvdd: fixed-regulator-dbvdd { + compatible = "regulator-fixed"; + regulator-name = "dbvdd-supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + spkvdd: fixed-regulator-spkvdd { + compatible = "regulator-fixed"; + regulator-name = "spkvdd-supply"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; };
sound { - compatible = "google,smdk5250-audio-wm8994"; + compatible = "samsung,smdk-wm8994";
- samsung,model = "SMDK5250-I2S-WM8994"; + samsung,i2s-controller = <&i2s0>; samsung,audio-codec = <&wm8994>; - - cpu { - sound-dai = <&i2s0 0>; - }; - - codec { - sound-dai = <&wm8994 0>; - }; };
- i2c@12C60000 { - pmic@9 { - reg = <0x9>; - compatible = "maxim,max77686"; + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <24000000>; }; - };
- tmu@10060000 { - samsung,min-temp = <25>; - samsung,max-temp = <125>; - samsung,start-warning = <95>; - samsung,start-tripping = <105>; - samsung,hw-tripping = <110>; - samsung,efuse-min-value = <40>; - samsung,efuse-value = <55>; - samsung,efuse-max-value = <100>; - samsung,slope = <274761730>; - samsung,dc-value = <25>; + codec_mclk: codec-mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16934000>; + }; }; +};
- fimd@14400000 { - samsung,vl-freq = <60>; - samsung,vl-col = <2560>; - samsung,vl-row = <1600>; - samsung,vl-width = <2560>; - samsung,vl-height = <1600>; - - samsung,vl-clkp; - samsung,vl-dp; - samsung,vl-bpix = <4>; - - samsung,vl-hspw = <32>; - samsung,vl-hbpd = <80>; - samsung,vl-hfpd = <48>; - samsung,vl-vspw = <6>; - samsung,vl-vbpd = <37>; - samsung,vl-vfpd = <3>; - samsung,vl-cmd-allow-len = <0xf>; - - samsung,winid = <3>; - samsung,interface-mode = <1>; - samsung,dp-enabled = <1>; - samsung,dual-lcd-enabled = <0>; - }; +&cpu0 { + cpu0-supply = <&buck2_reg>; +};
- dp@145b0000 { - samsung,lt-status = <0>; - - samsung,master-mode = <0>; - samsung,bist-mode = <0>; - samsung,bist-pattern = <0>; - samsung,h-sync-polarity = <0>; - samsung,v-sync-polarity = <0>; - samsung,interlaced = <0>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - }; +&dp { + samsung,color-space = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>;
- mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <0>; - }; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; + status = "okay";
- mmc@12210000 { - status = "disabled"; + display-timings { + native-mode = <&timing0>; + + timing0: timing { + /* 1280x800 */ + clock-frequency = <50000>; + hactive = <1280>; + vactive = <800>; + hfront-porch = <4>; + hback-porch = <4>; + hsync-len = <4>; + vback-porch = <4>; + vfront-porch = <4>; + vsync-len = <4>; + }; }; +};
- mmc@12220000 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; - samsung,removable = <1>; - }; +&ehci { + samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>; +};
- mmc@12230000 { - status = "disabled"; - }; +&fimd { + status = "okay"; +};
- ehci@12110000 { - samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>; - }; +&hdmi { + status = "okay"; + ddc = <&i2c_2>; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; };
&i2c_0 { @@ -174,11 +125,20 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <20000>;
- max77686@09 { + eeprom@50 { + compatible = "samsung,s524ad0xd1"; + reg = <0x50>; + }; + + max77686: pmic@9 { compatible = "maxim,max77686"; reg = <0x09>; interrupt-parent = <&gpx3>; - interrupts = <2 IRQ_TYPE_NONE>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&max77686_irq>; + #clock-cells = <1>; + wakeup-source;
voltage-regulators { ldo1_reg: LDO1 { @@ -238,6 +198,7 @@ regulator-name = "P1.8V_LDO_OUT10"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; };
ldo11_reg: LDO11 { @@ -318,3 +279,141 @@ }; }; }; + +&i2c_1 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <20000>; + + eeprom@51 { + compatible = "samsung,s524ad0xd1"; + reg = <0x51>; + }; + + wm8994: audio-codec@1a { + compatible = "wlf,wm8994"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + + clocks = <&codec_mclk>; + clock-names = "MCLK1"; + + AVDD2-supply = <&vdd>; + CPVDD-supply = <&vdd>; + DBVDD-supply = <&dbvdd>; + SPKVDD1-supply = <&spkvdd>; + SPKVDD2-supply = <&spkvdd>; + }; +}; + +&i2c_2 { + status = "okay"; + /* used by HDMI DDC */ + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_8 { + status = "okay"; + /* used by HDMI PHY */ + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_9 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40000>; +}; + +&i2s0 { + status = "okay"; +}; + +&mixer { + status = "okay"; +}; + +&mmc_0 { + status = "okay"; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + bus-width = <8>; + cap-mmc-highspeed; +}; + +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&sata { + status = "okay"; +}; + +&sata_phy { + status = "okay"; + samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; +}; + +&sata_phy_i2c { + status = "okay"; +}; + +&spi_1 { + status = "okay"; + cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "w25x80"; + reg = <0>; + spi-max-frequency = <1000000>; + + controller-data { + samsung,spi-feedback-delay = <0>; + }; + + partition@0 { + label = "U-Boot"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "Kernel"; + reg = <0x40000 0xc0000>; + }; + }; +}; + +&pinctrl_0 { + max77686_irq: max77686-irq { + samsung,pins = "gpx3-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; diff --git a/arch/arm/dts/exynos5250-snow-common.dtsi b/arch/arm/dts/exynos5250-snow-common.dtsi new file mode 100644 index 000000000000..2335c4687349 --- /dev/null +++ b/arch/arm/dts/exynos5250-snow-common.dtsi @@ -0,0 +1,709 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Google Snow board device tree source + * + * Copyright (c) 2012 Google, Inc + */ + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/maxim,max77686.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/sound/samsung-i2s.h> +#include "exynos5250.dtsi" + +/ { + aliases { + i2c104 = &i2c_104; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x80000000>; + }; + + chosen { + bootargs = "console=tty1"; + stdout-path = "serial3:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq &lid_irq>; + + power { + label = "Power"; + gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + wakeup-source; + }; + + lid-switch { + label = "Lid"; + gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + wakeup-source; + }; + }; + + vbat: vbat-fixed-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbat-supply"; + regulator-boot-on; + }; + + i2c-arbitrator { + compatible = "i2c-arb-gpio-challenge"; + #address-cells = <1>; + #size-cells = <0>; + + i2c-parent = <&i2c_4>; + + our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>; + their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>; + slew-delay-us = <10>; + wait-retry-us = <3000>; + wait-free-us = <50000>; + + pinctrl-names = "default"; + pinctrl-0 = <&arb_our_claim &arb_their_claim>; + + /* Use ID 104 as a hint that we're on physical bus 4 */ + i2c_104: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + battery: sbs-battery@b { + compatible = "sbs,sbs-battery"; + reg = <0xb>; + sbs,poll-retry-count = <1>; + }; + + cros_ec: embedded-controller@1e { + compatible = "google,cros-ec-i2c"; + reg = <0x1e>; + interrupts = <6 IRQ_TYPE_NONE>; + interrupt-parent = <&gpx1>; + pinctrl-names = "default"; + pinctrl-0 = <&ec_irq>; + wakeup-source; + }; + + power-regulator@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + + /* + * Config irq to disable internal pulls + * even though we run in polling mode. + */ + pinctrl-names = "default"; + pinctrl-0 = <&tps65090_irq>; + + vsys1-supply = <&vbat>; + vsys2-supply = <&vbat>; + vsys3-supply = <&vbat>; + infet1-supply = <&vbat>; + infet2-supply = <&vbat>; + infet3-supply = <&vbat>; + infet4-supply = <&vbat>; + infet5-supply = <&vbat>; + infet6-supply = <&vbat>; + infet7-supply = <&vbat>; + vsys-l1-supply = <&vbat>; + vsys-l2-supply = <&vbat>; + + regulators { + dcdc1 { + ti,enable-ext-control; + }; + dcdc2 { + ti,enable-ext-control; + }; + dcdc3 { + ti,enable-ext-control; + }; + fet1: fet1 { + regulator-name = "vcd_led"; + ti,overcurrent-wait = <3>; + }; + tps65090_fet2: fet2 { + regulator-name = "video_mid"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + fet3 { + regulator-name = "wwan_r"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + fet4 { + regulator-name = "sdcard"; + ti,overcurrent-wait = <3>; + }; + fet5 { + regulator-name = "camout"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + fet6: fet6 { + regulator-name = "lcd_vdd"; + ti,overcurrent-wait = <3>; + }; + tps65090_fet7: fet7 { + regulator-name = "video_mid_1a"; + regulator-always-on; + ti,overcurrent-wait = <3>; + }; + ldo1 { + }; + ldo2 { + }; + }; + + charger { + compatible = "ti,tps65090-charger"; + }; + }; + }; + }; + + sound { + samsung,i2s-controller = <&i2s0>; + }; + + usb3_vbus_reg: regulator-usb3 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb3_vbus_en>; + enable-active-high; + }; + + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <24000000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 1000000 0>; + brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; + default-brightness-level = <7>; + enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>; + power-supply = <&fet1>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; + }; + + panel: panel { + compatible = "auo,b116xw03"; + power-supply = <&fet6>; + backlight = <&backlight>; + + port { + panel_in: endpoint { + remote-endpoint = <&bridge_out>; + }; + }; + }; + + mmc3_pwrseq: mmc3-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpx0 2 GPIO_ACTIVE_LOW>, /* WIFI_RSTn */ + <&gpx0 1 GPIO_ACTIVE_LOW>; /* WIFI_EN */ + clocks = <&max77686 MAX77686_CLK_PMIC>; + clock-names = "ext_clock"; + }; +}; + +&clock { + assigned-clocks = <&clock CLK_FOUT_EPLL>; + assigned-clock-rates = <49152000>; +}; + +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-parents = <&clock CLK_FOUT_EPLL>; +}; + +&cpu0 { + cpu0-supply = <&buck2_reg>; +}; + +&dp { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; + samsung,color-space = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <2>; + hpd-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>; + + ports { + port { + dp_out: endpoint { + remote-endpoint = <&bridge_in>; + }; + }; + }; +}; + +&ehci { + samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>; +}; + +&fimd { + status = "okay"; + samsung,invert-vclk; +}; + +&hdmi { + status = "okay"; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; + hdmi-en-supply = <&tps65090_fet7>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; +}; + +&hdmicec { + status = "okay"; +}; + +&i2c_0 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; + + max77686: pmic@9 { + compatible = "maxim,max77686"; + interrupt-parent = <&gpx3>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&max77686_irq>; + wakeup-source; + reg = <0x09>; + #clock-cells = <1>; + + voltage-regulators { + ldo1_reg: LDO1 { + regulator-name = "P1.0V_LDO_OUT1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "P1.8V_LDO_OUT2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "P1.8V_LDO_OUT3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "P1.1V_LDO_OUT7"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "P1.0V_LDO_OUT8"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "P1.8V_LDO_OUT10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "P3.0V_LDO_OUT12"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo14_reg: LDO14 { + regulator-name = "P1.8V_LDO_OUT14"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "P1.0V_LDO_OUT15"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "P1.8V_LDO_OUT16"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5_reg: BUCK5 { + regulator-name = "P1.8V_BUCK_OUT5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "P1.35V_BUCK_OUT6"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "P2.0V_BUCK_OUT7"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "P2.85V_BUCK_OUT8"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + }; + }; +}; + +&i2c_1 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; + + trackpad@67 { + reg = <0x67>; + compatible = "cypress,cyapa"; + interrupts = <2 IRQ_TYPE_NONE>; + interrupt-parent = <&gpx1>; + wakeup-source; + }; +}; + +/* + * Disabled pullups since external part has its own pullups and + * double-pulling gets us out of spec in some cases. + */ +&i2c2_bus { + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; +}; + +&i2c_2 { + status = "okay"; + /* used by HDMI DDC */ + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_3 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_4 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_5 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; +}; + +&i2c_7 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + + ptn3460: lvds-bridge@20 { + compatible = "nxp,ptn3460"; + reg = <0x20>; + powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>; + edid-emulation = <5>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + + port@1 { + reg = <1>; + + bridge_in: endpoint { + remote-endpoint = <&dp_out>; + }; + }; + }; + }; +}; + +&i2c_8 { + status = "okay"; + /* used by HDMI PHY */ + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; +}; + +&i2s0 { + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>; + assigned-clock-parents = <&clock_audss EXYNOS_I2S_BUS>; + status = "okay"; +}; + +&mali { + mali-supply = <&buck4_reg>; + status = "okay"; +}; + +&mixer { + status = "okay"; +}; + +/* eMMC flash */ +&mmc_0 { + status = "okay"; + non-removable; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>; + bus-width = <8>; + cap-mmc-highspeed; +}; + +/* uSD card */ +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + bus-width = <4>; + wp-gpios = <&gpc2 1 GPIO_ACTIVE_HIGH>; + cap-sd-highspeed; +}; + +/* + * On Snow we've got SIP WiFi and so can keep drive strengths low to + * reduce EMI. + * + * WiFi SDIO module + */ +&mmc_3 { + status = "okay"; + non-removable; + cap-sdio-irq; + keep-power-in-suspend; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_bus4 &wifi_en &wifi_rst>; + bus-width = <4>; + cap-sd-highspeed; + mmc-pwrseq = <&mmc3_pwrseq>; +}; + +&pinctrl_0 { + wifi_en: wifi-en { + samsung,pins = "gpx0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + wifi_rst: wifi-rst { + samsung,pins = "gpx0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + power_key_irq: power-key-irq { + samsung,pins = "gpx1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + ec_irq: ec-irq { + samsung,pins = "gpx1-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + tps65090_irq: tps65090-irq { + samsung,pins = "gpx2-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + usb3_vbus_en: usb3-vbus-en { + samsung,pins = "gpx2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + max77686_irq: max77686-irq { + samsung,pins = "gpx3-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + lid_irq: lid-irq { + samsung,pins = "gpx3-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; + +&pinctrl_1 { + arb_their_claim: arb-their-claim { + samsung,pins = "gpe0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + arb_our_claim: arb-our-claim { + samsung,pins = "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; + +&pmu_system_controller { + assigned-clocks = <&pmu_system_controller 0>; + assigned-clock-parents = <&clock CLK_FIN_PLL>; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&sd3_bus4 { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&sd3_clk { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&sd3_cmd { + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&spi_1 { + status = "okay"; + samsung,spi-src-clk = <0>; + num-cs = <1>; + cs-gpios = <&gpa2 5 GPIO_ACTIVE_HIGH>; +}; + +&usbdrd_dwc3 { + dr_mode = "host"; +}; + +&usbdrd_phy { + vbus-supply = <&usb3_vbus_reg>; +}; + +#include "cros-ec-keyboard.dtsi" diff --git a/arch/arm/dts/exynos5250-snow-rev5.dts b/arch/arm/dts/exynos5250-snow-rev5.dts new file mode 100644 index 000000000000..f8ca61df6981 --- /dev/null +++ b/arch/arm/dts/exynos5250-snow-rev5.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Google Snow Rev 5+ board device tree source + * + * Copyright (c) 2012 Google, Inc + * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos5250-snow-common.dtsi" + +/ { + model = "Google Snow Rev 5+"; + compatible = "google,snow-rev5", "samsung,exynos5250", + "samsung,exynos5"; + chassis-type = "laptop"; + + sound { + compatible = "google,snow-audio-max98090"; + + samsung,model = "Snow-I2S-MAX98090"; + samsung,audio-codec = <&max98090>; + + cpu { + sound-dai = <&i2s0 0>; + }; + + codec { + sound-dai = <&max98090 0>, <&hdmi>; + }; + }; +}; + +&i2c_7 { + max98090: audio-codec@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupts = <4 IRQ_TYPE_NONE>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98090_irq>; + clocks = <&pmu_system_controller 0>; + clock-names = "mclk"; + #sound-dai-cells = <1>; + }; +}; + +&pinctrl_0 { + max98090_irq: max98090-irq { + samsung,pins = "gpx0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts index e41f2d3041e2..a630bc654a49 100644 --- a/arch/arm/dts/exynos5250-snow.dts +++ b/arch/arm/dts/exynos5250-snow.dts @@ -1,553 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 /* - * SAMSUNG Snow board device tree source + * Google Snow board device tree source * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (c) 2012 Google, Inc */
/dts-v1/; -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/input/input.h> -#include "exynos5250.dtsi" +#include "exynos5250-snow-common.dtsi"
/ { model = "Google Snow"; - compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5"; - - aliases { - i2c0 = "/i2c@12C60000"; - i2c1 = "/i2c@12C70000"; - i2c2 = "/i2c@12C80000"; - i2c3 = "/i2c@12C90000"; - i2c4 = "/i2c@12CA0000"; - i2c104 = &i2c_104; - i2c5 = "/i2c@12CB0000"; - i2c6 = "/i2c@12CC0000"; - i2c7 = "/i2c@12CD0000"; - spi0 = "/spi@12d20000"; - spi1 = "/spi@12d30000"; - spi2 = "/spi@12d40000"; - spi3 = "/spi@131a0000"; - spi4 = "/spi@131b0000"; - mmc0 = "/mmc@12200000"; - mmc1 = "/mmc@12210000"; - mmc2 = "/mmc@12220000"; - mmc3 = "/mmc@12230000"; - serial0 = "/serial@12C30000"; - console = "/serial@12C30000"; - }; - - memory { - reg = <0x40000000 0x80000000>; - }; - - chosen { - bootargs = "console=tty1"; - stdout-path = "serial3:115200n8"; - }; - - iram { - reg = <0x02020000 0x60000>; - }; - - config { - samsung,bl1-offset = <0x1400>; - samsung,bl2-offset = <0x3400>; - u-boot-memory = "/memory"; - u-boot-offset = <0x3e00000 0x100000>; - }; - - flash { - reg = <0 0x100000>; - #address-cells = <1>; - #size-cells = <1>; - pre-boot { - label = "bl1 pre-boot"; - reg = <0 0x2000>; - read-only; - filename = "e5250.nbl1.bin"; - type = "blob exynos-bl1"; - required; - }; - - spl { - label = "bl2 spl"; - reg = <0x2000 0x4000>; - read-only; - filename = "bl2.bin"; - type = "blob exynos-bl2 boot,dtb"; - payload = "/flash/ro-boot"; - required; - }; - - ro-boot { - label = "u-boot"; - reg = <0x6000 0xb0000>; - read-only; - type = "blob boot,dtb"; - required; - }; - }; - - i2c-arbitrator { - compatible = "i2c-arb-gpio-challenge"; - #address-cells = <1>; - #size-cells = <0>; - - i2c-parent = <&{/i2c@12CA0000}>; - - our-claim-gpio = <&gpf0 3 GPIO_ACTIVE_LOW>; - their-claim-gpios = <&gpe0 4 GPIO_ACTIVE_LOW>; - slew-delay-us = <10>; - wait-retry-us = <3000>; - wait-free-us = <50000>; - - /* Use ID 104 as a hint that we're on physical bus 4 */ - i2c_104: i2c@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - battery: sbs-battery@b { - compatible = "sbs,sbs-battery"; - reg = <0xb>; - sbs,poll-retry-count = <1>; - }; - - cros_ec: embedded-controller { - compatible = "google,cros-ec-i2c"; - reg = <0x1e>; - interrupts = <6 IRQ_TYPE_NONE>; - interrupt-parent = <&gpx1>; - wakeup-source; - i2c-max-frequency = <100000>; - u-boot,i2c-offset-len = <0>; - ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>; - }; - - power-regulator { - compatible = "ti,tps65090"; - reg = <0x48>; - - regulators { - dcdc1 { - ti,enable-ext-control; - }; - dcdc2 { - ti,enable-ext-control; - }; - dcdc3 { - ti,enable-ext-control; - }; - fet1: fet1 { - regulator-name = "vcd_led"; - ti,overcurrent-wait = <3>; - }; - tps65090_fet2: fet2 { - regulator-name = "video_mid"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - fet3 { - regulator-name = "wwan_r"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - fet4 { - regulator-name = "sdcard"; - ti,overcurrent-wait = <3>; - }; - fet5 { - regulator-name = "camout"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - fet6: fet6 { - regulator-name = "lcd_vdd"; - ti,overcurrent-wait = <3>; - }; - tps65090_fet7: fet7 { - regulator-name = "video_mid_1a"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - ldo1 { - }; - ldo2 { - }; - }; - - charger { - compatible = "ti,tps65090-charger"; - }; - }; - }; - }; - - i2c@12CD0000 { - ptn3460: lvds-bridge@20 { - compatible = "nxp,ptn3460"; - reg = <0x20>; - sleep-gpios = <&gpy2 5 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpx1 5 GPIO_ACTIVE_LOW>; - hotplug-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>; - edid-emulation = <5>; - - ports { - port@0 { - bridge_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - - port@1 { - bridge_in: endpoint { - remote-endpoint = <&dp_out>; - }; - }; - }; - }; - - max98095: codec@11 { - compatible = "maxim,max98095"; - reg = <0x11>; - #sound-dai-cells = <1>; - }; - }; - - i2c@12C90000 { - clock-frequency = <100000>; - tpm@20 { - reg = <0x20>; - u-boot,i2c-offset-len = <0>; - compatible = "infineon,slb9635tt"; - }; - }; - - spi@12d30000 { - spi-max-frequency = <50000000>; - firmware_storage_spi: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 1000000 0>; - brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; - default-brightness-level = <7>; - enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>; - power-supply = <&fet1>; - }; - - panel: panel { - compatible = "auo,b116xw03"; - power-supply = <&fet6>; - backlight = <&backlight>; - - port { - panel_in: endpoint { - remote-endpoint = <&bridge_out>; - }; - }; - }; - - spi@131b0000 { - spi-max-frequency = <1000000>; - spi-deactivate-delay = <100>; - - /* Snow did support SPI but the released version used I2C */ - embedded-controller { - compatible = "google,cros-ec-i2c"; - reg = <0x1e>; - spi-max-frequency = <5000000>; - ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>; - optimise-flash-write; - status = "disabled"; - }; - }; + compatible = "google,snow-rev4", "google,snow", "samsung,exynos5250", + "samsung,exynos5"; + chassis-type = "laptop";
sound { compatible = "google,snow-audio-max98095";
samsung,model = "Snow-I2S-MAX98095"; samsung,audio-codec = <&max98095>; - codec-enable-gpio = <&gpx1 7 GPIO_ACTIVE_HIGH>;
cpu { sound-dai = <&i2s0 0>; };
codec { - sound-dai = <&max98095 0>; + sound-dai = <&max98095 0>, <&hdmi>; }; }; +};
- sound@12d60000 { - status = "disabled"; - }; - - i2c@12C60000 { - max77686@09 { - reg = <0x9>; - compatible = "maxim,max77686"; - }; - }; - - mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <0>; - }; - - mmc@12210000 { - status = "disabled"; - }; - - mmc@12220000 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; - samsung,removable = <1>; - }; - - mmc@12230000 { - status = "disabled"; - }; - - ehci@12110000 { - samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - xhci@12000000 { - samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>; - }; - - tmu@10060000 { - samsung,min-temp = <25>; - samsung,max-temp = <125>; - samsung,start-warning = <95>; - samsung,start-tripping = <105>; - samsung,hw-tripping = <110>; - samsung,efuse-min-value = <40>; - samsung,efuse-value = <55>; - samsung,efuse-max-value = <100>; - samsung,slope = <274761730>; - samsung,dc-value = <25>; - }; - - fimd@14400000 { - samsung,vl-freq = <60>; - samsung,vl-col = <1366>; - samsung,vl-row = <768>; - samsung,vl-width = <1366>; - samsung,vl-height = <768>; - - samsung,vl-clkp; - samsung,vl-dp; - samsung,vl-hsp; - samsung,vl-vsp; - - samsung,vl-bpix = <4>; - - samsung,vl-hspw = <32>; - samsung,vl-hbpd = <80>; - samsung,vl-hfpd = <48>; - samsung,vl-vspw = <5>; - samsung,vl-vbpd = <14>; - samsung,vl-vfpd = <3>; - samsung,vl-cmd-allow-len = <0xf>; - - samsung,winid = <0>; - samsung,interface-mode = <1>; - samsung,dp-enabled = <1>; - samsung,dual-lcd-enabled = <0>; - }; - - dp@145b0000 { - samsung,lt-status = <0>; - - samsung,master-mode = <0>; - samsung,bist-mode = <0>; - samsung,bist-pattern = <0>; - samsung,h-sync-polarity = <0>; - samsung,v-sync-polarity = <0>; - samsung,interlaced = <0>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>; - - ports { - port@0 { - dp_out: endpoint { - remote-endpoint = <&bridge_in>; - }; - }; - }; +&i2c_7 { + max98095: audio-codec@11 { + compatible = "maxim,max98095"; + reg = <0x11>; + pinctrl-names = "default"; + pinctrl-0 = <&max98095_en>; + clocks = <&pmu_system_controller 0>; + clock-names = "mclk"; + #sound-dai-cells = <1>; }; - };
-&i2c_0 { - status = "okay"; - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <378000>; - - max77686: max77686@09 { - compatible = "maxim,max77686"; - interrupt-parent = <&gpx3>; - interrupts = <2 IRQ_TYPE_NONE>; - wakeup-source; - reg = <0x09>; - #clock-cells = <1>; - - voltage-regulators { - ldo1_reg: LDO1 { - regulator-name = "P1.0V_LDO_OUT1"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo2_reg: LDO2 { - regulator-name = "P1.8V_LDO_OUT2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo3_reg: LDO3 { - regulator-name = "P1.8V_LDO_OUT3"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo7_reg: LDO7 { - regulator-name = "P1.1V_LDO_OUT7"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - ldo8_reg: LDO8 { - regulator-name = "P1.0V_LDO_OUT8"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo10_reg: LDO10 { - regulator-name = "P1.8V_LDO_OUT10"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo12_reg: LDO12 { - regulator-name = "P3.0V_LDO_OUT12"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-always-on; - }; - - ldo14_reg: LDO14 { - regulator-name = "P1.8V_LDO_OUT14"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo15_reg: LDO15 { - regulator-name = "P1.0V_LDO_OUT15"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - ldo16_reg: LDO16 { - regulator-name = "P1.8V_LDO_OUT16"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - ldo17_reg: LDO17 { - regulator-name = "vdd_mydp"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - }; - - buck1_reg: BUCK1 { - regulator-name = "vdd_mif"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - regulator-boot-on; - }; - - buck2_reg: BUCK2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - }; - - buck3_reg: BUCK3 { - regulator-name = "vdd_int"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - }; - - buck4_reg: BUCK4 { - regulator-name = "vdd_g3d"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - regulator-boot-on; - }; - - buck5_reg: BUCK5 { - regulator-name = "P1.8V_BUCK_OUT5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - buck6_reg: BUCK6 { - regulator-name = "P1.35V_BUCK_OUT6"; - regulator-min-microvolt = <1350000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - }; - - buck7_reg: BUCK7 { - regulator-name = "P2.0V_BUCK_OUT7"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-always-on; - }; - - buck8_reg: BUCK8 { - regulator-name = "P2.85V_BUCK_OUT8"; - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - regulator-always-on; - }; - }; +&pinctrl_0 { + max98095_en: max98095-en { + samsung,pins = "gpx1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; }; - -#include "cros-ec-keyboard.dtsi" diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts index 77e7a6b9e45a..e0feedcf54bb 100644 --- a/arch/arm/dts/exynos5250-spring.dts +++ b/arch/arm/dts/exynos5250-spring.dts @@ -7,6 +7,7 @@ */
/dts-v1/; +#include <dt-bindings/clock/samsung,s2mps11.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/input/input.h> @@ -15,221 +16,89 @@ / { model = "Google Spring"; compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5"; + chassis-type = "laptop";
- aliases { - i2c0 = "/i2c@12C60000"; - i2c1 = "/i2c@12C70000"; - i2c2 = "/i2c@12C80000"; - i2c3 = "/i2c@12C90000"; - i2c4 = "/i2c@12CA0000"; - i2c5 = "/i2c@12CB0000"; - i2c6 = "/i2c@12CC0000"; - i2c7 = "/i2c@12CD0000"; - i2c104 = &cros_ec_ldo_tunnel; - spi0 = "/spi@12d20000"; - spi1 = "/spi@12d30000"; - spi2 = "/spi@12d40000"; - spi3 = "/spi@131a0000"; - spi4 = "/spi@131b0000"; - mmc0 = "/mmc@12200000"; - serial0 = "/serial@12C30000"; - console = "/serial@12C30000"; - }; - - memory { + memory@40000000 { + device_type = "memory"; reg = <0x40000000 0x80000000>; };
- iram { - reg = <0x02020000 0x60000>; - }; - - config { - samsung,bl1-offset = <0x1400>; - samsung,bl2-offset = <0x3400>; - u-boot-memory = "/memory"; - u-boot-offset = <0x3e00000 0x100000>; - }; - - flash@0 { - reg = <0 0x100000>; - #address-cells = <1>; - #size-cells = <1>; - pre-boot { - label = "bl1 pre-boot"; - reg = <0 0x2000>; - read-only; - filename = "e5250.nbl1.bin"; - type = "blob exynos-bl1"; - required; - }; - - spl { - label = "bl2 spl"; - reg = <0x2000 0x8000>; - read-only; - filename = "bl2.bin"; - type = "blob exynos-bl2 boot,dtb"; - payload = "/flash/ro-boot"; - required; - }; - - ro-boot { - label = "u-boot"; - reg = <0xa000 0xb0000>; - read-only; - type = "blob boot,dtb"; - required; - }; - }; - chosen { bootargs = "console=tty1"; stdout-path = "serial3:115200n8"; };
- board-rev { - compatible = "google,board-revision"; - google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>, - <&gpy4 2 0>; - }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq>, <&lid_irq>;
- i2c@12C90000 { - clock-frequency = <100000>; - tpm@20 { - reg = <0x20>; - compatible = "infineon,slb9645tt"; + power { + label = "Power"; + gpios = <&gpx1 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + wakeup-source; }; - }; - - mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <0>; - };
- mmc@12210000 { - status = "disabled"; - }; - - mmc@12220000 { - /* MMC2 pins are used as GPIO for eDP bridge */ - status = "disabled"; - }; - - mmc@12230000 { - status = "disabled"; - }; - - ehci@12110000 { - samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - xhci@12000000 { - samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>; - }; - - sound { - compatible = "google,spring-audio-max98088"; - - samsung,model = "Spring-I2S-MAX98088"; - samsung,audio-codec = <&max98088>; - codec-enable-gpio = <&gpx1 7 0>; - - cpu { - sound-dai = <&i2s1 0>; - }; - - codec { - sound-dai = <&max98088 0>; + lid-switch { + label = "Lid"; + gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + wakeup-source; }; };
- spi@12d30000 { - spi-max-frequency = <50000000>; - firmware_storage_spi: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; + usb-hub { + compatible = "smsc,usb3503a"; + reset-gpios = <&gpe1 0 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hsic_reset>; };
- tmu@10060000 { - samsung,min-temp = <25>; - samsung,max-temp = <125>; - samsung,start-warning = <95>; - samsung,start-tripping = <105>; - samsung,hw-tripping = <110>; - samsung,efuse-min-value = <40>; - samsung,efuse-value = <55>; - samsung,efuse-max-value = <100>; - samsung,slope = <274761730>; - samsung,dc-value = <25>; + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; + clock-frequency = <24000000>; + }; }; +};
- fimd@14400000 { - samsung,vl-freq = <60>; - samsung,vl-col = <1366>; - samsung,vl-row = <768>; - samsung,vl-width = <1366>; - samsung,vl-height = <768>; - - samsung,vl-clkp; - samsung,vl-dp; - samsung,vl-hsp; - samsung,vl-vsp; - - samsung,vl-bpix = <4>; - - samsung,vl-hspw = <32>; - samsung,vl-hbpd = <80>; - samsung,vl-hfpd = <48>; - samsung,vl-vspw = <5>; - samsung,vl-vbpd = <14>; - samsung,vl-vfpd = <3>; - samsung,vl-cmd-allow-len = <0xf>; - - samsung,winid = <0>; - samsung,interface-mode = <1>; - samsung,dp-enabled = <1>; - samsung,dual-lcd-enabled = <0>; - }; +&cpu0 { + cpu0-supply = <&buck2_reg>; +};
- dp@145b0000 { - samsung,lt-status = <0>; - - samsung,master-mode = <0>; - samsung,bist-mode = <0>; - samsung,bist-pattern = <0>; - samsung,h-sync-polarity = <0>; - samsung,v-sync-polarity = <0>; - samsung,interlaced = <0>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - }; +&dp { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd_gpio>; + samsung,color-space = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <1>; + hpd-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>; +};
- backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 1000000 0>; - brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; - default-brightness-level = <1>; - enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>; - power-supply = <&fet1>; - }; +&ehci { + samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>; +};
- panel: panel { - compatible = "auo,b116xw03"; - power-supply = <&fet6>; - backlight = <&backlight>; +&fimd { + status = "okay"; + samsung,invert-vclk; +};
- port { - panel_in: endpoint { - remote-endpoint = <&bridge_out>; - }; - }; - }; +&hdmi { + status = "okay"; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; + hdmi-en-supply = <&ldo8_reg>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; };
&i2c_0 { @@ -237,19 +106,22 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <378000>;
- s5m8767-pmic@66 { + pmic@66 { compatible = "samsung,s5m8767-pmic"; reg = <0x66>; interrupt-parent = <&gpx3>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>; wakeup-source;
s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */ - <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */ - <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */ + <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */ + <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */ - <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */ - <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */ + <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */ + <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
/* * The following arrays of DVS voltages are not used, since we are @@ -257,26 +129,26 @@ * to please the driver. */ s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>, - <1250000>, <1200000>, - <1150000>, <1100000>, - <1000000>, <950000>; + <1250000>, <1200000>, + <1150000>, <1100000>, + <1000000>, <950000>;
s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>, - <1100000>, <1100000>, - <1000000>, <1000000>, - <1000000>, <1000000>; + <1100000>, <1100000>, + <1000000>, <1000000>, + <1000000>, <1000000>;
s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>, - <1200000>, <1200000>, - <1200000>, <1200000>, - <1200000>, <1200000>; + <1200000>, <1200000>, + <1200000>, <1200000>, + <1200000>, <1200000>;
- clocks { + s5m8767_osc: clocks { compatible = "samsung,s5m8767-clk"; #clock-cells = <1>; clock-output-names = "en32khz_ap", - "en32khz_cp", - "en32khz_bt"; + "en32khz_cp", + "en32khz_bt"; };
regulators { @@ -289,17 +161,17 @@ };
ldo5_reg: LDO5 { - regulator-name = "P1.8V_LDO_OUT5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-name = "P1.0V_LDO_OUT5"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; regulator-always-on; op_mode = <0>; };
ldo6_reg: LDO6 { regulator-name = "vdd_mydp"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; regulator-always-on; op_mode = <3>; }; @@ -377,9 +249,9 @@ };
ldo17_reg: LDO17 { - regulator-name = "P1.2V_LDO_OUT17"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; + regulator-name = "P2.8V_LDO_OUT17"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; regulator-always-on; op_mode = <0>; }; @@ -438,8 +310,8 @@
buck6_reg: BUCK6 { regulator-name = "P1.2V_BUCK_OUT6"; - regulator-min-microvolt = <2050000>; - regulator-max-microvolt = <2050000>; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; regulator-always-on; regulator-boot-on; op_mode = <0>; @@ -457,33 +329,39 @@ }; };
-&dp { +&i2c_1 { status = "okay"; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - samsung,link-rate = <0x0a>; - samsung,lane-count = <1>; - samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>;
- ports { - port@0 { - dp_out: endpoint { - remote-endpoint = <&bridge_in>; - }; - }; + trackpad@4b { + compatible = "atmel,maxtouch"; + reg = <0x4b>; + interrupt-parent = <&gpx1>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&trackpad_irq>; + linux,gpio-keymap = <KEY_RESERVED + KEY_RESERVED + KEY_RESERVED + KEY_RESERVED + KEY_RESERVED + BTN_LEFT>; + wakeup-source; }; };
-&i2c_1 { - status = "okay"; - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <378000>; +/* + * Disabled pullups since external part has its own pullups and + * double-pulling gets us out of spec in some cases. + */ +&i2c2_bus { + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; };
&i2c_2 { status = "okay"; + /* used by HDMI DDC */ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; }; @@ -498,73 +376,15 @@ status = "okay"; samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; - clock-frequency = <66000>;
- cros_ec: embedded-controller { + cros_ec: embedded-controller@1e { compatible = "google,cros-ec-i2c"; reg = <0x1e>; interrupts = <6 IRQ_TYPE_NONE>; interrupt-parent = <&gpx1>; wakeup-source; - u-boot,i2c-offset-len = <0>; - ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>; - cros_ec_ldo_tunnel: cros-ec-ldo-tunnel { - compatible = "google,cros-ec-ldo-tunnel"; - #address-cells = <1>; - #size-cells = <0>; - power-regulator { - compatible = "ti,tps65090"; - reg = <0x48>; - - regulators { - dcdc1 { - ti,enable-ext-control; - }; - dcdc2 { - ti,enable-ext-control; - }; - dcdc3 { - ti,enable-ext-control; - }; - fet1: fet1 { - regulator-name = "vcd_led"; - ti,overcurrent-wait = <3>; - }; - tps65090_fet2: fet2 { - regulator-name = "video_mid"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - fet3 { - regulator-name = "wwan_r"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - fet4 { - regulator-name = "sdcard"; - ti,overcurrent-wait = <3>; - }; - fet5 { - regulator-name = "camout"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - fet6: fet6 { - regulator-name = "lcd_vdd"; - ti,overcurrent-wait = <3>; - }; - tps65090_fet7: fet7 { - regulator-name = "video_mid_1a"; - regulator-always-on; - ti,overcurrent-wait = <3>; - }; - ldo1 { - }; - ldo2 { - }; - }; - }; - }; + pinctrl-names = "default"; + pinctrl-0 = <&ec_irq>; }; };
@@ -579,123 +399,158 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>;
- ps8622-bridge@8 { - compatible = "parade,ps8622"; - reg = <0x8>; - sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>; - hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>; - power-supply = <&ldo6_reg>; - parade,regs = /bits/ 8 < - 0x02 0xa1 0x01 /* HPD low */ - /* - * SW setting: [1:0] SW output 1.2V voltage is - * lower to 96% - */ - 0x04 0x14 0x01 - /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */ - 0x04 0xe3 0x20 - 0x04 0xe2 0x80 /* [7] RCO SS enable */ - /* - * RPHY Setting: [3:2] CDR tune wait cycle before - * measure for fine tune b00: 1us, - * 01: 0.5us, 10:2us, 11:4us - */ - 0x04 0x8a 0x0c - 0x04 0x89 0x08 /* [3] RFD always on */ - /* - * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times - */ - 0x04 0x71 0x2d - /* 2.7G CDR settings */ - 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */ - 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */ - 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */ - /* - * 1.62G CDR settings: - * [5:2]NOF=64LSB [1:0]DCO scale is 2/5 - */ - 0x04 0xc0 0x12 - 0x04 0xc1 0x92 /* Gitune=-37% */ - 0x04 0xc2 0x1c /* Fbstep=100% */ - 0x04 0x32 0x80 /* [7] LOS signal disable */ - /* RPIO Setting */ - /* [7:4] LVDS driver bias current 75% (250mV swing) */ - 0x04 0x00 0xb0 - /* [7:6] Right-bar GPIO output strength is 8mA */ - 0x04 0x15 0x40 - /* EQ Training State Machine Setting */ - 0x04 0x54 0x10 /* RCO calibration start */ - /* [4:0] MAX_LANE_COUNT set to one lane */ - 0x01 0x02 0x81 - /* [4:0] LANE_COUNT_SET set to one lane */ - 0x01 0x21 0x81 - 0x00 0x52 0x20 - 0x00 0xf1 0x03 /* HPD CP toggle enable */ - 0x00 0x62 0x41 - /* Counter number add 1ms counter delay */ - 0x00 0xf6 0x01 - /* - * [6]PWM function control by DPCD0040f[7], default - * is PWM block always works - */ - 0x00 0x77 0x06 - 0x00 0x4c 0x04 - /* - * 04h Adjust VTotal tolerance to fix the 30Hz no- - * display issue - * DPCD00400='h00 Parade OUI = 'h001cf8 - */ - 0x01 0xc0 0x00 - 0x01 0xc1 0x1c /* DPCD00401='h1c */ - 0x01 0xc2 0xf8 /* DPCD00402='hf8 */ - /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */ - 0x01 0xc3 0x44 - 0x01 0xc4 0x32 /* DPCD404 */ - 0x01 0xc5 0x53 /* DPCD405 */ - 0x01 0xc6 0x4c /* DPCD406 */ - 0x01 0xc7 0x56 /* DPCD407 */ - 0x01 0xc8 0x35 /* DPCD408 */ - /* DPCD40A Initial Code major revision '01' */ - 0x01 0xca 0x01 - /* DPCD40B Initial Code minor revision '05' */ - 0x01 0xcb 0x05 - 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */ - /* - * 0xff for 100% PWM of brightness, 0h for 0% brightness - */ - 0x01 0xa7 0x00 - /* - * Set LVDS output as 6bit-VESA mapping, single LVDS - * channel - */ - 0x01 0xcc 0x13 - 0x02 0xb1 0x20 /* Enable SSC set by register */ - /* Set SSC enabled and +/-1% central spreading */ - 0x04 0x10 0x16 - 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */ - 0x04 0x54 0x14 /* LC -> RCO */ - 0x02 0xa1 0x91>; /* HPD high */ - ports { - port@0 { - bridge_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; + temperature-sensor@4c { + compatible = "gmt,g781"; + reg = <0x4c>; + }; +};
- port@1 { - bridge_in: endpoint { - remote-endpoint = <&dp_out>; - }; - }; - }; +&i2c_8 { + status = "okay"; + /* used by HDMI PHY */ + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <378000>; +}; + +&i2s0 { + status = "okay"; +}; + +&mixer { + status = "okay"; +}; + +&mmc_0 { + status = "okay"; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>; + bus-width = <8>; + cap-mmc-highspeed; +}; + +/* + * On Spring we've got SIP WiFi and so can keep drive strengths low to + * reduce EMI. + */ +&mmc_1 { + status = "okay"; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>; + bus-width = <4>; + cap-sd-highspeed; +}; + +&pinctrl_0 { + s5m8767_dvs: s5m8767-dvs { + samsung,pins = "gpd1-0", "gpd1-1", "gpd1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + dp_hpd_gpio: dp-hpd { + samsung,pins = "gpc3-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + trackpad_irq: trackpad-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + power_key_irq: power-key-irq { + samsung,pins = "gpx1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + ec_irq: ec-irq { + samsung,pins = "gpx1-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + s5m8767_ds: s5m8767-ds { + samsung,pins = "gpx2-3", "gpx2-4", "gpx2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + s5m8767_irq: s5m8767-irq { + samsung,pins = "gpx3-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; + + lid_irq: lid-irq { + samsung,pins = "gpx3-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; };
- max98088: soundcodec@10 { - reg = <0x10>; - compatible = "maxim,max98088"; - #sound-dai-cells = <1>; + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; }; };
+&pinctrl_1 { + hsic_reset: hsic-reset { + samsung,pins = "gpe1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + }; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&sd1_bus4 { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&sd1_cd { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&sd1_clk { + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&sd1_cmd { + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; +}; + +&spi_1 { + status = "okay"; + samsung,spi-src-clk = <0>; + num-cs = <1>; +}; + #include "cros-ec-keyboard.dtsi" diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi index 66c5b6dca95e..139778928b93 100644 --- a/arch/arm/dts/exynos5250.dtsi +++ b/arch/arm/dts/exynos5250.dtsi @@ -1,130 +1,1242 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * (C) Copyright 2012 SAMSUNG Electronics - * SAMSUNG EXYNOS5250 SoC device tree source + * Samsung Exynos5250 SoC device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung Exynos5250 SoC device nodes are listed in this file. + * Exynos5250 based board files can include this file and provide + * values for board specfic bindings. + * + * Note: This file does not include device nodes for all the controllers in + * Exynos5250 SoC. As device tree coverage for Exynos5250 increases, + * additional nodes can be added to this file. */
+#include <dt-bindings/clock/exynos5250.h> #include "exynos5.dtsi" -#include "exynos5250-pinctrl.dtsi" -#include "exynos5250-pinctrl-uboot.dtsi" +#include "exynos4-cpu-thermal.dtsi" +#include <dt-bindings/clock/exynos-audss-clk.h>
/ { + compatible = "samsung,exynos5250", "samsung,exynos5"; + aliases { + spi0 = &spi_0; + spi1 = &spi_1; + spi2 = &spi_2; + gsc0 = &gsc_0; + gsc1 = &gsc_1; + gsc2 = &gsc_2; + gsc3 = &gsc_3; + mshc0 = &mmc_0; + mshc1 = &mmc_1; + mshc2 = &mmc_2; + mshc3 = &mmc_3; + i2c4 = &i2c_4; + i2c5 = &i2c_5; + i2c6 = &i2c_6; + i2c7 = &i2c_7; + i2c8 = &i2c_8; + i2c9 = &i2c_9; pinctrl0 = &pinctrl_0; pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; pinctrl3 = &pinctrl_3; };
- pinctrl_0: pinctrl@11400000 { - compatible = "samsung,exynos5250-pinctrl"; - reg = <0x11400000 0x1000>; - interrupts = <0 46 0>; + cpus { + #address-cells = <1>; + #size-cells = <0>;
- wakup_eint: wakeup-interrupt-controller { - compatible = "samsung,exynos4210-wakeup-eint"; - interrupt-parent = <&gic>; - interrupts = <0 32 0>; + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; }; - };
- pinctrl_1: pinctrl@13400000 { - compatible = "samsung,exynos5250-pinctrl"; - reg = <0x13400000 0x1000>; - interrupts = <0 45 0>; + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + }; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clocks = <&clock CLK_ARM_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + }; };
- pinctrl_2: pinctrl@10d10000 { - compatible = "samsung,exynos5250-pinctrl"; - reg = <0x10d10000 0x1000>; - interrupts = <0 50 0>; - }; + cpu0_opp_table: opp-table0 { + compatible = "operating-points-v2"; + opp-shared;
- pinctrl_3: pinctrl@03860000 { - compatible = "samsung,exynos5250-pinctrl"; - reg = <0x03860000 0x1000>; - interrupts = <0 47 0>; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <925000>; + clock-latency-ns = <140000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <937500>; + clock-latency-ns = <140000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <950000>; + clock-latency-ns = <140000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <975000>; + clock-latency-ns = <140000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <140000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <1012500>; + clock-latency-ns = <140000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1025000>; + clock-latency-ns = <140000>; + }; + opp-900000000 { + opp-hz = /bits/ 64 <900000000>; + opp-microvolt = <1050000>; + clock-latency-ns = <140000>; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1075000>; + clock-latency-ns = <140000>; + opp-suspend; + }; + opp-1100000000 { + opp-hz = /bits/ 64 <1100000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <140000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1125000>; + clock-latency-ns = <140000>; + }; + opp-1300000000 { + opp-hz = /bits/ 64 <1300000000>; + opp-microvolt = <1150000>; + clock-latency-ns = <140000>; + }; + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <1200000>; + clock-latency-ns = <140000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1225000>; + clock-latency-ns = <140000>; + }; + opp-1600000000 { + opp-hz = /bits/ 64 <1600000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <140000>; + }; + opp-1700000000 { + opp-hz = /bits/ 64 <1700000000>; + opp-microvolt = <1300000>; + clock-latency-ns = <140000>; + }; };
- i2c_4: i2c@12CA0000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12CA0000 0x100>; - interrupts = <0 60 0>; - #address-cells = <1>; - #size-cells = <0>; + pmu { + compatible = "arm,cortex-a15-pmu"; + interrupt-parent = <&combiner>; + interrupts = <1 2>, <22 4>; };
- i2c_5: i2c@12CB0000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12CB0000 0x100>; - interrupts = <0 61 0>; - #address-cells = <1>; - #size-cells = <0>; - }; + soc: soc { + sram@2020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x30000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x30000>;
- i2c_6: i2c@12CC0000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12CC0000 0x100>; - interrupts = <0 62 0>; - #address-cells = <1>; - #size-cells = <0>; - }; + smp-sram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + };
- i2c_7: i2c@12CD0000 { - compatible = "samsung,s3c2440-i2c"; - reg = <0x12CD0000 0x100>; - interrupts = <0 63 0>; - #address-cells = <1>; - #size-cells = <0>; - }; + smp-sram@2f000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x2f000 0x1000>; + }; + };
- i2s0: i2s@3830000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x03830000 0x100>; - samsung,idma-addr = <0x03000000>; - #clock-cells = <1>; - #sound-dai-cells = <1>; - samsung,i2s-epll-clock-frequency = <192000000>; - samsung,i2s-sampling-rate = <48000>; - samsung,i2s-bits-per-sample = <16>; - samsung,i2s-channels = <2>; - samsung,i2s-lr-clk-framesize = <256>; - samsung,i2s-bit-clk-framesize = <32>; - samsung,i2s-id = <0>; - }; + pd_gsc: power-domain@10044000 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044000 0x20>; + #power-domain-cells = <0>; + label = "GSC"; + };
- i2s1: i2s@12d60000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x12d60000 0x20>; - #clock-cells = <1>; - #sound-dai-cells = <1>; - samsung,i2s-epll-clock-frequency = <192000000>; - samsung,i2s-sampling-rate = <48000>; - samsung,i2s-bits-per-sample = <16>; - samsung,i2s-channels = <2>; - samsung,i2s-lr-clk-framesize = <256>; - samsung,i2s-bit-clk-framesize = <32>; - samsung,i2s-id = <1>; - }; + pd_mfc: power-domain@10044040 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044040 0x20>; + #power-domain-cells = <0>; + label = "MFC"; + };
+ pd_g3d: power-domain@10044060 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044060 0x20>; + #power-domain-cells = <0>; + label = "G3D"; + };
- xhci@12000000 { - compatible = "samsung,exynos5250-xhci"; - reg = <0x12000000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; + pd_disp1: power-domain@100440a0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440A0 0x20>; + #power-domain-cells = <0>; + label = "DISP1"; + }; + + pd_mau: power-domain@100440c0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440C0 0x20>; + #power-domain-cells = <0>; + label = "MAU"; + }; + + clock: clock-controller@10010000 { + compatible = "samsung,exynos5250-clock"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; + + clock_audss: audss-clock-controller@3810000 { + compatible = "samsung,exynos5250-audss-clock"; + reg = <0x03810000 0x0C>; + #clock-cells = <1>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, + <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>; + clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; + power-domains = <&pd_mau>; + }; + + timer@101c0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101C0000 0x800>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; + clock-names = "fin_pll", "mct"; + interrupts-extended = <&combiner 23 3>, + <&combiner 23 4>, + <&combiner 25 2>, + <&combiner 25 3>, + <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_0: pinctrl@11400000 { + compatible = "samsung,exynos5250-pinctrl"; + reg = <0x11400000 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + + wakup_eint: wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + pinctrl_1: pinctrl@13400000 { + compatible = "samsung,exynos5250-pinctrl"; + reg = <0x13400000 0x1000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_2: pinctrl@10d10000 { + compatible = "samsung,exynos5250-pinctrl"; + reg = <0x10d10000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_3: pinctrl@3860000 { + compatible = "samsung,exynos5250-pinctrl"; + reg = <0x03860000 0x1000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_mau>; + }; + + pmu_system_controller: system-controller@10040000 { + compatible = "samsung,exynos5250-pmu", "syscon"; + reg = <0x10040000 0x5000>; + clock-names = "clkout16"; + clocks = <&clock CLK_FIN_PLL>; + #clock-cells = <1>; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + }; + + watchdog@101d0000 { + compatible = "samsung,exynos5250-wdt"; + reg = <0x101D0000 0x100>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_WDT>; + clock-names = "watchdog"; + samsung,syscon-phandle = <&pmu_system_controller>; + }; + + mfc: codec@11000000 { + compatible = "samsung,mfc-v6"; + reg = <0x11000000 0x10000>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_mfc>; + clocks = <&clock CLK_MFC>; + clock-names = "mfc"; + iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>; + iommu-names = "left", "right"; + }; + + rotator: rotator@11c00000 { + compatible = "samsung,exynos5250-rotator"; + reg = <0x11C00000 0x64>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_ROTATOR>; + clock-names = "rotator"; + iommus = <&sysmmu_rotator>; + }; + + mali: gpu@11800000 { + compatible = "samsung,exynos5250-mali", "arm,mali-t604"; + reg = <0x11800000 0x5000>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&clock CLK_G3D>; + clock-names = "core"; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&pd_g3d>; + status = "disabled"; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <925000>; + }; + opp-160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp-266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp-350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp-450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp-533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + }; + }; + + tmu: tmu@10060000 { + compatible = "samsung,exynos5250-tmu"; + reg = <0x10060000 0x100>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_TMU>; + clock-names = "tmu_apbif"; + #thermal-sensor-cells = <0>; + }; + + sata: sata@122f0000 { + compatible = "snps,dwc-ahci"; + reg = <0x122F0000 0x1ff>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; + clock-names = "sata", "sclk_sata"; + phys = <&sata_phy>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + status = "disabled"; + }; + + sata_phy: sata-phy@12170000 { + compatible = "samsung,exynos5250-sata-phy"; + reg = <0x12170000 0x1ff>; + clocks = <&clock CLK_SATA_PHYCTRL>; + clock-names = "sata_phyctrl"; + #phy-cells = <0>; + samsung,syscon-phandle = <&pmu_system_controller>; + status = "disabled"; + }; + + /* i2c_0-3 are defined in exynos5.dtsi */ + i2c_4: i2c@12ca0000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CA0000 0x100>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_I2C4>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_bus>; + status = "disabled"; + }; + + i2c_5: i2c@12cb0000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CB0000 0x100>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_I2C5>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_bus>; + status = "disabled"; + }; + + i2c_6: i2c@12cc0000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CC0000 0x100>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_I2C6>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_bus>; + status = "disabled"; + }; + + i2c_7: i2c@12cd0000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x12CD0000 0x100>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_I2C7>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_bus>; + status = "disabled"; + }; + + i2c_8: i2c@12ce0000 { + compatible = "samsung,s3c2440-hdmiphy-i2c"; + reg = <0x12CE0000 0x1000>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_I2C_HDMI>; + clock-names = "i2c"; + status = "disabled"; + + hdmiphy: hdmiphy@38 { + compatible = "samsung,exynos4212-hdmiphy"; + reg = <0x38>; + }; + }; + + i2c_9: i2c@121d0000 { + compatible = "samsung,exynos5-sata-phy-i2c"; + reg = <0x121D0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_SATA_PHYI2C>; + clock-names = "i2c"; + status = "disabled"; + + sata_phy_i2c: sata-phy-i2c@38 { + compatible = "samsung,exynos-sataphy-i2c"; + reg = <0x38>; + status = "disabled"; + }; + }; + + spi_0: spi@12d20000 { + compatible = "samsung,exynos4210-spi"; + status = "disabled"; + reg = <0x12d20000 0x100>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma0 5 + &pdma0 4>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; + clock-names = "spi", "spi_busclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus>; + }; + + spi_1: spi@12d30000 { + compatible = "samsung,exynos4210-spi"; + status = "disabled"; + reg = <0x12d30000 0x100>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 5 + &pdma1 4>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; + clock-names = "spi", "spi_busclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + }; + + spi_2: spi@12d40000 { + compatible = "samsung,exynos4210-spi"; + status = "disabled"; + reg = <0x12d40000 0x100>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma0 7 + &pdma0 6>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; + clock-names = "spi", "spi_busclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_bus>; + }; + + mmc_0: mmc@12200000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12200000 0x1000>; + clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; + clock-names = "biu", "ciu"; + fifo-depth = <0x80>; + status = "disabled"; + }; + + mmc_1: mmc@12210000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12210000 0x1000>; + clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; + clock-names = "biu", "ciu"; + fifo-depth = <0x80>; + status = "disabled"; + }; + + mmc_2: mmc@12220000 { + compatible = "samsung,exynos5250-dw-mshc"; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12220000 0x1000>; + clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; + clock-names = "biu", "ciu"; + fifo-depth = <0x80>; + status = "disabled"; + }; + + mmc_3: mmc@12230000 { + compatible = "samsung,exynos5250-dw-mshc"; + reg = <0x12230000 0x1000>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; + clock-names = "biu", "ciu"; + fifo-depth = <0x80>; + status = "disabled"; + }; + + i2s0: i2s@3830000 { + compatible = "samsung,s5pv210-i2s"; + status = "disabled"; + reg = <0x03830000 0x100>; + dmas = <&pdma0 10>, + <&pdma0 9>, + <&pdma0 8>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_SCLK_I2S>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + power-domains = <&pd_mau>; + #clock-cells = <1>; + #sound-dai-cells = <1>; + }; + + i2s1: i2s@12d60000 { + compatible = "samsung,s3c6410-i2s"; + status = "disabled"; + reg = <0x12D60000 0x100>; + dmas = <&pdma1 12>, + <&pdma1 11>; + dma-names = "tx", "rx"; + clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>; + clock-names = "iis", "i2s_opclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_bus>; + power-domains = <&pd_mau>; + #sound-dai-cells = <1>; + };
- phy { - compatible = "samsung,exynos5250-usb3-phy"; + i2s2: i2s@12d70000 { + compatible = "samsung,s3c6410-i2s"; + status = "disabled"; + reg = <0x12D70000 0x100>; + dmas = <&pdma0 12>, + <&pdma0 11>; + dma-names = "tx", "rx"; + clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>; + clock-names = "iis", "i2s_opclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s2_bus>; + power-domains = <&pd_mau>; + #sound-dai-cells = <1>; + }; + + usb_dwc3 { + compatible = "samsung,exynos5250-dwusb3"; + clocks = <&clock CLK_USB3>; + clock-names = "usbdrd30"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbdrd_dwc3: usb@12000000 { + compatible = "snps,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>; + phy-names = "usb2-phy", "usb3-phy"; + }; + }; + + usbdrd_phy: phy@12100000 { + compatible = "samsung,exynos5250-usbdrd-phy"; reg = <0x12100000 0x100>; + clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <1>; + }; + + ehci: usb@12110000 { + compatible = "samsung,exynos4210-ehci"; + reg = <0x12110000 0x100>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&clock CLK_USB2>; + clock-names = "usbhost"; + phys = <&usb2_phy_gen 1>; + phy-names = "host"; + }; + + ohci: usb@12120000 { + compatible = "samsung,exynos4210-ohci"; + reg = <0x12120000 0x100>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&clock CLK_USB2>; + clock-names = "usbhost"; + phys = <&usb2_phy_gen 1>; + phy-names = "host"; + }; + + usb2_phy_gen: phy@12130000 { + compatible = "samsung,exynos5250-usb2-phy"; + reg = <0x12130000 0x100>; + clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>; + clock-names = "phy", "ref"; + #phy-cells = <1>; + samsung,sysreg-phandle = <&sysreg_system_controller>; + samsung,pmureg-phandle = <&pmu_system_controller>; + }; + + pdma0: pdma@121a0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x121A0000 0x1000>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_PDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + pdma1: pdma@121b0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x121B0000 0x1000>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_PDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + mdma0: mdma@10800000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x10800000 0x1000>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + }; + + mdma1: mdma@11c10000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x11C10000 0x1000>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + }; + + gsc_0: gsc@13e00000 { + compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc"; + reg = <0x13e00000 0x1000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL0>; + clock-names = "gscl"; + iommus = <&sysmmu_gsc0>; + }; + + gsc_1: gsc@13e10000 { + compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc"; + reg = <0x13e10000 0x1000>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL1>; + clock-names = "gscl"; + iommus = <&sysmmu_gsc1>; + }; + + gsc_2: gsc@13e20000 { + compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc"; + reg = <0x13e20000 0x1000>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL2>; + clock-names = "gscl"; + iommus = <&sysmmu_gsc2>; + }; + + gsc_3: gsc@13e30000 { + compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc"; + reg = <0x13e30000 0x1000>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&pd_gsc>; + clocks = <&clock CLK_GSCL3>; + clock-names = "gscl"; + iommus = <&sysmmu_gsc3>; + }; + + hdmi: hdmi@14530000 { + compatible = "samsung,exynos4212-hdmi"; + reg = <0x14530000 0x70000>; + power-domains = <&pd_disp1>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, + <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, + <&clock CLK_MOUT_HDMI>; + clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", + "sclk_hdmiphy", "mout_hdmi"; + samsung,syscon-phandle = <&pmu_system_controller>; + phy = <&hdmiphy>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + hdmicec: cec@101b0000 { + compatible = "samsung,s5p-cec"; + reg = <0x101B0000 0x200>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_HDMI_CEC>; + clock-names = "hdmicec"; + samsung,syscon-phandle = <&pmu_system_controller>; + hdmi-phandle = <&hdmi>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "disabled"; + }; + + mixer: mixer@14450000 { + compatible = "samsung,exynos5250-mixer"; + reg = <0x14450000 0x10000>; + power-domains = <&pd_disp1>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>; + clock-names = "mixer", "hdmi", "sclk_hdmi"; + iommus = <&sysmmu_tv>; + status = "disabled"; + }; + + dp_phy: video-phy { + compatible = "samsung,exynos5250-dp-video-phy"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + }; + + mipi_phy: video-phy@10040710 { + compatible = "samsung,s5pv210-mipi-video-phy"; + reg = <0x10040710 0x100>; + #phy-cells = <1>; + syscon = <&pmu_system_controller>; + }; + + dsi_0: dsi@14500000 { + compatible = "samsung,exynos4210-mipi-dsi"; + reg = <0x14500000 0x10000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + samsung,power-domain = <&pd_disp1>; + phys = <&mipi_phy 3>; + phy-names = "dsim"; + clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI1>; + clock-names = "bus_clk", "sclk_mipi"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + adc: adc@12d10000 { + compatible = "samsung,exynos-adc-v1"; + reg = <0x12D10000 0x100>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_ADC>; + clock-names = "adc"; + #io-channel-cells = <1>; + samsung,syscon-phandle = <&pmu_system_controller>; + status = "disabled"; + }; + + sysmmu_g2d: sysmmu@10a60000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x10A60000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <24 5>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_2D>, <&clock CLK_G2D>; + #iommu-cells = <0>; + }; + + sysmmu_mfc_r: sysmmu@11200000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11200000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <6 2>; + power-domains = <&pd_mfc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>; + #iommu-cells = <0>; + }; + + sysmmu_mfc_l: sysmmu@11210000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11210000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <8 5>; + power-domains = <&pd_mfc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>; + #iommu-cells = <0>; + }; + + sysmmu_rotator: sysmmu@11d40000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11D40000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 0>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>; + #iommu-cells = <0>; + }; + + sysmmu_jpeg: sysmmu@11f20000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11F20000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 2>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_isp: sysmmu@13260000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13260000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <10 6>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_ISP>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_drc: sysmmu@13270000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13270000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <11 6>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_DRC>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_fd: sysmmu@132a0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x132A0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 0>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_FD>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_scc: sysmmu@13280000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13280000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 2>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_SCC>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_scp: sysmmu@13290000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13290000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <3 6>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_SCP>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_mcuctl: sysmmu@132b0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x132B0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 4>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_MCU>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_odc: sysmmu@132c0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x132C0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <11 0>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_ODC>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_dis0: sysmmu@132d0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x132D0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <10 4>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_DIS0>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_dis1: sysmmu@132e0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x132E0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <9 4>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_DIS1>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_3dnr: sysmmu@132f0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x132F0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 6>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC_3DNR>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_lite0: sysmmu@13c40000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C40000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <3 4>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_FIMC_LITE0>, <&clock CLK_CAMIF_TOP>; + #iommu-cells = <0>; + }; + + sysmmu_fimc_lite1: sysmmu@13c50000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13C50000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <24 1>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_FIMC_LITE1>, <&clock CLK_CAMIF_TOP>; + #iommu-cells = <0>; + }; + + sysmmu_gsc0: sysmmu@13e80000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13E80000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <2 0>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>; + #iommu-cells = <0>; + }; + + sysmmu_gsc1: sysmmu@13e90000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13E90000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <2 2>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>; + #iommu-cells = <0>; + }; + + sysmmu_gsc2: sysmmu@13ea0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13EA0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <2 4>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_GSCL2>, <&clock CLK_GSCL2>; + #iommu-cells = <0>; + }; + + sysmmu_gsc3: sysmmu@13eb0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13EB0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <2 6>; + power-domains = <&pd_gsc>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_GSCL3>, <&clock CLK_GSCL3>; + #iommu-cells = <0>; + }; + + sysmmu_fimd1: sysmmu@14640000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x14640000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <3 2>; + power-domains = <&pd_disp1>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>; + #iommu-cells = <0>; + }; + + sysmmu_tv: sysmmu@14650000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x14650000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <7 4>; + power-domains = <&pd_disp1>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>; + #iommu-cells = <0>; }; };
- pwm: pwm@12dd0000 { - compatible = "samsung,exynos4210-pwm"; - reg = <0x12dd0000 0x100>; - samsung,pwm-outputs = <0>, <1>, <2>, <3>; - #pwm-cells = <3>; + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + /* + * Unfortunately we need this since some versions + * of U-Boot on Exynos don't set the CNTFRQ register, + * so we need the value from DT. + */ + clock-frequency = <24000000>; }; +}; + +&cpu_thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&tmu 0>; + + cooling-maps { + map0 { + /* Corresponds to 800MHz at freq_table */ + cooling-device = <&cpu0 9 9>, <&cpu1 9 9>; + }; + map1 { + /* Corresponds to 200MHz at freq_table */ + cooling-device = <&cpu0 15 15>, + <&cpu1 15 15>; + }; + }; +}; + +&dp { + power-domains = <&pd_disp1>; + clocks = <&clock CLK_DP>; + clock-names = "dp"; + phys = <&dp_phy>; + phy-names = "dp"; +};
+&fimd { + power-domains = <&pd_disp1>; + clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; + clock-names = "sclk_fimd", "fimd"; + iommus = <&sysmmu_fimd1>; }; + +&g2d { + iommus = <&sysmmu_g2d>; + clocks = <&clock CLK_G2D>; + clock-names = "fimg2d"; + status = "okay"; +}; + +&i2c_0 { + clocks = <&clock CLK_I2C0>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_bus>; +}; + +&i2c_1 { + clocks = <&clock CLK_I2C1>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_bus>; +}; + +&i2c_2 { + clocks = <&clock CLK_I2C2>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_bus>; +}; + +&i2c_3 { + clocks = <&clock CLK_I2C3>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_bus>; +}; + +&prng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + +&pwm { + clocks = <&clock CLK_PWM>; + clock-names = "timers"; +}; + +&rtc { + clocks = <&clock CLK_RTC>; + clock-names = "rtc"; + interrupt-parent = <&pmu_system_controller>; + status = "disabled"; +}; + +&serial_0 { + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 13>, <&pdma0 14>; + dma-names = "rx", "tx"; +}; + +&serial_1 { + clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma1 15>, <&pdma1 16>; + dma-names = "rx", "tx"; +}; + +&serial_2 { + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 15>, <&pdma0 16>; + dma-names = "rx", "tx"; +}; + +&serial_3 { + clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma1 17>, <&pdma1 18>; + dma-names = "rx", "tx"; +}; + +&sss { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + +&trng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + +#include "exynos5250-pinctrl.dtsi" +#include "exynos-syscon-restart.dtsi" diff --git a/arch/arm/dts/exynos5420-cpus.dtsi b/arch/arm/dts/exynos5420-cpus.dtsi new file mode 100644 index 000000000000..e9f4eb75b50f --- /dev/null +++ b/arch/arm/dts/exynos5420-cpus.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos5420 SoC cpu device tree source + * + * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This file provides desired ordering for Exynos5420 and Exynos5800 + * boards: CPU[0123] being the A15. + * + * The Exynos5420, 5422 and 5800 actually share the same CPU configuration + * but particular boards choose different booting order. + * + * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422 + * booting cluster (big or LITTLE) is chosen by IROM code by reading + * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting + * from the LITTLE: Cortex-A7. + */ + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x2>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x3>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + }; + + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + }; + }; +}; + +&arm_a7_pmu { + interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + status = "okay"; +}; + +&arm_a15_pmu { + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + status = "okay"; +}; diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts index a68c3b517460..315b3dc9c017 100644 --- a/arch/arm/dts/exynos5420-peach-pit.dts +++ b/arch/arm/dts/exynos5420-peach-pit.dts @@ -1,33 +1,35 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * SAMSUNG/GOOGLE Peach-Pit board device tree source + * Google Peach Pit Rev 6+ board device tree source * - * Copyright (c) 2013 Samsung Electronics Co., Ltd. - * http://www.samsung.com + * Copyright (c) 2014 Google, Inc */
/dts-v1/; -#include "exynos54xx.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/maxim,max77802.h> #include <dt-bindings/regulator/maxim,max77802.h> +#include <dt-bindings/sound/samsung-i2s.h> +#include "exynos5420.dtsi" +#include "exynos5420-cpus.dtsi"
/ { - model = "Samsung/Google Peach Pit board based on Exynos5420"; + model = "Google Peach Pit Rev 6+";
- compatible = "google,pit-rev#", "google,pit", - "google,peach", "samsung,exynos5420", "samsung,exynos5"; - - config { - google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; - hwid = "PIT TEST A-A 7848"; - lazy-init = <1>; - }; + compatible = "google,pit-rev16", + "google,pit-rev15", "google,pit-rev14", + "google,pit-rev13", "google,pit-rev12", + "google,pit-rev11", "google,pit-rev10", + "google,pit-rev9", "google,pit-rev8", + "google,pit-rev7", "google,pit-rev6", + "google,pit", "google,peach","samsung,exynos5420", + "samsung,exynos5";
aliases { - serial0 = "/serial@12C30000"; - console = "/serial@12C30000"; - pmic = "/i2c@12CA0000"; - i2c104 = &i2c_tunnel; + /* Assign 20 so we don't get confused w/ builtin ones */ + i2c20 = &i2c_tunnel; };
backlight: backlight { @@ -36,41 +38,54 @@ brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; default-brightness-level = <7>; power-supply = <&tps65090_fet1>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; + }; + + chosen { + stdout-path = "serial3:115200n8"; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; };
- dmc { - mem-manuf = "samsung"; - mem-type = "ddr3"; - clock-frequency = <800000000>; - arm-frequency = <900000000>; - }; - - tmu@10060000 { - samsung,min-temp = <25>; - samsung,max-temp = <125>; - samsung,start-warning = <95>; - samsung,start-tripping = <105>; - samsung,hw-tripping = <110>; - samsung,efuse-min-value = <40>; - samsung,efuse-value = <55>; - samsung,efuse-max-value = <100>; - samsung,slope = <274761730>; - samsung,dc-value = <25>; - }; - - /* MAX77802 is on i2c bus 4 */ - i2c@12CA0000 { - clock-frequency = <400000>; - power-regulator@9 { - compatible = "maxim,max77802-pmic"; - reg = <0x9>; + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq &lid_irq>; + + power { + label = "Power"; + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + wakeup-source; + }; + + lid-switch { + label = "Lid"; + gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + wakeup-source; }; };
+ memory@20000000 { + device_type = "memory"; + reg = <0x20000000 0x80000000>; + }; + sound { - compatible = "google,peach-audio-max98090"; + compatible = "google,snow-audio-max98090";
- samsung,model = "PEACH-I2S-MAX98090"; + samsung,model = "Peach-Pit-I2S-MAX98090"; + samsung,i2s-controller = <&i2s0>; samsung,audio-codec = <&max98090>;
cpu { @@ -78,168 +93,37 @@ };
codec { - sound-dai = <&max98090 0>; + sound-dai = <&max98090>, <&hdmi>; }; };
- i2c@12CD0000 { /* i2c7 */ - clock-frequency = <100000>; - max98090: soundcodec@10 { - reg = <0x10>; - compatible = "maxim,max98090"; - #sound-dai-cells = <1>; - }; - - edp-lvds-bridge@48 { - compatible = "parade,ps8625"; - reg = <0x48>; - sleep-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpy7 7 GPIO_ACTIVE_LOW>; - parade,regs = /bits/ 8 < - 0x02 0xa1 0x01 /* HPD low */ - /* - * SW setting - * [1:0] SW output 1.2V voltage is lower to 96% - */ - 0x04 0x14 0x01 - /* - * RCO SS setting - * [5:4] = b01 0.5%, b10 1%, b11 1.5% - */ - 0x04 0xe3 0x20 - 0x04 0xe2 0x80 /* [7] RCO SS enable */ - /* - * RPHY Setting - * [3:2] CDR tune wait cycle before - * measure for fine tune b00: 1us, - * 01: 0.5us, 10:2us, 11:4us. - */ - 0x04 0x8a 0x0c - 0x04 0x89 0x08 /* [3] RFD always on */ - /* - * CTN lock in/out: - * 20000ppm/80000ppm. Lock out 2 - * times. - */ - 0x04 0x71 0x2d - /* - * 2.7G CDR settings - * NOF=40LSB for HBR CDR setting - */ - 0x04 0x7d 0x07 - 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */ - 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */ - /* - * 1.62G CDR settings - * [5:2]NOF=64LSB [1:0]DCO scale is 2/5 - */ - 0x04 0xc0 0x12 - 0x04 0xc1 0x92 /* Gitune=-37% */ - 0x04 0xc2 0x1c /* Fbstep=100% */ - 0x04 0x32 0x80 /* [7]LOS signal disable */ - /* - * RPIO Setting - * [7:4] LVDS driver bias current : - * 75% (250mV swing) - */ - 0x04 0x00 0xb0 - /* - * [7:6] Right-bar GPIO output strength is 8mA - */ - 0x04 0x15 0x40 - /* EQ Training State Machine Setting */ - 0x04 0x54 0x10 /* RCO calibration start */ - /* [4:0] MAX_LANE_COUNT set to one lane */ - 0x01 0x02 0x81 - /* [4:0] LANE_COUNT_SET set to one lane */ - 0x01 0x21 0x81 - 0x00 0x52 0x20 - 0x00 0xf1 0x03 /* HPD CP toggle enable */ - 0x00 0x62 0x41 - /* Counter number add 1ms counter delay */ - 0x00 0xf6 0x01 - /* - * [6]PWM function control by - * DPCD0040f[7], default is PWM - * block always works. - */ - 0x00 0x77 0x06 - /* - * 04h Adjust VTotal tolerance to - * fix the 30Hz no display issue - */ - 0x00 0x4c 0x04 - /* DPCD00400='h00, Parade OUI = 'h001cf8 */ - 0x01 0xc0 0x00 - 0x01 0xc1 0x1c /* DPCD00401='h1c */ - 0x01 0xc2 0xf8 /* DPCD00402='hf8 */ - /* - * DPCD403~408 = ASCII code - * D2SLV5='h4432534c5635 - */ - 0x01 0xc3 0x44 - 0x01 0xc4 0x32 /* DPCD404 */ - 0x01 0xc5 0x53 /* DPCD405 */ - 0x01 0xc6 0x4c /* DPCD406 */ - 0x01 0xc7 0x56 /* DPCD407 */ - 0x01 0xc8 0x35 /* DPCD408 */ - /* - * DPCD40A, Initial Code major revision - * '01' - */ - 0x01 0xca 0x01 - /* DPCD40B Initial Code minor revision '05' */ - 0x01 0xcb 0x05 - /* DPCD720 Select internal PWM */ - 0x01 0xa5 0xa0 - /* - * FFh for 100% PWM of brightness, 0h for 0% - * brightness - */ - 0x01 0xa7 0xff - /* - * Set LVDS output as 6bit-VESA mapping, - * single LVDS channel - */ - 0x01 0xcc 0x13 - /* Enable SSC set by register */ - 0x02 0xb1 0x20 - /* - * Set SSC enabled and +/-1% central - * spreading - */ - 0x04 0x10 0x16 - /* MPU Clock source: LC => RCO */ - 0x04 0x59 0x60 - 0x04 0x54 0x14 /* LC -> RCO */ - 0x02 0xa1 0x91>; /* HPD high */ - - ports { - port@0 { - bridge_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - - port@1 { - bridge_in: endpoint { - remote-endpoint = <&dp_out>; - }; - }; - }; - }; + usb300_vbus_reg: regulator-usb300 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gph0 0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb300_vbus_en>; + enable-active-high; };
- sound@3830000 { - samsung,codec-type = "max98090"; - }; + usb301_vbus_reg: regulator-usb301 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gph0 1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb301_vbus_en>; + enable-active-high; + };
- i2c@12E10000 { /* i2c9 */ - clock-frequency = <400000>; - tpm@20 { - compatible = "infineon,slb9645tt"; - reg = <0x20>; - }; + vbat: fixed-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbat-supply"; + regulator-boot-on; + regulator-always-on; };
panel: panel { @@ -254,69 +138,44 @@ }; };
- spi@12d30000 { /* spi1 */ - spi-max-frequency = <50000000>; - firmware_storage_spi: flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - - /* - * A region for the kernel to store a panic event - * which the firmware will add to the log. - */ - elog-panic-event-offset = <0x01e00000 0x100000>; - - elog-shrink-size = <0x400>; - elog-full-threshold = <0xc00>; - }; - }; - - xhci@12000000 { - samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>; - }; - - xhci@12400000 { - samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>; + mmc1_pwrseq: mmc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpx0 0 GPIO_ACTIVE_LOW>; /* WIFI_EN */ + clocks = <&max77802 MAX77802_CLK_32K_CP>; + clock-names = "ext_clock"; }; +};
- fimd@14400000 { - samsung,vl-freq = <60>; - samsung,vl-col = <1366>; - samsung,vl-row = <768>; - samsung,vl-width = <1366>; - samsung,vl-height = <768>; +&adc { + status = "okay"; + vdd-supply = <&ldo9_reg>; +};
- samsung,vl-clkp; - samsung,vl-dp; - samsung,vl-bpix = <4>; +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-parents = <&clock CLK_MAU_EPLL>; +};
- samsung,vl-hspw = <32>; - samsung,vl-hbpd = <40>; - samsung,vl-hfpd = <40>; - samsung,vl-vspw = <6>; - samsung,vl-vbpd = <10>; - samsung,vl-vfpd = <12>; - samsung,vl-cmd-allow-len = <0xf>; +&cpu0 { + cpu-supply = <&buck2_reg>; +};
- samsung,winid = <3>; - samsung,interface-mode = <1>; - samsung,dp-enabled = <1>; - samsung,dual-lcd-enabled = <0>; - }; +&cpu4 { + cpu-supply = <&buck6_reg>; };
&dp { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd_gpio>; samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; samsung,color-depth = <1>; samsung,link-rate = <0x06>; samsung,lane-count = <2>; - samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>; + hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
ports { - port@0 { + port { dp_out: endpoint { remote-endpoint = <&bridge_in>; }; @@ -324,33 +183,792 @@ }; };
+&fimd { + status = "okay"; + samsung,invert-vclk; +}; + +&hdmi { + status = "okay"; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; + + hdmi-en-supply = <&tps65090_fet7>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; +}; + +&hsi2c_4 { + status = "okay"; + clock-frequency = <400000>; + + max77802: pmic@9 { + compatible = "maxim,max77802"; + interrupt-parent = <&gpx3>; + interrupts = <1 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&max77802_irq>, <&pmic_selb>, + <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>; + wakeup-source; + reg = <0x9>; + #clock-cells = <1>; + + inb1-supply = <&tps65090_dcdc2>; + inb2-supply = <&tps65090_dcdc1>; + inb3-supply = <&tps65090_dcdc2>; + inb4-supply = <&tps65090_dcdc2>; + inb5-supply = <&tps65090_dcdc1>; + inb6-supply = <&tps65090_dcdc2>; + inb7-supply = <&tps65090_dcdc1>; + inb8-supply = <&tps65090_dcdc1>; + inb9-supply = <&tps65090_dcdc1>; + inb10-supply = <&tps65090_dcdc1>; + + inl1-supply = <&buck5_reg>; + inl2-supply = <&buck7_reg>; + inl3-supply = <&buck9_reg>; + inl4-supply = <&buck9_reg>; + inl5-supply = <&buck9_reg>; + inl6-supply = <&tps65090_dcdc2>; + inl7-supply = <&buck9_reg>; + inl9-supply = <&tps65090_dcdc2>; + inl10-supply = <&buck7_reg>; + + regulators { + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1v35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_emmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2v"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo1_reg: LDO1 { + regulator-name = "vdd_1v0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo2_reg: LDO2 { + regulator-name = "vdd_1v2_2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo3_reg: LDO3 { + regulator-name = "vdd_1v8_3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + vqmmc_sdcard: ldo4_reg: LDO4 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_1v8_5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_1v8_6"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_1v8_7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo12_reg: LDO12 { + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo13_reg: LDO13 { + regulator-name = "vdd_ldo13"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo14_reg: LDO14 { + regulator-name = "vdd_ldo14"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo17_reg: LDO17 { + regulator-name = "vdd_g3ds"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo18_reg: LDO18 { + regulator-name = "ldo_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo19_reg: LDO19 { + regulator-name = "ldo_19"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo20_reg: LDO20 { + regulator-name = "ldo_20"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "ldo_21"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo23_reg: LDO23 { + regulator-name = "ldo_23"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + ldo24_reg: LDO24 { + regulator-name = "ldo_24"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo25_reg: LDO25 { + regulator-name = "ldo_25"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo26_reg: LDO26 { + regulator-name = "ldo_26"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo27_reg: LDO27 { + regulator-name = "ldo_27"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo28_reg: LDO28 { + regulator-name = "ldo_28"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo29_reg: LDO29 { + regulator-name = "ldo_29"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo30_reg: LDO30 { + regulator-name = "vdd_mifs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo32_reg: LDO32 { + regulator-name = "ldo_32"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo33_reg: LDO33 { + regulator-name = "ldo_33"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo34_reg: LDO34 { + regulator-name = "ldo_34"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo35_reg: LDO35 { + regulator-name = "ldo_35"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + }; + }; +}; + +&hsi2c_7 { + status = "okay"; + clock-frequency = <400000>; + + max98090: audio-codec@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupts = <2 IRQ_TYPE_NONE>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98090_irq>; + clocks = <&pmu_system_controller 0>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; + + light-sensor@44 { + compatible = "isil,isl29018"; + reg = <0x44>; + vcc-supply = <&tps65090_fet5>; + }; + + ps8625: lvds-bridge@48 { + compatible = "parade,ps8625"; + reg = <0x48>; + sleep-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpy7 7 GPIO_ACTIVE_HIGH>; + lane-count = <2>; + use-external-pwm; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + + port@1 { + reg = <1>; + + bridge_in: endpoint { + remote-endpoint = <&dp_out>; + }; + }; + }; + + }; +}; + +&hsi2c_8 { + status = "okay"; + clock-frequency = <333000>; + + /* Atmel mXT336S */ + trackpad@4b { + compatible = "atmel,maxtouch"; + reg = <0x4b>; + interrupt-parent = <&gpx1>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + wakeup-source; + pinctrl-names = "default"; + pinctrl-0 = <&trackpad_irq>; + linux,gpio-keymap = <KEY_RESERVED + KEY_RESERVED + KEY_RESERVED /* GPIO0 */ + KEY_RESERVED /* GPIO1 */ + KEY_RESERVED /* GPIO2 */ + BTN_LEFT>; /* GPIO3 */ + }; +}; + +&hsi2c_9 { + status = "okay"; + clock-frequency = <400000>; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + + /* Unused irq; but still need to configure the pins */ + pinctrl-names = "default"; + pinctrl-0 = <&tpm_irq>; + }; +}; + +&i2c_2 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + samsung,i2c-slave-addr = <0x50>; +}; + +&i2s0 { + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>; + assigned-clock-parents = <&clock_audss EXYNOS_I2S_BUS>; + status = "okay"; +}; + +&mixer { + status = "okay"; +}; + +/* eMMC flash */ +&mmc_0 { + status = "okay"; + mmc-hs200-1_8v; + cap-mmc-highspeed; + non-removable; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-hs400-timing = <0 2>; + samsung,read-strobe-delay = <90>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>; + bus-width = <8>; +}; + +/* WiFi SDIO module */ +&mmc_1 { + status = "okay"; + non-removable; + cap-sdio-irq; + keep-power-in-suspend; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <1>; + samsung,dw-mshc-sdr-timing = <0 1>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_int>, <&sd1_bus1>, + <&sd1_bus4>, <&sd1_bus8>, <&wifi_en>; + bus-width = <4>; + cap-sd-highspeed; + mmc-pwrseq = <&mmc1_pwrseq>; + vqmmc-supply = <&buck10_reg>; +}; + +/* uSD card */ +&mmc_2 { + status = "okay"; + cap-sd-highspeed; + card-detect-delay = <200>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + bus-width = <4>; +}; + + +&pinctrl_0 { + pinctrl-names = "default"; + pinctrl-0 = <&mask_tpm_reset>; + + wifi_en: wifi-en { + samsung,pins = "gpx0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + max98090_irq: max98090-irq { + samsung,pins = "gpx0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* We need GPX0_6 to be low at sleep time; just keep it low always */ + mask_tpm_reset: mask-tpm-reset { + samsung,pins = "gpx0-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + samsung,pin-val = <0>; + }; + + tpm_irq: tpm-irq { + samsung,pins = "gpx1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + trackpad_irq: trackpad-irq { + samsung,pins = "gpx1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + power_key_irq: power-key-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + ec_irq: ec-irq { + samsung,pins = "gpx1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + tps65090_irq: tps65090-irq { + samsung,pins = "gpx2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + dp_hpd_gpio: dp_hpd_gpio { + samsung,pins = "gpx2-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + max77802_irq: max77802-irq { + samsung,pins = "gpx3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + lid_irq: lid-irq { + samsung,pins = "gpx3-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pmic_dvs_1: pmic-dvs-1 { + samsung,pins = "gpy7-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_1 { + /* Adjust WiFi drive strengths lower for EMI */ + sd1_clk: sd1-clk { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_cmd: sd1-cmd { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_bus8: sd1-bus-width8 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; +}; + +&pinctrl_2 { + pmic_dvs_2: pmic-dvs-2 { + samsung,pins = "gpj4-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pmic_dvs_3: pmic-dvs-3 { + samsung,pins = "gpj4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_3 { + /* Drive SPI lines at x2 for better integrity */ + spi2-bus { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + /* Drive SPI chip select at x2 for better integrity */ + ec_spi_cs: ec-spi-cs { + samsung,pins = "gpb1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gph0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gph0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pmic_selb: pmic-selb { + samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5", + "gph0-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pmu_system_controller { + assigned-clocks = <&pmu_system_controller 0>; + assigned-clock-parents = <&clock CLK_FIN_PLL>; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>; + clock-names = "rtc", "rtc_src"; +}; + &spi_2 { - spi-max-frequency = <3125000>; - spi-deactivate-delay = <200>; status = "okay"; num-cs = <1>; samsung,spi-src-clk = <0>; - cs-gpios = <&gpb1 2 0>; + cs-gpios = <&gpb1 2 GPIO_ACTIVE_HIGH>;
cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; interrupt-parent = <&gpx1>; - interrupts = <5 0>; + interrupts = <5 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&ec_spi_cs &ec_irq>; reg = <0>; - spi-half-duplex; - spi-max-timeout-ms = <1100>; - ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>; - #address-cells = <1>; - #size-cells = <1>; - - /* - * This describes the flash memory within the EC. Note - * that the STM32L flash erases to 0, not 0xff. - */ - flash@8000000 { - reg = <0x08000000 0x20000>; - erase-value = <0>; - }; + spi-max-frequency = <3125000>; + google,has-vbc-nvram;
controller-data { samsung,spi-feedback-delay = <1>; @@ -373,6 +991,26 @@ compatible = "ti,tps65090"; reg = <0x48>;
+ /* + * Config irq to disable internal pulls + * even though we run in polling mode. + */ + pinctrl-names = "default"; + pinctrl-0 = <&tps65090_irq>; + + vsys1-supply = <&vbat>; + vsys2-supply = <&vbat>; + vsys3-supply = <&vbat>; + infet1-supply = <&vbat>; + infet2-supply = <&tps65090_dcdc1>; + infet3-supply = <&tps65090_dcdc2>; + infet4-supply = <&tps65090_dcdc2>; + infet5-supply = <&tps65090_dcdc2>; + infet6-supply = <&tps65090_dcdc2>; + infet7-supply = <&tps65090_dcdc1>; + vsys-l1-supply = <&vbat>; + vsys-l2-supply = <&vbat>; + regulators { tps65090_dcdc1: dcdc1 { ti,enable-ext-control; @@ -423,4 +1061,58 @@ }; };
+&serial_3 { + status = "okay"; +}; + +&timer { + arm,cpu-registers-not-fw-configured; +}; + +&tmu_cpu0 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_gpu { + vtmu-supply = <&ldo10_reg>; +}; + +&usbdrd_dwc3_0 { + dr_mode = "host"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; +}; + +&usbdrd_phy0 { + vbus-supply = <&usb300_vbus_reg>; +}; + +&usbdrd_phy1 { + vbus-supply = <&usb301_vbus_reg>; +}; + +/* + * Use longest HW watchdog in SoC (32 seconds) since the hardware + * watchdog provides no debugging information (compared to soft/hard + * lockup detectors) and so should be last resort. + */ +&watchdog { + timeout-sec = <32>; +}; + #include "cros-ec-keyboard.dtsi" +#include "cros-adc-thermistors.dtsi" diff --git a/arch/arm/dts/exynos5420-pinctrl.dtsi b/arch/arm/dts/exynos5420-pinctrl.dtsi new file mode 100644 index 000000000000..b82af7c89654 --- /dev/null +++ b/arch/arm/dts/exynos5420-pinctrl.dtsi @@ -0,0 +1,734 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device + * tree nodes are listed in this file. + */ + +#include <dt-bindings/pinctrl/samsung.h> + +&pinctrl_0 { + gpy7: gpy7 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <23 0>, <24 0>, <25 0>, <25 1>, + <26 0>, <26 1>, <27 0>, <27 1>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <28 0>, <28 1>, <29 0>, <29 1>, + <30 0>, <30 1>, <31 0>, <31 1>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + dp_hpd: dp_hpd { + samsung,pins = "gpx0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + hdmi_cec: hdmi-cec { + samsung,pins = "gpx3-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_1 { + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc4: gpc4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + }; + + sd0_clk: sd0-clk { + samsung,pins = "gpc0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd0_cmd: sd0-cmd { + samsung,pins = "gpc0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd0_cd: sd0-cd { + samsung,pins = "gpc0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd0_bus1: sd0-bus-width1 { + samsung,pins = "gpc0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd0_bus4: sd0-bus-width4 { + samsung,pins = "gpc0-4", "gpc0-5", "gpc0-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd0_bus8: sd0-bus-width8 { + samsung,pins = "gpc3-0", "gpc3-1", "gpc3-2", "gpc3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd0_rclk: sd0-rclk { + samsung,pins = "gpc0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd1_clk: sd1-clk { + samsung,pins = "gpc1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd1_cmd: sd1-cmd { + samsung,pins = "gpc1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd1_cd: sd1-cd { + samsung,pins = "gpc1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd1_int: sd1-int { + samsung,pins = "gpd1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pins = "gpc1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pins = "gpc1-4", "gpc1-5", "gpc1-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd1_bus8: sd1-bus-width8 { + samsung,pins = "gpd1-4", "gpd1-5", "gpd1-6", "gpd1-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd2_clk: sd2-clk { + samsung,pins = "gpc2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd2_cmd: sd2-cmd { + samsung,pins = "gpc2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd2_cd: sd2-cd { + samsung,pins = "gpc2-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd2_bus1: sd2-bus-width1 { + samsung,pins = "gpc2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd2_bus4: sd2-bus-width4 { + samsung,pins = "gpc2-4", "gpc2-5", "gpc2-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; + + sd2_wp: sd2-wp { + samsung,pins = "gpc4-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>; + }; +}; + +&pinctrl_2 { + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj4: gpj4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + cam_gpio_a: cam-gpio-a { + samsung,pins = "gpe0-0", "gpe0-1", "gpe0-2", "gpe0-3", + "gpe0-4", "gpe0-5", "gpe0-6", "gpe0-7", + "gpe1-0", "gpe1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_gpio_b: cam-gpio-b { + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3", + "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_i2c2_bus: cam-i2c2-bus { + samsung,pins = "gpf0-4", "gpf0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_spi1_bus: cam-spi1-bus { + samsung,pins = "gpe0-4", "gpe0-5", "gpf0-2", "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_i2c1_bus: cam-i2c1-bus { + samsung,pins = "gpf0-2", "gpf0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_i2c0_bus: cam-i2c0-bus { + samsung,pins = "gpf0-0", "gpf0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_spi0_bus: cam-spi0-bus { + samsung,pins = "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + cam_bayrgb_bus: cam-bayrgb-bus { + samsung,pins = "gpg0-0", "gpg0-1", "gpg0-2", "gpg0-3", + "gpg0-4", "gpg0-5", "gpg0-6", "gpg0-7", + "gpg1-0", "gpg1-1", "gpg1-2", "gpg1-3", + "gpg1-4", "gpg1-5", "gpg1-6", "gpg1-7", + "gpg2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_3 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb4: gpb4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph0: gph0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + uart0_data: uart0-data { + samsung,pins = "gpa0-0", "gpa0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + uart0_fctl: uart0-fctl { + samsung,pins = "gpa0-2", "gpa0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + uart1_data: uart1-data { + samsung,pins = "gpa0-4", "gpa0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + uart1_fctl: uart1-fctl { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c2_bus: i2c2-bus { + samsung,pins = "gpa0-6", "gpa0-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + uart2_data: uart2-data { + samsung,pins = "gpa1-0", "gpa1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + uart2_fctl: uart2-fctl { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c3_bus: i2c3-bus { + samsung,pins = "gpa1-2", "gpa1-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + uart3_data: uart3-data { + samsung,pins = "gpa1-4", "gpa1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi0_bus: spi0-bus { + samsung,pins = "gpa2-0", "gpa2-1", "gpa2-2", "gpa2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi1_bus: spi1-bus { + samsung,pins = "gpa2-4", "gpa2-6", "gpa2-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c4_hs_bus: i2c4-hs-bus { + samsung,pins = "gpa2-0", "gpa2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c5_hs_bus: i2c5-hs-bus { + samsung,pins = "gpa2-2", "gpa2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2s1_bus: i2s1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pcm1_bus: pcm1-bus { + samsung,pins = "gpb0-0", "gpb0-1", "gpb0-2", "gpb0-3", + "gpb0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2s2_bus: i2s2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", + "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pcm2_bus: pcm2-bus { + samsung,pins = "gpb1-0", "gpb1-1", "gpb1-2", "gpb1-3", + "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spdif_bus: spdif-bus { + samsung,pins = "gpb1-0", "gpb1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + spi2_bus: spi2-bus { + samsung,pins = "gpb1-1", "gpb1-3", "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_5>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c6_hs_bus: i2c6-hs-bus { + samsung,pins = "gpb1-3", "gpb1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_4>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pwm0_out: pwm0-out { + samsung,pins = "gpb2-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pwm1_out: pwm1-out { + samsung,pins = "gpb2-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pwm2_out: pwm2-out { + samsung,pins = "gpb2-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pwm3_out: pwm3-out { + samsung,pins = "gpb2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c7_hs_bus: i2c7-hs-bus { + samsung,pins = "gpb2-2", "gpb2-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_3>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c0_bus: i2c0-bus { + samsung,pins = "gpb3-0", "gpb3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c1_bus: i2c1-bus { + samsung,pins = "gpb3-2", "gpb3-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c8_hs_bus: i2c8-hs-bus { + samsung,pins = "gpb3-4", "gpb3-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c9_hs_bus: i2c9-hs-bus { + samsung,pins = "gpb3-6", "gpb3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + i2c10_hs_bus: i2c10-hs-bus { + samsung,pins = "gpb4-0", "gpb4-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_4 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + i2s0_bus: i2s0-bus { + samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3", + "gpz-4", "gpz-5", "gpz-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_2>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; diff --git a/arch/arm/dts/exynos5420-smdk5420.dts b/arch/arm/dts/exynos5420-smdk5420.dts index 7a5da674fbed..a4f0e3ffedbd 100644 --- a/arch/arm/dts/exynos5420-smdk5420.dts +++ b/arch/arm/dts/exynos5420-smdk5420.dts @@ -1,164 +1,416 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * SAMSUNG SMDK5420 board device tree source + * Samsung SMDK5420 board device tree source * * Copyright (c) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com */
/dts-v1/; -#include "exynos54xx.dtsi" +#include "exynos5420.dtsi" +#include "exynos5420-cpus.dtsi" +#include <dt-bindings/clock/samsung,s2mps11.h> +#include <dt-bindings/gpio/gpio.h>
/ { - model = "SAMSUNG SMDK5420 board based on EXYNOS5420"; - compatible = "samsung,smdk5420", "samsung,exynos5"; + model = "Samsung SMDK5420 board based on Exynos5420"; + compatible = "samsung,smdk5420", "samsung,exynos5420", "samsung,exynos5";
- config { - hwid = "smdk5420 TEST A-A 9382"; + memory@20000000 { + device_type = "memory"; + reg = <0x20000000 0x80000000>; };
- aliases { - serial0 = "/serial@12C30000"; - console = "/serial@12C30000"; + chosen { + bootargs = "init=/linuxrc"; + stdout-path = "serial2:115200n8"; };
- tmu@10060000 { - samsung,min-temp = <25>; - samsung,max-temp = <125>; - samsung,start-warning = <95>; - samsung,start-tripping = <105>; - samsung,hw-tripping = <110>; - samsung,efuse-min-value = <40>; - samsung,efuse-value = <55>; - samsung,efuse-max-value = <100>; - samsung,slope = <274761730>; - samsung,dc-value = <25>; + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; };
- /* s2mps11 is on i2c bus 4 */ - i2c@12CA0000 { - #address-cells = <1>; - #size-cells = <0>; - pmic@66 { - reg = <0x66>; - compatible = "samsung,s2mps11-pmic"; - }; + vdd: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "vdd-supply"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; };
- spi@12d20000 { /* spi0 */ - spi-max-frequency = <50000000>; - firmware_storage_spi: flash@0 { - reg = <0>; - }; + dbvdd: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "dbvdd-supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + spkvdd: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "spkvdd-supply"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; };
- fimd@14400000 { - samsung,vl-freq = <60>; - samsung,vl-col = <2560>; - samsung,vl-row = <1600>; - samsung,vl-width = <2560>; - samsung,vl-height = <1600>; - - samsung,vl-clkp; - samsung,vl-dp; - samsung,vl-bpix = <4>; - - samsung,vl-hspw = <32>; - samsung,vl-hbpd = <80>; - samsung,vl-hfpd = <48>; - samsung,vl-vspw = <6>; - samsung,vl-vbpd = <37>; - samsung,vl-vfpd = <3>; - samsung,vl-cmd-allow-len = <0xf>; - - samsung,winid = <3>; - samsung,interface-mode = <1>; - samsung,dp-enabled = <1>; - samsung,dual-lcd-enabled = <0>; + usb300_vbus_reg: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "VBUS0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpg0 5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb300_vbus_en>; + enable-active-high; };
- sound@3830000 { - samsung,codec-type = "wm8994"; + usb301_vbus_reg: regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "VBUS1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpg1 4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb301_vbus_en>; + enable-active-high; };
- i2c@12C70000 { - wm8994: soundcodec@1a { - reg = <0x1a>; - u-boot,i2c-offset-len = <2>; - compatible = "wolfson,wm8994"; - #sound-dai-cells = <1>; +}; + +&cpu0 { + cpu-supply = <&buck2_reg>; +}; + +&cpu4 { + cpu-supply = <&buck6_reg>; +}; + +&dp { + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd>; + samsung,color-space = <0>; + samsung,color-depth = <1>; + samsung,link-rate = <0x0a>; + samsung,lane-count = <4>; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: timing { + clock-frequency = <50000>; + hactive = <2560>; + vactive = <1600>; + hfront-porch = <48>; + hback-porch = <80>; + hsync-len = <32>; + vback-porch = <16>; + vfront-porch = <8>; + vsync-len = <6>; }; }; +};
- sound { - compatible = "samsung,smdk5420-audio-wm8994"; +&fimd { + status = "okay"; +};
- samsung,model = "Snow-I2S-MAX98095"; - samsung,audio-codec = <&wm8994>; +&hdmi { + status = "okay"; + ddc = <&i2c_2>; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; +};
- cpu { - sound-dai = <&i2s0 0>; +&hsi2c_4 { + status = "okay"; + + pmic@66 { + compatible = "samsung,s2mps11-pmic"; + reg = <0x66>; + wakeup-source; + + s2mps11_osc: clocks { + compatible = "samsung,s2mps11-clk"; + #clock-cells = <1>; + clock-output-names = "s2mps11_ap", + "s2mps11_cp", "s2mps11_bt"; };
- codec { - sound-dai = <&wm8994 0>; + regulators { + ldo1_reg: LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "vdd_ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_ldo6"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_ldo7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "vdd_ldo13"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "vdd_ldo16"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "tsp_avdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo19_reg: LDO19 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo24_reg: LDO24 { + regulator-name = "tsp_io"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_mem"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1.0v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_1.8v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2.8v_ldo"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3750000>; + regulator-always-on; + regulator-boot-on; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_vmem"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + }; }; }; +};
- mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <0>; - samsung,pre-init; - }; +&i2c_2 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + /* used by HDMI DDC */ + status = "okay"; +};
- mmc@12210000 { - status = "disabled"; - }; +&mixer { + status = "okay"; +};
- mmc@12220000 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; - samsung,removable = <1>; - }; +&mmc_0 { + status = "okay"; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-hs400-timing = <0 2>; + samsung,read-strobe-delay = <90>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 + &sd0_rclk>; + bus-width = <8>; + cap-mmc-highspeed; +};
- mmc@12230000 { - status = "disabled"; - }; +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + bus-width = <4>; + cap-sd-highspeed; +};
- fimd@14400000 { - /* sysmmu is not used in U-Boot */ - samsung,disable-sysmmu; +&pinctrl_0 { + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; +};
- dp@145b0000 { - samsung,lt-status = <0>; - - samsung,master-mode = <0>; - samsung,bist-mode = <0>; - samsung,bist-pattern = <0>; - samsung,h-sync-polarity = <0>; - samsung,v-sync-polarity = <0>; - samsung,interlaced = <0>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; +&pinctrl_2 { + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gpg0-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; };
- dmc { - mem-type = "ddr3"; + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gpg1-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; }; +};
- xhci1: xhci@12400000 { - compatible = "samsung,exynos5250-xhci"; - reg = <0x12400000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +};
- phy { - compatible = "samsung,exynos5250-usb3-phy"; - reg = <0x12500000 0x100>; - }; - }; +&usbdrd_phy0 { + vbus-supply = <&usb300_vbus_reg>; +}; + +&usbdrd_phy1 { + vbus-supply = <&usb301_vbus_reg>; }; diff --git a/arch/arm/dts/exynos5420-trip-points.dtsi b/arch/arm/dts/exynos5420-trip-points.dtsi new file mode 100644 index 000000000000..a67a380717ec --- /dev/null +++ b/arch/arm/dts/exynos5420-trip-points.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device tree sources for default Exynos5420 thermal zone definition + * + * Copyright (c) 2014 Lukasz Majewski l.majewski@samsung.com + */ + +polling-delay-passive = <0>; +polling-delay = <0>; +trips { + cpu-alert-0 { + temperature = <85000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu-alert-1 { + temperature = <103000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu-alert-2 { + temperature = <110000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "active"; + }; + cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; +}; diff --git a/arch/arm/dts/exynos5420.dtsi b/arch/arm/dts/exynos5420.dtsi new file mode 100644 index 000000000000..e23e8ffb093f --- /dev/null +++ b/arch/arm/dts/exynos5420.dtsi @@ -0,0 +1,1413 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos5420 SoC device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung Exynos5420 SoC device nodes are listed in this file. + * Exynos5420 based board files can include this file and provide + * values for board specfic bindings. + */ + +#include "exynos54xx.dtsi" +#include <dt-bindings/clock/exynos5420.h> +#include <dt-bindings/clock/exynos-audss-clk.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "samsung,exynos5420", "samsung,exynos5"; + + aliases { + mshc0 = &mmc_0; + mshc1 = &mmc_1; + mshc2 = &mmc_2; + pinctrl0 = &pinctrl_0; + pinctrl1 = &pinctrl_1; + pinctrl2 = &pinctrl_2; + pinctrl3 = &pinctrl_3; + pinctrl4 = &pinctrl_4; + i2c8 = &hsi2c_8; + i2c9 = &hsi2c_9; + i2c10 = &hsi2c_10; + gsc0 = &gsc_0; + gsc1 = &gsc_1; + spi0 = &spi_0; + spi1 = &spi_1; + spi2 = &spi_2; + }; + + /* + * The 'cpus' node is not present here but instead it is provided + * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi. + */ + + cluster_a15_opp_table: opp-table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1250000 1250000 1500000>; + clock-latency-ns = <140000>; + }; + opp-1700000000 { + opp-hz = /bits/ 64 <1700000000>; + opp-microvolt = <1212500 1212500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1600000000 { + opp-hz = /bits/ 64 <1600000000>; + opp-microvolt = <1175000 1175000 1500000>; + clock-latency-ns = <140000>; + }; + opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <1137500 1137500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <1112500 1112500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1300000000 { + opp-hz = /bits/ 64 <1300000000>; + opp-microvolt = <1062500 1062500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1037500 1037500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1100000000 { + opp-hz = /bits/ 64 <1100000000>; + opp-microvolt = <1012500 1012500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = < 987500 987500 1500000>; + clock-latency-ns = <140000>; + }; + opp-900000000 { + opp-hz = /bits/ 64 <900000000>; + opp-microvolt = < 962500 962500 1500000>; + clock-latency-ns = <140000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = < 937500 937500 1500000>; + clock-latency-ns = <140000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = < 912500 912500 1500000>; + clock-latency-ns = <140000>; + }; + }; + + cluster_a7_opp_table: opp-table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-1300000000 { + opp-hz = /bits/ 64 <1300000000>; + opp-microvolt = <1275000>; + clock-latency-ns = <140000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1212500>; + clock-latency-ns = <140000>; + }; + opp-1100000000 { + opp-hz = /bits/ 64 <1100000000>; + opp-microvolt = <1162500>; + clock-latency-ns = <140000>; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1112500>; + clock-latency-ns = <140000>; + }; + opp-900000000 { + opp-hz = /bits/ 64 <900000000>; + opp-microvolt = <1062500>; + clock-latency-ns = <140000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1025000>; + clock-latency-ns = <140000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <975000>; + clock-latency-ns = <140000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <937500>; + clock-latency-ns = <140000>; + }; + }; + + soc: soc { + cci: cci@10d20000 { + compatible = "arm,cci-400"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x10d20000 0x1000>; + ranges = <0x0 0x10d20000 0x6000>; + + cci_control0: slave-if@4000 { + compatible = "arm,cci-400-ctrl-if"; + interface-type = "ace"; + reg = <0x4000 0x1000>; + }; + cci_control1: slave-if@5000 { + compatible = "arm,cci-400-ctrl-if"; + interface-type = "ace"; + reg = <0x5000 0x1000>; + }; + }; + + clock: clock-controller@10010000 { + compatible = "samsung,exynos5420-clock", "syscon"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; + + clock_audss: audss-clock-controller@3810000 { + compatible = "samsung,exynos5420-audss-clock"; + reg = <0x03810000 0x0C>; + #clock-cells = <1>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>, + <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; + clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; + power-domains = <&mau_pd>; + }; + + mfc: codec@11000000 { + compatible = "samsung,mfc-v7"; + reg = <0x11000000 0x10000>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MFC>; + clock-names = "mfc"; + power-domains = <&mfc_pd>; + iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>; + iommu-names = "left", "right"; + }; + + mmc_0: mmc@12200000 { + compatible = "samsung,exynos5420-dw-mshc-smu"; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12200000 0x2000>; + clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mmc_1: mmc@12210000 { + compatible = "samsung,exynos5420-dw-mshc-smu"; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12210000 0x2000>; + clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + mmc_2: mmc@12220000 { + compatible = "samsung,exynos5420-dw-mshc"; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x12220000 0x1000>; + clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + + dmc: memory-controller@10c20000 { + compatible = "samsung,exynos5422-dmc"; + reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>; + clocks = <&clock CLK_FOUT_SPLL>, + <&clock CLK_MOUT_SCLK_SPLL>, + <&clock CLK_FF_DOUT_SPLL2>, + <&clock CLK_FOUT_BPLL>, + <&clock CLK_MOUT_BPLL>, + <&clock CLK_SCLK_BPLL>, + <&clock CLK_MOUT_MX_MSPLL_CCORE>, + <&clock CLK_MOUT_MCLK_CDREX>; + clock-names = "fout_spll", + "mout_sclk_spll", + "ff_dout_spll2", + "fout_bpll", + "mout_bpll", + "sclk_bpll", + "mout_mx_mspll_ccore", + "mout_mclk_cdrex"; + samsung,syscon-clk = <&clock>; + status = "disabled"; + }; + + nocp_mem0_0: nocp@10ca1000 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1000 0x200>; + status = "disabled"; + }; + + nocp_mem0_1: nocp@10ca1400 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1400 0x200>; + status = "disabled"; + }; + + nocp_mem1_0: nocp@10ca1800 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1800 0x200>; + status = "disabled"; + }; + + nocp_mem1_1: nocp@10ca1c00 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x10CA1C00 0x200>; + status = "disabled"; + }; + + nocp_g3d_0: nocp@11a51000 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x11A51000 0x200>; + status = "disabled"; + }; + + nocp_g3d_1: nocp@11a51400 { + compatible = "samsung,exynos5420-nocp"; + reg = <0x11A51400 0x200>; + status = "disabled"; + }; + + ppmu_dmc0_0: ppmu@10d00000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x10d00000 0x2000>; + clocks = <&clock CLK_PCLK_PPMU_DREX0_0>; + clock-names = "ppmu"; + events { + ppmu_event3_dmc0_0: ppmu-event3-dmc0_0 { + event-name = "ppmu-event3-dmc0_0"; + }; + }; + }; + + ppmu_dmc0_1: ppmu@10d10000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x10d10000 0x2000>; + clocks = <&clock CLK_PCLK_PPMU_DREX0_1>; + clock-names = "ppmu"; + events { + ppmu_event3_dmc0_1: ppmu-event3-dmc0_1 { + event-name = "ppmu-event3-dmc0_1"; + }; + }; + }; + + ppmu_dmc1_0: ppmu@10d60000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x10d60000 0x2000>; + clocks = <&clock CLK_PCLK_PPMU_DREX1_0>; + clock-names = "ppmu"; + events { + ppmu_event3_dmc1_0: ppmu-event3-dmc1_0 { + event-name = "ppmu-event3-dmc1_0"; + }; + }; + }; + + ppmu_dmc1_1: ppmu@10d70000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x10d70000 0x2000>; + clocks = <&clock CLK_PCLK_PPMU_DREX1_1>; + clock-names = "ppmu"; + events { + ppmu_event3_dmc1_1: ppmu-event3-dmc1_1 { + event-name = "ppmu-event3-dmc1_1"; + }; + }; + }; + + gsc_pd: power-domain@10044000 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044000 0x20>; + #power-domain-cells = <0>; + label = "GSC"; + }; + + isp_pd: power-domain@10044020 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044020 0x20>; + #power-domain-cells = <0>; + label = "ISP"; + }; + + mfc_pd: power-domain@10044060 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044060 0x20>; + #power-domain-cells = <0>; + label = "MFC"; + }; + + g3d_pd: power-domain@10044080 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044080 0x20>; + #power-domain-cells = <0>; + label = "G3D"; + }; + + disp_pd: power-domain@100440c0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440C0 0x20>; + #power-domain-cells = <0>; + label = "DISP"; + }; + + mau_pd: power-domain@100440e0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440E0 0x20>; + #power-domain-cells = <0>; + label = "MAU"; + }; + + msc_pd: power-domain@10044120 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10044120 0x20>; + #power-domain-cells = <0>; + label = "MSC"; + }; + + pinctrl_0: pinctrl@13400000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x13400000 0x1000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + pinctrl_1: pinctrl@13410000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x13410000 0x1000>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_2: pinctrl@14000000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x14000000 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_3: pinctrl@14010000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x14010000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + }; + + pinctrl_4: pinctrl@3860000 { + compatible = "samsung,exynos5420-pinctrl"; + reg = <0x03860000 0x1000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&mau_pd>; + }; + + adma: adma@3880000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x03880000 0x1000>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock_audss EXYNOS_ADMA>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <6>; + #dma-requests = <16>; + power-domains = <&mau_pd>; + }; + + pdma0: pdma@121a0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x121A0000 0x1000>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_PDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + pdma1: pdma@121b0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x121B0000 0x1000>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_PDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + mdma0: mdma@10800000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x10800000 0x1000>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + }; + + mdma1: mdma@11c10000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x11C10000 0x1000>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + /* + * MDMA1 can support both secure and non-secure + * AXI transactions. When this is enabled in + * the kernel for boards that run in secure + * mode, we are getting imprecise external + * aborts causing the kernel to oops. + */ + status = "disabled"; + }; + + i2s0: i2s@3830000 { + compatible = "samsung,exynos5420-i2s"; + reg = <0x03830000 0x100>; + dmas = <&adma 0>, + <&adma 2>, + <&adma 1>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_SCLK_I2S>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; + clock-output-names = "i2s_cdclk0"; + #sound-dai-cells = <1>; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + power-domains = <&mau_pd>; + status = "disabled"; + }; + + i2s1: i2s@12d60000 { + compatible = "samsung,exynos5420-i2s"; + reg = <0x12D60000 0x100>; + dmas = <&pdma1 12>, + <&pdma1 11>; + dma-names = "tx", "rx"; + clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>; + clock-names = "iis", "i2s_opclk0"; + #clock-cells = <1>; + clock-output-names = "i2s_cdclk1"; + #sound-dai-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_bus>; + status = "disabled"; + }; + + i2s2: i2s@12d70000 { + compatible = "samsung,exynos5420-i2s"; + reg = <0x12D70000 0x100>; + dmas = <&pdma0 12>, + <&pdma0 11>; + dma-names = "tx", "rx"; + clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>; + clock-names = "iis", "i2s_opclk0"; + #clock-cells = <1>; + clock-output-names = "i2s_cdclk2"; + #sound-dai-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s2_bus>; + status = "disabled"; + }; + + spi_0: spi@12d20000 { + compatible = "samsung,exynos4210-spi"; + reg = <0x12d20000 0x100>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma0 5 + &pdma0 4>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus>; + clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; + clock-names = "spi", "spi_busclk0"; + status = "disabled"; + }; + + spi_1: spi@12d30000 { + compatible = "samsung,exynos4210-spi"; + reg = <0x12d30000 0x100>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 5 + &pdma1 4>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_bus>; + clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; + clock-names = "spi", "spi_busclk0"; + status = "disabled"; + }; + + spi_2: spi@12d40000 { + compatible = "samsung,exynos4210-spi"; + reg = <0x12d40000 0x100>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma0 7 + &pdma0 6>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_bus>; + clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; + clock-names = "spi", "spi_busclk0"; + status = "disabled"; + }; + + dp_phy: dp-video-phy { + compatible = "samsung,exynos5420-dp-video-phy"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + }; + + mipi_phy: mipi-video-phy { + compatible = "samsung,s5pv210-mipi-video-phy"; + syscon = <&pmu_system_controller>; + #phy-cells = <1>; + }; + + dsi@14500000 { + compatible = "samsung,exynos5410-mipi-dsi"; + reg = <0x14500000 0x10000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + phys = <&mipi_phy 1>; + phy-names = "dsim"; + clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>; + clock-names = "bus_clk", "pll_clk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + hsi2c_8: i2c@12e00000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12E00000 0x1000>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_hs_bus>; + clocks = <&clock CLK_USI4>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_9: i2c@12e10000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12E10000 0x1000>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c9_hs_bus>; + clocks = <&clock CLK_USI5>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hsi2c_10: i2c@12e20000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12E20000 0x1000>; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c10_hs_bus>; + clocks = <&clock CLK_USI6>; + clock-names = "hsi2c"; + status = "disabled"; + }; + + hdmi: hdmi@14530000 { + compatible = "samsung,exynos5420-hdmi"; + reg = <0x14530000 0x70000>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, + <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, + <&clock CLK_MOUT_HDMI>; + clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", + "sclk_hdmiphy", "mout_hdmi"; + phy = <&hdmiphy>; + samsung,syscon-phandle = <&pmu_system_controller>; + status = "disabled"; + power-domains = <&disp_pd>; + #sound-dai-cells = <0>; + }; + + hdmiphy: hdmiphy@145d0000 { + reg = <0x145D0000 0x20>; + }; + + hdmicec: cec@101b0000 { + compatible = "samsung,s5p-cec"; + reg = <0x101B0000 0x200>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_HDMI_CEC>; + clock-names = "hdmicec"; + samsung,syscon-phandle = <&pmu_system_controller>; + hdmi-phandle = <&hdmi>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "disabled"; + }; + + mixer: mixer@14450000 { + compatible = "samsung,exynos5420-mixer"; + reg = <0x14450000 0x10000>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, + <&clock CLK_SCLK_HDMI>; + clock-names = "mixer", "hdmi", "sclk_hdmi"; + power-domains = <&disp_pd>; + iommus = <&sysmmu_tv>; + status = "disabled"; + }; + + rotator: rotator@11c00000 { + compatible = "samsung,exynos5250-rotator"; + reg = <0x11C00000 0x64>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_ROTATOR>; + clock-names = "rotator"; + iommus = <&sysmmu_rotator>; + }; + + gsc_0: video-scaler@13e00000 { + compatible = "samsung,exynos5420-gsc", "samsung,exynos5-gsc"; + reg = <0x13e00000 0x1000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_GSCL0>; + clock-names = "gscl"; + power-domains = <&gsc_pd>; + iommus = <&sysmmu_gscl0>; + }; + + gsc_1: video-scaler@13e10000 { + compatible = "samsung,exynos5420-gsc", "samsung,exynos5-gsc"; + reg = <0x13e10000 0x1000>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_GSCL1>; + clock-names = "gscl"; + power-domains = <&gsc_pd>; + iommus = <&sysmmu_gscl1>; + }; + + gpu: gpu@11800000 { + compatible = "samsung,exynos5420-mali", "arm,mali-t628"; + reg = <0x11800000 0x5000>; + interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + + clocks = <&clock CLK_G3D>; + clock-names = "core"; + power-domains = <&g3d_pd>; + operating-points-v2 = <&gpu_opp_table>; + + status = "disabled"; + #cooling-cells = <2>; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-177000000 { + opp-hz = /bits/ 64 <177000000>; + opp-microvolt = <812500>; + }; + opp-266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <862500>; + }; + opp-350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <912500>; + }; + opp-420000000 { + opp-hz = /bits/ 64 <420000000>; + opp-microvolt = <962500>; + }; + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt = <1000000>; + }; + opp-543000000 { + opp-hz = /bits/ 64 <543000000>; + opp-microvolt = <1037500>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1150000>; + }; + }; + }; + + scaler_0: scaler@12800000 { + compatible = "samsung,exynos5420-scaler"; + reg = <0x12800000 0x1294>; + interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MSCL0>; + clock-names = "mscl"; + power-domains = <&msc_pd>; + iommus = <&sysmmu_scaler0r>, <&sysmmu_scaler0w>; + }; + + scaler_1: scaler@12810000 { + compatible = "samsung,exynos5420-scaler"; + reg = <0x12810000 0x1294>; + interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MSCL1>; + clock-names = "mscl"; + power-domains = <&msc_pd>; + iommus = <&sysmmu_scaler1r>, <&sysmmu_scaler1w>; + }; + + scaler_2: scaler@12820000 { + compatible = "samsung,exynos5420-scaler"; + reg = <0x12820000 0x1294>; + interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_MSCL2>; + clock-names = "mscl"; + power-domains = <&msc_pd>; + iommus = <&sysmmu_scaler2r>, <&sysmmu_scaler2w>; + }; + + jpeg_0: jpeg@11f50000 { + compatible = "samsung,exynos5420-jpeg"; + reg = <0x11F50000 0x1000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "jpeg"; + clocks = <&clock CLK_JPEG>; + iommus = <&sysmmu_jpeg0>; + }; + + jpeg_1: jpeg@11f60000 { + compatible = "samsung,exynos5420-jpeg"; + reg = <0x11F60000 0x1000>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "jpeg"; + clocks = <&clock CLK_JPEG2>; + iommus = <&sysmmu_jpeg1>; + }; + + pmu_system_controller: system-controller@10040000 { + compatible = "samsung,exynos5420-pmu", "syscon"; + reg = <0x10040000 0x5000>; + clock-names = "clkout16"; + clocks = <&clock CLK_FIN_PLL>; + #clock-cells = <1>; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + }; + + tmu_cpu0: tmu@10060000 { + compatible = "samsung,exynos5420-tmu"; + reg = <0x10060000 0x100>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_TMU>; + clock-names = "tmu_apbif"; + #thermal-sensor-cells = <0>; + }; + + tmu_cpu1: tmu@10064000 { + compatible = "samsung,exynos5420-tmu"; + reg = <0x10064000 0x100>; + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_TMU>; + clock-names = "tmu_apbif"; + #thermal-sensor-cells = <0>; + }; + + tmu_cpu2: tmu@10068000 { + compatible = "samsung,exynos5420-tmu-ext-triminfo"; + reg = <0x10068000 0x100>, <0x1006c000 0x4>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; + clock-names = "tmu_apbif", "tmu_triminfo_apbif"; + #thermal-sensor-cells = <0>; + }; + + tmu_cpu3: tmu@1006c000 { + compatible = "samsung,exynos5420-tmu-ext-triminfo"; + reg = <0x1006c000 0x100>, <0x100a0000 0x4>; + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; + clock-names = "tmu_apbif", "tmu_triminfo_apbif"; + #thermal-sensor-cells = <0>; + }; + + tmu_gpu: tmu@100a0000 { + compatible = "samsung,exynos5420-tmu-ext-triminfo"; + reg = <0x100a0000 0x100>, <0x10068000 0x4>; + interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; + clock-names = "tmu_apbif", "tmu_triminfo_apbif"; + #thermal-sensor-cells = <0>; + }; + + sysmmu_g2dr: sysmmu@10a60000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x10A60000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <24 5>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>; + #iommu-cells = <0>; + }; + + sysmmu_g2dw: sysmmu@10a70000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x10A70000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <22 2>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>; + #iommu-cells = <0>; + }; + + sysmmu_tv: sysmmu@14650000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x14650000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <7 4>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MIXER>, <&clock CLK_MIXER>; + power-domains = <&disp_pd>; + #iommu-cells = <0>; + }; + + sysmmu_gscl0: sysmmu@13e80000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13E80000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <2 0>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>; + power-domains = <&gsc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_gscl1: sysmmu@13e90000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x13E90000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <2 2>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_GSCL1>, <&clock CLK_GSCL1>; + power-domains = <&gsc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_scaler0r: sysmmu@12880000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x12880000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <22 4>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>; + power-domains = <&msc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_scaler1r: sysmmu@12890000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x12890000 0x1000>; + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; + power-domains = <&msc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_scaler2r: sysmmu@128a0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x128A0000 0x1000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; + power-domains = <&msc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_scaler0w: sysmmu@128c0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x128C0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <27 2>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MSCL0>, <&clock CLK_MSCL0>; + power-domains = <&msc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_scaler1w: sysmmu@128d0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x128D0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <22 6>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; + power-domains = <&msc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_scaler2w: sysmmu@128e0000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x128E0000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <19 6>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; + power-domains = <&msc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_rotator: sysmmu@11d40000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11D40000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 0>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>; + #iommu-cells = <0>; + }; + + sysmmu_jpeg0: sysmmu@11f10000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11F10000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 2>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>; + #iommu-cells = <0>; + }; + + sysmmu_jpeg1: sysmmu@11f20000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11F20000 0x1000>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>; + #iommu-cells = <0>; + }; + + sysmmu_mfc_l: sysmmu@11200000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11200000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <6 2>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>; + power-domains = <&mfc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_mfc_r: sysmmu@11210000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x11210000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <8 5>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>; + power-domains = <&mfc_pd>; + #iommu-cells = <0>; + }; + + sysmmu_fimd1_0: sysmmu@14640000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x14640000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <3 2>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>; + power-domains = <&disp_pd>; + #iommu-cells = <0>; + }; + + sysmmu_fimd1_1: sysmmu@14680000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x14680000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <3 0>; + clock-names = "sysmmu", "master"; + clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>; + power-domains = <&disp_pd>; + #iommu-cells = <0>; + }; + + bus_wcore: bus-wcore { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK400_WCORE>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_noc: bus-noc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK100_NOC>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_fsys_apb: bus-fsys-apb { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_PCLK200_FSYS>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_fsys: bus-fsys { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK200_FSYS>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_fsys2: bus-fsys2 { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_mfc: bus-mfc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK333>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_gen: bus-gen { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK266>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_peri: bus-peri { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK66>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_g2d: bus-g2d { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK333_G2D>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_g2d_acp: bus-g2d-acp { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK266_G2D>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_jpeg: bus-jpeg { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK300_JPEG>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_jpeg_apb: bus-jpeg-apb { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK166>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_disp1_fimd: bus-disp1-fimd { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK300_DISP1>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_disp1: bus-disp1 { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK400_DISP1>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_gscl_scaler: bus-gscl-scaler { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK300_GSCL>; + clock-names = "bus"; + status = "disabled"; + }; + + bus_mscl: bus-mscl { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DOUT_ACLK400_MSCL>; + clock-names = "bus"; + status = "disabled"; + }; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0>; + #include "exynos5420-trip-points.dtsi" + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmu_cpu1>; + #include "exynos5420-trip-points.dtsi" + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmu_cpu2>; + #include "exynos5420-trip-points.dtsi" + }; + cpu3_thermal: cpu3-thermal { + thermal-sensors = <&tmu_cpu3>; + #include "exynos5420-trip-points.dtsi" + }; + gpu_thermal: gpu-thermal { + thermal-sensors = <&tmu_gpu>; + #include "exynos5420-trip-points.dtsi" + }; + }; +}; + +&adc { + clocks = <&clock CLK_TSADC>; + clock-names = "adc"; + samsung,syscon-phandle = <&pmu_system_controller>; +}; + +&dp { + clocks = <&clock CLK_DP1>; + clock-names = "dp"; + phys = <&dp_phy>; + phy-names = "dp"; + power-domains = <&disp_pd>; +}; + +&fimd { + compatible = "samsung,exynos5420-fimd"; + clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; + clock-names = "sclk_fimd", "fimd"; + power-domains = <&disp_pd>; + iommus = <&sysmmu_fimd1_0>, <&sysmmu_fimd1_1>; + iommu-names = "m0", "m1"; +}; + +&g2d { + iommus = <&sysmmu_g2dr>, <&sysmmu_g2dw>; + clocks = <&clock CLK_G2D>; + clock-names = "fimg2d"; + status = "okay"; +}; + +&i2c_0 { + clocks = <&clock CLK_I2C0>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_bus>; +}; + +&i2c_1 { + clocks = <&clock CLK_I2C1>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_bus>; +}; + +&i2c_2 { + clocks = <&clock CLK_I2C2>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_bus>; +}; + +&i2c_3 { + clocks = <&clock CLK_I2C3>; + clock-names = "i2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_bus>; +}; + +&hsi2c_4 { + clocks = <&clock CLK_USI0>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_hs_bus>; +}; + +&hsi2c_5 { + clocks = <&clock CLK_USI1>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_hs_bus>; +}; + +&hsi2c_6 { + clocks = <&clock CLK_USI2>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_hs_bus>; +}; + +&hsi2c_7 { + clocks = <&clock CLK_USI3>; + clock-names = "hsi2c"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_hs_bus>; +}; + +&mct { + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; + clock-names = "fin_pll", "mct"; +}; + +&prng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + +&pwm { + clocks = <&clock CLK_PWM>; + clock-names = "timers"; +}; + +&rtc { + clocks = <&clock CLK_RTC>; + clock-names = "rtc"; + interrupt-parent = <&pmu_system_controller>; + status = "disabled"; +}; + +&serial_0 { + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 13>, <&pdma0 14>; + dma-names = "rx", "tx"; +}; + +&serial_1 { + clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma1 15>, <&pdma1 16>; + dma-names = "rx", "tx"; +}; + +&serial_2 { + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma0 15>, <&pdma0 16>; + dma-names = "rx", "tx"; +}; + +&serial_3 { + clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; + clock-names = "uart", "clk_uart_baud0"; + dmas = <&pdma1 17>, <&pdma1 18>; + dma-names = "rx", "tx"; +}; + +&sss { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + +&trng { + clocks = <&clock CLK_SSS>; + clock-names = "secss"; +}; + +&usbdrd3_0 { + clocks = <&clock CLK_USBD300>; + clock-names = "usbdrd30"; +}; + +&usbdrd_phy0 { + clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBPHY300>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; +}; + +&usbdrd3_1 { + clocks = <&clock CLK_USBD301>; + clock-names = "usbdrd30"; +}; + +&usbdrd_dwc3_1 { + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; +}; + +&usbdrd_phy1 { + clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBPHY301>; + clock-names = "phy", "ref"; + samsung,pmu-syscon = <&pmu_system_controller>; +}; + +&usbhost1 { + clocks = <&clock CLK_USBH20>; + clock-names = "usbhost"; +}; + +&usbhost2 { + clocks = <&clock CLK_USBH20>; + clock-names = "usbhost"; +}; + +&usb2_phy { + clocks = <&clock CLK_USBH20>, <&clock CLK_SCLK_USBPHY300>; + clock-names = "phy", "ref"; + samsung,sysreg-phandle = <&sysreg_system_controller>; + samsung,pmureg-phandle = <&pmu_system_controller>; +}; + +&watchdog { + clocks = <&clock CLK_WDT>; + clock-names = "watchdog"; + samsung,syscon-phandle = <&pmu_system_controller>; +}; + +#include "exynos5420-pinctrl.dtsi" +#include "exynos-syscon-restart.dtsi" diff --git a/arch/arm/dts/exynos5422-cpus.dtsi b/arch/arm/dts/exynos5422-cpus.dtsi new file mode 100644 index 000000000000..412a0bb4b988 --- /dev/null +++ b/arch/arm/dts/exynos5422-cpus.dtsi @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos5422 SoC cpu device tree source + * + * Copyright (c) 2015 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This file provides desired ordering for Exynos5422: CPU[0123] being the A7. + * + * The Exynos5420, 5422 and 5800 actually share the same CPU configuration + * but particular boards choose different booting order. + * + * Exynos5420 and Exynos5800 always boot from Cortex-A15. On Exynos5422 + * booting cluster (big or LITTLE) is chosen by IROM code by reading + * the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting + * from the LITTLE: Cortex-A7. + */ + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + core2 { + cpu = <&cpu2>; + }; + core3 { + cpu = <&cpu3>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu4>; + }; + core1 { + cpu = <&cpu5>; + }; + core2 { + cpu = <&cpu6>; + }; + core3 { + cpu = <&cpu7>; + }; + }; + }; + + cpu0: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + dynamic-power-coefficient = <90>; + }; + + cpu1: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x101>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + dynamic-power-coefficient = <90>; + }; + + cpu2: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x102>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + dynamic-power-coefficient = <90>; + }; + + cpu3: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x103>; + clocks = <&clock CLK_KFC_CLK>; + clock-frequency = <1000000000>; + cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; + dynamic-power-coefficient = <90>; + }; + + cpu4: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <310>; + }; + + cpu5: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x1>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <310>; + }; + + cpu6: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x2>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <310>; + }; + + cpu7: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x3>; + clocks = <&clock CLK_ARM_CLK>; + clock-frequency = <1800000000>; + cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; + dynamic-power-coefficient = <310>; + }; + }; +}; + +&arm_a7_pmu { + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + status = "okay"; +}; + +&arm_a15_pmu { + interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + status = "okay"; +}; diff --git a/arch/arm/dts/exynos5422-odroid-core.dtsi b/arch/arm/dts/exynos5422-odroid-core.dtsi new file mode 100644 index 000000000000..e7958dbecfd2 --- /dev/null +++ b/arch/arm/dts/exynos5422-odroid-core.dtsi @@ -0,0 +1,1071 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source + * + * Copyright (c) 2017 Marek Szyprowski + * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +#include <dt-bindings/clock/samsung,s2mps11.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include "exynos5800.dtsi" +#include "exynos5422-cpus.dtsi" + +/ { + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0x7EA00000>; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + firmware@2073000 { + compatible = "samsung,secure-firmware"; + reg = <0x02073000 0x1000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; + + bus_wcore_opp_table: opp-table2 { + compatible = "operating-points-v2"; + + /* derived from 532MHz MPLL */ + opp00 { + opp-hz = /bits/ 64 <88700000>; + opp-microvolt = <925000 925000 1400000>; + }; + opp01 { + opp-hz = /bits/ 64 <133000000>; + opp-microvolt = <950000 950000 1400000>; + }; + opp02 { + opp-hz = /bits/ 64 <177400000>; + opp-microvolt = <950000 950000 1400000>; + }; + opp03 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <950000 950000 1400000>; + }; + opp04 { + opp-hz = /bits/ 64 <532000000>; + opp-microvolt = <1000000 1000000 1400000>; + }; + }; + + bus_noc_opp_table: opp-table3 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <66600000>; + }; + opp01 { + opp-hz = /bits/ 64 <74000000>; + }; + opp02 { + opp-hz = /bits/ 64 <83250000>; + }; + opp03 { + opp-hz = /bits/ 64 <111000000>; + }; + }; + + bus_fsys_apb_opp_table: opp-table4 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <111000000>; + }; + opp01 { + opp-hz = /bits/ 64 <222000000>; + }; + }; + + bus_fsys2_opp_table: opp-table5 { + compatible = "operating-points-v2"; + + /* derived from 600MHz DPLL */ + opp00 { + opp-hz = /bits/ 64 <75000000>; + }; + opp01 { + opp-hz = /bits/ 64 <120000000>; + }; + opp02 { + opp-hz = /bits/ 64 <200000000>; + }; + }; + + bus_mfc_opp_table: opp-table6 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <83250000>; + }; + opp01 { + opp-hz = /bits/ 64 <111000000>; + }; + opp02 { + opp-hz = /bits/ 64 <166500000>; + }; + opp03 { + opp-hz = /bits/ 64 <222000000>; + }; + opp04 { + opp-hz = /bits/ 64 <333000000>; + }; + }; + + bus_gen_opp_table: opp-table7 { + compatible = "operating-points-v2"; + + /* derived from 532MHz MPLL */ + opp00 { + opp-hz = /bits/ 64 <88700000>; + }; + opp01 { + opp-hz = /bits/ 64 <133000000>; + }; + opp02 { + opp-hz = /bits/ 64 <178000000>; + }; + opp03 { + opp-hz = /bits/ 64 <266000000>; + }; + }; + + bus_peri_opp_table: opp-table8 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <66600000>; + }; + }; + + bus_g2d_opp_table: opp-table9 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <83250000>; + }; + opp01 { + opp-hz = /bits/ 64 <111000000>; + }; + opp02 { + opp-hz = /bits/ 64 <166500000>; + }; + opp03 { + opp-hz = /bits/ 64 <222000000>; + }; + opp04 { + opp-hz = /bits/ 64 <333000000>; + }; + }; + + bus_g2d_acp_opp_table: opp-table10 { + compatible = "operating-points-v2"; + + /* derived from 532MHz MPLL */ + opp00 { + opp-hz = /bits/ 64 <66500000>; + }; + opp01 { + opp-hz = /bits/ 64 <133000000>; + }; + opp02 { + opp-hz = /bits/ 64 <178000000>; + }; + opp03 { + opp-hz = /bits/ 64 <266000000>; + }; + }; + + bus_jpeg_opp_table: opp-table11 { + compatible = "operating-points-v2"; + + /* derived from 600MHz DPLL */ + opp00 { + opp-hz = /bits/ 64 <75000000>; + }; + opp01 { + opp-hz = /bits/ 64 <150000000>; + }; + opp02 { + opp-hz = /bits/ 64 <200000000>; + }; + opp03 { + opp-hz = /bits/ 64 <300000000>; + }; + }; + + bus_jpeg_apb_opp_table: opp-table12 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <83250000>; + }; + opp01 { + opp-hz = /bits/ 64 <111000000>; + }; + opp02 { + opp-hz = /bits/ 64 <133000000>; + }; + opp03 { + opp-hz = /bits/ 64 <166500000>; + }; + }; + + bus_disp1_fimd_opp_table: opp-table13 { + compatible = "operating-points-v2"; + + /* derived from 600MHz DPLL */ + opp00 { + opp-hz = /bits/ 64 <120000000>; + }; + opp01 { + opp-hz = /bits/ 64 <200000000>; + }; + }; + + bus_disp1_opp_table: opp-table14 { + compatible = "operating-points-v2"; + + /* derived from 600MHz DPLL */ + opp00 { + opp-hz = /bits/ 64 <120000000>; + }; + opp01 { + opp-hz = /bits/ 64 <200000000>; + }; + opp02 { + opp-hz = /bits/ 64 <300000000>; + }; + }; + + bus_gscl_opp_table: opp-table15 { + compatible = "operating-points-v2"; + + /* derived from 600MHz DPLL */ + opp00 { + opp-hz = /bits/ 64 <150000000>; + }; + opp01 { + opp-hz = /bits/ 64 <200000000>; + }; + opp02 { + opp-hz = /bits/ 64 <300000000>; + }; + }; + + bus_mscl_opp_table: opp-table16 { + compatible = "operating-points-v2"; + + /* derived from 666MHz CPLL */ + opp00 { + opp-hz = /bits/ 64 <84000000>; + }; + opp01 { + opp-hz = /bits/ 64 <167000000>; + }; + opp02 { + opp-hz = /bits/ 64 <222000000>; + }; + opp03 { + opp-hz = /bits/ 64 <333000000>; + }; + opp04 { + opp-hz = /bits/ 64 <666000000>; + }; + }; + + dmc_opp_table: opp-table17 { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <165000000>; + opp-microvolt = <875000>; + }; + opp01 { + opp-hz = /bits/ 64 <206000000>; + opp-microvolt = <875000>; + }; + opp02 { + opp-hz = /bits/ 64 <275000000>; + opp-microvolt = <875000>; + }; + opp03 { + opp-hz = /bits/ 64 <413000000>; + opp-microvolt = <887500>; + }; + opp04 { + opp-hz = /bits/ 64 <543000000>; + opp-microvolt = <937500>; + }; + opp05 { + opp-hz = /bits/ 64 <633000000>; + opp-microvolt = <1012500>; + }; + opp06 { + opp-hz = /bits/ 64 <728000000>; + opp-microvolt = <1037500>; + }; + opp07 { + opp-hz = /bits/ 64 <825000000>; + opp-microvolt = <1050000>; + }; + }; + + samsung_K3QF2F20DB: lpddr3 { + compatible = "samsung,K3QF2F20DB", "jedec,lpddr3"; + density = <16384>; + io-width = <32>; + #address-cells = <1>; + #size-cells = <0>; + + tRFC-min-tck = <17>; + tRRD-min-tck = <2>; + tRPab-min-tck = <2>; + tRPpb-min-tck = <2>; + tRCD-min-tck = <3>; + tRC-min-tck = <6>; + tRAS-min-tck = <5>; + tWTR-min-tck = <2>; + tWR-min-tck = <7>; + tRTP-min-tck = <2>; + tW2W-C2C-min-tck = <0>; + tR2R-C2C-min-tck = <0>; + tWL-min-tck = <8>; + tDQSCK-min-tck = <5>; + tRL-min-tck = <14>; + tFAW-min-tck = <5>; + tXSR-min-tck = <12>; + tXP-min-tck = <2>; + tCKE-min-tck = <2>; + tCKESR-min-tck = <2>; + tMRD-min-tck = <5>; + + timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 { + compatible = "jedec,lpddr3-timings"; + /* workaround: 'reg' shows max-freq */ + reg = <800000000>; + min-freq = <100000000>; + tRFC = <65000>; + tRRD = <6000>; + tRPab = <12000>; + tRPpb = <12000>; + tRCD = <10000>; + tRC = <33750>; + tRAS = <23000>; + tWTR = <3750>; + tWR = <7500>; + tRTP = <3750>; + tW2W-C2C = <0>; + tR2R-C2C = <0>; + tFAW = <25000>; + tXSR = <70000>; + tXP = <3750>; + tCKE = <3750>; + tCKESR = <3750>; + tMRD = <7000>; + }; + }; +}; + +&adc { + vdd-supply = <&ldo4_reg>; + status = "okay"; +}; + +&bus_wcore { + operating-points-v2 = <&bus_wcore_opp_table>; + devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, + <&nocp_mem1_0>, <&nocp_mem1_1>; + vdd-supply = <&buck3_reg>; + exynos,saturation-ratio = <100>; + status = "okay"; +}; + +&bus_noc { + operating-points-v2 = <&bus_noc_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys_apb { + operating-points-v2 = <&bus_fsys_apb_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_fsys2 { + operating-points-v2 = <&bus_fsys2_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_mfc { + operating-points-v2 = <&bus_mfc_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_gen { + operating-points-v2 = <&bus_gen_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_peri { + operating-points-v2 = <&bus_peri_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_g2d { + operating-points-v2 = <&bus_g2d_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_g2d_acp { + operating-points-v2 = <&bus_g2d_acp_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_jpeg { + operating-points-v2 = <&bus_jpeg_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_jpeg_apb { + operating-points-v2 = <&bus_jpeg_apb_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_disp1_fimd { + operating-points-v2 = <&bus_disp1_fimd_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_disp1 { + operating-points-v2 = <&bus_disp1_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_gscl_scaler { + operating-points-v2 = <&bus_gscl_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&bus_mscl { + operating-points-v2 = <&bus_mscl_opp_table>; + devfreq = <&bus_wcore>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&buck6_reg>; +}; + +&cpu4 { + cpu-supply = <&buck2_reg>; +}; + +&dmc { + devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>, + <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>; + device-handle = <&samsung_K3QF2F20DB>; + operating-points-v2 = <&dmc_opp_table>; + vdd-supply = <&buck1_reg>; + status = "okay"; +}; + +&hsi2c_4 { + status = "okay"; + + pmic@66 { + compatible = "samsung,s2mps11-pmic"; + reg = <0x66>; + samsung,s2mps11-acokb-ground; + + interrupt-parent = <&gpx0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&s2mps11_irq>; + wakeup-source; + + s2mps11_osc: clocks { + compatible = "samsung,s2mps11-clk"; + #clock-cells = <1>; + clock-output-names = "s2mps11_ap", + "s2mps11_cp", "s2mps11_bt"; + }; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo2_reg: LDO2 { + regulator-name = "vdd_ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "vddq_mmc0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo4_reg: LDO4 { + regulator-name = "vdd_adc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_ldo6"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_ldo7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo12_reg: LDO12 { + /* Unused */ + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <2375000>; + }; + + ldo13_reg: LDO13 { + regulator-name = "vddq_mmc2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo14_reg: LDO14 { + /* Unused */ + regulator-name = "vdd_ldo14"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo16_reg: LDO16 { + /* Unused */ + regulator-name = "vdd_ldo16"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo17_reg: LDO17 { + regulator-name = "vdd_ldo17"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo18_reg: LDO18 { + regulator-name = "vdd_emmc_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo19_reg: LDO19 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo20_reg: LDO20 { + /* Unused */ + regulator-name = "vdd_ldo20"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo21_reg: LDO21 { + /* Unused */ + regulator-name = "vdd_ldo21"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo22_reg: LDO22 { + /* Unused */ + regulator-name = "vdd_ldo22"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <2375000>; + }; + + ldo23_reg: LDO23 { + regulator-name = "vdd_mifs"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo24_reg: LDO24 { + /* Unused */ + regulator-name = "vdd_ldo24"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo25_reg: LDO25 { + /* Unused */ + regulator-name = "vdd_ldo25"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo26_reg: LDO26 { + /* Used on XU3, XU3-Lite and XU4 */ + regulator-name = "vdd_ldo26"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo27_reg: LDO27 { + regulator-name = "vdd_g3ds"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo28_reg: LDO28 { + /* Used on XU3 */ + regulator-name = "vdd_ldo28"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo29_reg: LDO29 { + /* Unused */ + regulator-name = "vdd_ldo29"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo30_reg: LDO30 { + /* Unused */ + regulator-name = "vdd_ldo30"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo31_reg: LDO31 { + /* Unused */ + regulator-name = "vdd_ldo31"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo32_reg: LDO32 { + /* Unused */ + regulator-name = "vdd_ldo32"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo33_reg: LDO33 { + /* Unused */ + regulator-name = "vdd_ldo33"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo34_reg: LDO34 { + /* Unused */ + regulator-name = "vdd_ldo34"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo35_reg: LDO35 { + /* Unused */ + regulator-name = "vdd_ldo35"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <2375000>; + }; + + ldo36_reg: LDO36 { + /* Unused */ + regulator-name = "vdd_ldo36"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo37_reg: LDO37 { + /* Unused */ + regulator-name = "vdd_ldo37"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + ldo38_reg: LDO38 { + /* Unused */ + regulator-name = "vdd_ldo38"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-boot-on; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_mem"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1.35v_ldo"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_2.0v_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2100000>; + regulator-always-on; + regulator-boot-on; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2.8v_ldo"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3750000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_vmem"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_wp &sd2_bus1 &sd2_bus4>; + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <200000000>; + vmmc-supply = <&ldo19_reg>; + vqmmc-supply = <&ldo13_reg>; + sd-uhs-sdr50; + sd-uhs-sdr104; + sd-uhs-ddr50; +}; + +&nocp_mem0_0 { + status = "okay"; +}; + +&nocp_mem0_1 { + status = "okay"; +}; + +&nocp_mem1_0 { + status = "okay"; +}; + +&nocp_mem1_1 { + status = "okay"; +}; + +&pinctrl_0 { + s2mps11_irq: s2mps11-irq { + samsung,pins = "gpx0-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&ppmu_dmc0_0 { + status = "okay"; +}; + +&ppmu_dmc0_1 { + status = "okay"; +}; + +&ppmu_dmc1_0 { + status = "okay"; +}; + +&ppmu_dmc1_1 { + status = "okay"; +}; + +&tmu_cpu0 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo7_reg>; +}; + +&tmu_gpu { + vtmu-supply = <&ldo7_reg>; +}; + +&gpu { + mali-supply = <&buck4_reg>; + status = "okay"; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; +}; + +&usbdrd_dwc3_0 { + dr_mode = "host"; +}; + +/* usbdrd_dwc3_1 mode customized in each board */ + +&usbdrd3_0 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; + +&usbdrd3_1 { + vdd33-supply = <&ldo9_reg>; + vdd10-supply = <&ldo11_reg>; +}; diff --git a/arch/arm/dts/exynos5422-odroidxu3-audio.dtsi b/arch/arm/dts/exynos5422-odroidxu3-audio.dtsi new file mode 100644 index 000000000000..86b96f9706db --- /dev/null +++ b/arch/arm/dts/exynos5422-odroidxu3-audio.dtsi @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardkernel Odroid XU3 audio subsystem device tree source + * + * Copyright (c) 2015 Krzysztof Kozlowski + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +#include <dt-bindings/sound/samsung-i2s.h> + +/ { + sound: sound { + compatible = "samsung,odroid-xu3-audio"; + model = "Odroid-XU3"; + + samsung,audio-widgets = + "Headphone", "Headphone Jack", + "Speakers", "Speakers"; + samsung,audio-routing = + "Headphone Jack", "HPL", + "Headphone Jack", "HPR", + "Headphone Jack", "MICBIAS", + "IN12", "Headphone Jack", + "Speakers", "SPKL", + "Speakers", "SPKR", + "I2S Playback", "Mixer DAI TX", + "HiFi Playback", "Mixer DAI TX", + "Mixer DAI RX", "HiFi Capture"; + + cpu { + sound-dai = <&i2s0 0>, <&i2s0 1>; + }; + codec { + sound-dai = <&hdmi>, <&max98090>; + }; + }; +}; + +&hsi2c_5 { + status = "okay"; + max98090: audio-codec@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupt-parent = <&gpx3>; + interrupts = <2 IRQ_TYPE_NONE>; + clocks = <&i2s0 CLK_I2S_CDCLK>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; +}; + +&i2s0 { + status = "okay"; + assigned-clocks = <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MOUT_USER_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&i2s0 CLK_I2S_RCLK_SRC>, + <&clock_audss EXYNOS_DOUT_SRP>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>, + <&clock_audss EXYNOS_DOUT_I2S>; + + assigned-clock-parents = <&clock CLK_FOUT_EPLL>, + <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_SCLK_I2S>; + + assigned-clock-rates = <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <196608001>, + <(196608002 / 2)>, + <196608000>; + +}; diff --git a/arch/arm/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/dts/exynos5422-odroidxu3-common.dtsi new file mode 100644 index 000000000000..e35af40a55cb --- /dev/null +++ b/arch/arm/dts/exynos5422-odroidxu3-common.dtsi @@ -0,0 +1,505 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2015 Lukasz Majewski l.majewski@samsung.com + * Anand Moon linux.amoon@gmail.com + */ + +#include <dt-bindings/input/input.h> +#include "exynos5422-odroid-core.dtsi" + +/ { + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&power_key>; + + power-key { + /* + * The power button (SW2) is connected to the PWRON + * pin (active high) of the S2MPS11 PMIC, which acts + * as a 16ms debouce filter and signal inverter with + * output on ONOB pin (active low). ONOB PMIC pin is + * then connected to XEINT3 SoC pin. + */ + gpios = <&gpx0 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + label = "power key"; + debounce-interval = <0>; + wakeup-source; + }; + }; + + emmc_pwrseq: pwrseq { + pinctrl-0 = <&emmc_nrst_pin>; + pinctrl-names = "default"; + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>; + }; + + fan0: pwm-fan { + compatible = "pwm-fan"; + pwms = <&pwm 0 20972 0>; + #cooling-cells = <2>; + cooling-levels = <0 130 170 230>; + }; + + thermal-zones { + cpu0_thermal: cpu0-thermal { + thermal-sensors = <&tmu_cpu0 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu0_alert0: cpu-alert-0 { + temperature = <50000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "active"; + }; + cpu0_alert1: cpu-alert-1 { + temperature = <60000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "active"; + }; + cpu0_alert2: cpu-alert-2 { + temperature = <70000>; /* millicelsius */ + hysteresis = <5000>; /* millicelsius */ + type = "active"; + }; + cpu0_crit0: cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + }; + /* + * Exynos542x supports only 4 trip-points + * so for these polling mode is required. + * Start polling at temperature level of last + * interrupt-driven trip: cpu0_alert2 + */ + cpu0_alert3: cpu-alert-3 { + temperature = <70000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + cpu0_alert4: cpu-alert-4 { + temperature = <85000>; /* millicelsius */ + hysteresis = <10000>; /* millicelsius */ + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu0_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu0_alert2>; + cooling-device = <&fan0 2 3>; + }; + /* + * When reaching cpu0_alert3, reduce CPU + * by 2 steps. On Exynos5422/5800 that would + * (usually) be: 1800 MHz and 1200 MHz. + */ + map3 { + trip = <&cpu0_alert3>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + /* + * When reaching cpu0_alert4, reduce CPU + * further, down to 600 MHz (14 steps for big, + * 8 steps for LITTLE). + */ + cpu0_cooling_map4: map4 { + trip = <&cpu0_alert4>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; + }; + }; + }; + cpu1_thermal: cpu1-thermal { + thermal-sensors = <&tmu_cpu1 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu1_alert0: cpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + cpu1_alert1: cpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + cpu1_alert2: cpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + cpu1_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + cpu1_alert3: cpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + cpu1_alert4: cpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu1_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu1_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&cpu1_alert3>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + cpu1_cooling_map4: map4 { + trip = <&cpu1_alert4>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; + }; + }; + }; + cpu2_thermal: cpu2-thermal { + thermal-sensors = <&tmu_cpu2 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu2_alert0: cpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + cpu2_alert1: cpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + cpu2_alert2: cpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + cpu2_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + cpu2_alert3: cpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + cpu2_alert4: cpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu2_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu2_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&cpu2_alert3>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + cpu2_cooling_map4: map4 { + trip = <&cpu2_alert4>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; + }; + }; + }; + cpu3_thermal: cpu3-thermal { + thermal-sensors = <&tmu_cpu3 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + cpu3_alert0: cpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + cpu3_alert1: cpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + cpu3_alert2: cpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + cpu3_crit0: cpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + cpu3_alert3: cpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + cpu3_alert4: cpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&cpu3_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&cpu3_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&cpu3_alert3>; + cooling-device = <&cpu0 0 2>, + <&cpu1 0 2>, + <&cpu2 0 2>, + <&cpu3 0 2>, + <&cpu4 0 2>, + <&cpu5 0 2>, + <&cpu6 0 2>, + <&cpu7 0 2>; + }; + cpu3_cooling_map4: map4 { + trip = <&cpu3_alert4>; + cooling-device = <&cpu0 3 8>, + <&cpu1 3 8>, + <&cpu2 3 8>, + <&cpu3 3 8>, + <&cpu4 3 14>, + <&cpu5 3 14>, + <&cpu6 3 14>, + <&cpu7 3 14>; + }; + }; + }; + gpu_thermal: gpu-thermal { + thermal-sensors = <&tmu_gpu 0>; + polling-delay-passive = <250>; + polling-delay = <0>; + trips { + gpu_alert0: gpu-alert-0 { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + gpu_alert1: gpu-alert-1 { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + gpu_alert2: gpu-alert-2 { + temperature = <70000>; + hysteresis = <5000>; + type = "active"; + }; + gpu_crit0: gpu-crit-0 { + temperature = <120000>; + hysteresis = <0>; + type = "critical"; + }; + gpu_alert3: gpu-alert-3 { + temperature = <70000>; + hysteresis = <10000>; + type = "passive"; + }; + gpu_alert4: gpu-alert-4 { + temperature = <85000>; + hysteresis = <10000>; + type = "passive"; + }; + }; + cooling-maps { + map0 { + trip = <&gpu_alert0>; + cooling-device = <&fan0 0 1>; + }; + map1 { + trip = <&gpu_alert1>; + cooling-device = <&fan0 1 2>; + }; + map2 { + trip = <&gpu_alert2>; + cooling-device = <&fan0 2 3>; + }; + map3 { + trip = <&gpu_alert3>; + cooling-device = <&gpu 0 2>; + }; + map4 { + trip = <&gpu_alert4>; + cooling-device = <&gpu 3 6>; + }; + }; + }; + }; +}; + +&buck10_reg { + /* Supplies vmmc-supply of mmc_0 */ + regulator-always-on; + regulator-boot-on; +}; + +&hdmi { + status = "okay"; + ddc = <&i2c_2>; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + + vdd_osc-supply = <&ldo7_reg>; + vdd_pll-supply = <&ldo6_reg>; + vdd-supply = <&ldo6_reg>; +}; + +&hdmicec { + status = "okay"; + needs-hpd; +}; + +&i2c_2 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + /* used by HDMI DDC */ + status = "okay"; +}; + +&ldo26_reg { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; +}; + +&mixer { + status = "okay"; +}; + +&mmc_0 { + status = "okay"; + mmc-pwrseq = <&emmc_pwrseq>; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-hs400-timing = <0 2>; + samsung,read-strobe-delay = <90>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + max-frequency = <200000000>; + vmmc-supply = <&ldo18_reg>; + vqmmc-supply = <&ldo3_reg>; +}; + +&pinctrl_0 { + power_key: power-key { + samsung,pins = "gpx0-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_1 { + emmc_nrst_pin: emmc-nrst { + samsung,pins = "gpd1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; diff --git a/arch/arm/dts/exynos5422-odroidxu3-lite.dts b/arch/arm/dts/exynos5422-odroidxu3-lite.dts new file mode 100644 index 000000000000..62c5928aa994 --- /dev/null +++ b/arch/arm/dts/exynos5422-odroidxu3-lite.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardkernel Odroid XU3-Lite board device tree source + * + * Copyright (c) 2015 Krzysztof Kozlowski + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include "exynos5422-odroidxu3-common.dtsi" +#include "exynos5422-odroidxu3-audio.dtsi" +#include "exynos54xx-odroidxu-leds.dtsi" + +/ { + model = "Hardkernel Odroid XU3 Lite"; + compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5"; + + aliases { + ethernet = ðernet; + }; +}; + +&arm_a7_pmu { + status = "disabled"; +}; + +&arm_a15_pmu { + status = "disabled"; +}; + +&chipid { + samsung,asv-bin = <2>; +}; + +/* + * Odroid XU3-Lite board uses SoC revision with lower maximum frequencies + * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores. + * Therefore we need to update OPPs tables and thermal maps accordingly. + */ +&cluster_a15_opp_table { + /delete-node/opp-2000000000; + /delete-node/opp-1900000000; +}; + +&cluster_a7_opp_table { + /delete-node/opp-1400000000; +}; + +&cpu0_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&cpu1_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&cpu2_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&cpu3_cooling_map4 { + cooling-device = <&cpu0 3 7>, + <&cpu1 3 7>, + <&cpu2 3 7>, + <&cpu3 3 7>, + <&cpu4 3 12>, + <&cpu5 3 12>, + <&cpu6 3 12>, + <&cpu7 3 12>; +}; + +&pwm { + /* + * PWM 0 -- fan + * PWM 1 -- Green LED + * PWM 2 -- Blue LED + * PWM 3 -- on MIPI connector for backlight + */ + pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "peripheral"; +}; + +&usbhost2 { + #address-cells = <1>; + #size-cells = <0>; + + hub@1 { + compatible = "usb0424,9514"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet: usbether@1 { + compatible = "usb0424,ec00"; + reg = <1>; + local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */ + }; + }; +}; diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index 256df6d6c27e..cecaeb69e623 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -1,294 +1,94 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * Odroid XU3 device tree source + * Hardkernel Odroid XU3 board device tree source * - * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2013 Samsung Electronics Co., Ltd. * http://www.samsung.com */
/dts-v1/; -#include "exynos54xx.dtsi" +#include "exynos5422-odroidxu3-common.dtsi" +#include "exynos5422-odroidxu3-audio.dtsi" +#include "exynos54xx-odroidxu-leds.dtsi"
/ { - model = "Odroid XU3/XU4/HC1/HC2 based on Exynos5422"; - compatible = "samsung,odroidxu3", "samsung,exynos5"; + model = "Hardkernel Odroid XU3"; + compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5";
aliases { - serial0 = "/serial@12C00000"; - console = "/serial@12C20000"; + ethernet = ðernet; }; +};
- memory { - device_type = "memory"; - reg = <0x40000000 0x10000000 - 0x50000000 0x10000000 - 0x60000000 0x10000000 - 0x70000000 0x10000000 - 0x80000000 0x10000000 - 0x90000000 0x10000000 - 0xa0000000 0x10000000 - 0xb0000000 0xea00000>; - }; +&i2c_0 { + status = "okay";
- adc@12D10000 { - u-boot,dm-pre-reloc; - vdd-supply = <&ldo4_reg>; - status = "okay"; + /* A15 cluster: VDD_ARM */ + power-sensor@40 { + compatible = "ti,ina231"; + reg = <0x40>; + shunt-resistor = <10000>; };
- i2c@12CA0000 { - s2mps11_pmic@66 { - compatible = "samsung,s2mps11-pmic"; - reg = <0x66>; - voltage-regulators { - ldo1_reg: LDO1 { - regulator-name = "vdd_ldo1"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo3_reg: LDO3 { - regulator-name = "vddq_mmc0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - }; - - ldo4_reg: LDO4 { - regulator-name = "vdd_adc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - }; - - ldo5_reg: LDO5 { - regulator-name = "vdd_ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo6_reg: LDO6 { - regulator-name = "vdd_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo7_reg: LDO7 { - regulator-name = "vdd_ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo8_reg: LDO8 { - regulator-name = "vdd_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo9_reg: LDO9 { - regulator-name = "vdd_ldo9"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo10_reg: LDO10 { - regulator-name = "vdd_ldo10"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo11_reg: LDO11 { - regulator-name = "vdd_ldo11"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo12_reg: LDO12 { - regulator-name = "vdd_ldo12"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo13_reg: LDO13 { - regulator-name = "vddq_mmc2"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-ramp-delay = <12000>; - }; - - ldo15_reg: LDO15 { - regulator-name = "vdd_ldo15"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo16_reg: LDO16 { - regulator-name = "vdd_ldo16"; - regulator-min-microvolt = <2200000>; - regulator-max-microvolt = <2200000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo17_reg: LDO17 { - regulator-name = "vdd_ldo17"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo18_reg: LDO18 { - regulator-name = "vdd_emmc_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-ramp-delay = <12000>; - }; - - ldo19_reg: LDO19 { - regulator-name = "vdd_sd"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-ramp-delay = <12000>; - }; - - ldo24_reg: LDO24 { - regulator-name = "tsp_io"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - ldo26_reg: LDO26 { - regulator-name = "vdd_ldo26"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-ramp-delay = <12000>; - regulator-always-on; - }; - - buck1_reg: BUCK1 { - regulator-name = "vdd_mif"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1300000>; - regulator-always-on; - regulator-boot-on; - }; - - buck2_reg: BUCK2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; + /* memory: VDD_MEM */ + power-sensor@41 { + compatible = "ti,ina231"; + reg = <0x41>; + shunt-resistor = <10000>; + };
- buck3_reg: BUCK3 { - regulator-name = "vdd_int"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; + /* GPU: VDD_G3D */ + power-sensor@44 { + compatible = "ti,ina231"; + reg = <0x44>; + shunt-resistor = <10000>; + };
- buck4_reg: BUCK4 { - regulator-name = "vdd_g3d"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; + /* A7 cluster: VDD_KFC */ + power-sensor@45 { + compatible = "ti,ina231"; + reg = <0x45>; + shunt-resistor = <10000>; + }; +};
- buck5_reg: BUCK5 { - regulator-name = "vdd_mem"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; +&ldo28_reg { + regulator-name = "dp_p3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +};
- buck6_reg: BUCK6 { - regulator-name = "vdd_kfc"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; +&pwm { + /* + * PWM 0 -- fan + * PWM 1 -- Green LED + * PWM 2 -- Blue LED + * PWM 3 -- on MIPI connector for backlight + */ + pinctrl-0 = <&pwm0_out &pwm1_out &pwm2_out &pwm3_out>; + pinctrl-names = "default"; + status = "okay"; +};
- buck7_reg: BUCK7 { - regulator-name = "vdd_1.0v_ldo"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; +&usbdrd_dwc3_1 { + dr_mode = "peripheral"; +};
- buck8_reg: BUCK8 { - regulator-name = "vdd_1.8v_ldo"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - }; +&usbhost2 { + #address-cells = <1>; + #size-cells = <0>;
- buck9_reg: BUCK9 { - regulator-name = "vdd_2.8v_ldo"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3750000>; - regulator-always-on; - regulator-boot-on; - }; + hub@1 { + compatible = "usb0424,9514"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>;
- buck10_reg: BUCK10 { - regulator-name = "vdd_vmem"; - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <2850000>; - regulator-always-on; - regulator-boot-on; - }; - }; + ethernet: usbether@1 { + compatible = "usb0424,ec00"; + reg = <1>; + local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */ }; }; - - ehci@12110000 { - samsung,vbus-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>; - }; - - serial@12C20000 { - status = "okay"; - }; - - mmc@12200000 { - fifoth_val = <0x201f0020>; - }; - - mmc@12220000 { - fifoth_val = <0x201f0020>; - }; - - emmc-reset { - compatible = "samsung,emmc-reset"; - reset-gpio = <&gpd1 0 0>; - }; }; diff --git a/arch/arm/dts/exynos5422-odroidxu4.dts b/arch/arm/dts/exynos5422-odroidxu4.dts new file mode 100644 index 000000000000..1c24f9b35973 --- /dev/null +++ b/arch/arm/dts/exynos5422-odroidxu4.dts @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardkernel Odroid XU4 board device tree source + * + * Copyright (c) 2015 Krzysztof Kozlowski + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +/dts-v1/; +#include <dt-bindings/sound/samsung-i2s.h> +#include "exynos5422-odroidxu3-common.dtsi" + +/ { + model = "Hardkernel Odroid XU4"; + compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \ + "samsung,exynos5"; + + led-controller { + compatible = "pwm-leds"; + + led-1 { + label = "blue:heartbeat"; + pwms = <&pwm 2 2000000 0>; + pwm-names = "pwm2"; + max-brightness = <255>; + linux,default-trigger = "heartbeat"; + }; + }; + + sound: sound { + compatible = "samsung,odroid-xu3-audio"; + model = "Odroid-XU4"; + + samsung,audio-routing = "I2S Playback", "Mixer DAI TX"; + + cpu { + sound-dai = <&i2s0 0>, <&i2s0 1>; + }; + + codec { + sound-dai = <&hdmi>; + }; + }; +}; + +&i2s0 { + status = "okay"; + + assigned-clocks = <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MOUT_USER_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>, + <&i2s0 CLK_I2S_RCLK_SRC>, + <&clock_audss EXYNOS_DOUT_SRP>, + <&clock_audss EXYNOS_DOUT_AUD_BUS>, + <&clock_audss EXYNOS_DOUT_I2S>; + + assigned-clock-parents = <&clock CLK_FOUT_EPLL>, + <&clock CLK_MOUT_EPLL>, + <&clock CLK_MOUT_MAU_EPLL>, + <&clock CLK_MAU_EPLL>, + <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_SCLK_I2S>; + + assigned-clock-rates = <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <196608001>, + <(196608002 / 2)>, + <196608000>; +}; + +&pwm { + /* + * PWM 0 -- fan + * PWM 2 -- Blue LED + */ + pinctrl-0 = <&pwm0_out &pwm2_out>; + pinctrl-names = "default"; + samsung,pwm-outputs = <0>, <2>; + status = "okay"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; +}; diff --git a/arch/arm/dts/exynos54xx-odroidxu-leds.dtsi b/arch/arm/dts/exynos54xx-odroidxu-leds.dtsi new file mode 100644 index 000000000000..982752e1df24 --- /dev/null +++ b/arch/arm/dts/exynos54xx-odroidxu-leds.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardkernel Odroid XU/XU3 LED device tree source + * + * Copyright (c) 2015,2016 Krzysztof Kozlowski + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + led-controller-1 { + compatible = "pwm-leds"; + + led-1 { + label = "green:mmc0"; + pwms = <&pwm 1 2000000 0>; + pwm-names = "pwm1"; + /* + * Green LED is much brighter than the others + * so limit its max brightness + */ + max-brightness = <127>; + linux,default-trigger = "mmc0"; + }; + + led-2 { + label = "blue:heartbeat"; + pwms = <&pwm 2 2000000 0>; + pwm-names = "pwm2"; + max-brightness = <255>; + linux,default-trigger = "heartbeat"; + }; + }; + + led-controller-2 { + compatible = "gpio-leds"; + + led-3 { + label = "red:microSD"; + gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc1"; + }; + }; +}; diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi index 221da8b4850b..2ddb7a5f12b3 100644 --- a/arch/arm/dts/exynos54xx.dtsi +++ b/arch/arm/dts/exynos54xx.dtsi @@ -1,231 +1,209 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * (C) Copyright 2013 SAMSUNG Electronics - * SAMSUNG EXYNOS5420 SoC device tree source + * Samsung's Exynos54xx SoC series common device tree source + * + * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2016 Krzysztof Kozlowski + * + * Device nodes common for Samsung Exynos5410/5420/5422/5800. Specific + * Exynos 54xx SoCs should include this file and customize it further + * (e.g. with clocks). */
#include "exynos5.dtsi" -#include "exynos54xx-pinctrl.dtsi"
/ { - config { - machine-arch-id = <4151>; - }; + compatible = "samsung,exynos5";
aliases { - i2c0 = "/i2c@12C60000"; - i2c1 = "/i2c@12C70000"; - i2c2 = "/i2c@12C80000"; - i2c3 = "/i2c@12C90000"; - i2c4 = "/i2c@12CA0000"; - i2c5 = "/i2c@12CB0000"; - i2c6 = "/i2c@12CC0000"; - i2c7 = "/i2c@12CD0000"; - i2c8 = "/i2c@12E00000"; - i2c9 = "/i2c@12E10000"; - i2c10 = "/i2c@12E20000"; - pinctrl0 = &pinctrl_0; - pinctrl1 = &pinctrl_1; - pinctrl2 = &pinctrl_2; - pinctrl3 = &pinctrl_3; - pinctrl4 = &pinctrl_4; - spi0 = "/spi@12d20000"; - spi1 = "/spi@12d30000"; - spi2 = "/spi@12d40000"; - spi3 = "/spi@131a0000"; - spi4 = "/spi@131b0000"; - mmc0 = "/mmc@12200000"; - mmc1 = "/mmc@12210000"; - mmc2 = "/mmc@12220000"; - xhci0 = "/xhci@12000000"; - xhci1 = "/xhci@12400000"; - }; - - adc@12D10000 { - compatible = "samsung,exynos-adc-v2"; - reg = <0x12D10000 0x100>; - interrupts = <0 106 0>; + i2c4 = &hsi2c_4; + i2c5 = &hsi2c_5; + i2c6 = &hsi2c_6; + i2c7 = &hsi2c_7; + usbdrdphy0 = &usbdrd_phy0; + usbdrdphy1 = &usbdrd_phy1; + }; + + arm_a7_pmu: arm-a7-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; };
- hsi2c_4: i2c@12CA0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12CA0000 0x100>; - interrupts = <0 60 0>; - }; - - i2c@12CB0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12CB0000 0x100>; - interrupts = <0 61 0>; - }; - - i2c@12CC0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12CC0000 0x100>; - interrupts = <0 62 0>; - }; - - i2c@12CD0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12CD0000 0x100>; - interrupts = <0 63 0>; - }; - - i2c@12E00000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12E00000 0x100>; - interrupts = <0 87 0>; - }; - - i2c@12E10000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12E10000 0x100>; - interrupts = <0 88 0>; - }; - - i2c@12E20000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "samsung,exynos5-hsi2c"; - reg = <0x12E20000 0x100>; - interrupts = <0 203 0>; - }; - - i2s0: i2s@3830000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x03830000 0x100>; - #sound-dai-cells = <1>; - samsung,idma-addr = <0x03000000>; - samsung,i2s-epll-clock-frequency = <192000000>; - samsung,i2s-sampling-rate = <48000>; - samsung,i2s-bits-per-sample = <16>; - samsung,i2s-channels = <2>; - samsung,i2s-lr-clk-framesize = <256>; - samsung,i2s-bit-clk-framesize = <32>; - samsung,i2s-id = <0>; - }; - - mmc@12200000 { - samsung,bus-width = <8>; - samsung,timing = <1 3 3>; - samsung,removable = <0>; - samsung,pre-init; - }; - - mmc@12210000 { + arm_a15_pmu: arm-a15-pmu { + compatible = "arm,cortex-a15-pmu"; + interrupt-parent = <&combiner>; + interrupts = <1 2>, + <7 0>, + <16 6>, + <19 2>; status = "disabled"; };
- mmc@12220000 { - samsung,bus-width = <4>; - samsung,timing = <1 2 3>; - samsung,removable = <1>; - }; - - mmc@12230000 { - status = "disabled"; - }; + timer: timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + clock-frequency = <24000000>; + }; + + soc: soc { + sram@2020000 { + compatible = "mmio-sram"; + reg = <0x02020000 0x54000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x02020000 0x54000>; + + smp-sram@0 { + compatible = "samsung,exynos4210-sysram"; + reg = <0x0 0x1000>; + }; + + smp-sram@53000 { + compatible = "samsung,exynos4210-sysram-ns"; + reg = <0x53000 0x1000>; + }; + };
- fimdm0_sysmmu@0x14640000 { - compatible = "samsung,sysmmu-v3.3"; - reg = <0x14640000 0x100>; - }; + mct: timer@101c0000 { + compatible = "samsung,exynos4210-mct"; + reg = <0x101c0000 0xb00>; + interrupts-extended = <&combiner 23 3>, + <&combiner 23 4>, + <&combiner 25 2>, + <&combiner 25 3>, + <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + };
- fimdm1_sysmmu@0x14680000 { - compatible = "samsung,sysmmu-v3.3"; - reg = <0x14680000 0x100>; - }; + watchdog: watchdog@101d0000 { + compatible = "samsung,exynos5420-wdt"; + reg = <0x101d0000 0x100>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + };
- pinctrl_0: pinctrl@13400000 { - compatible = "samsung,exynos5420-pinctrl"; - reg = <0x13400000 0x1000>; - interrupts = <0 45 0>; + adc: adc@12d10000 { + compatible = "samsung,exynos-adc-v2"; + reg = <0x12d10000 0x100>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + status = "disabled"; + };
- wakeup-interrupt-controller { - compatible = "samsung,exynos4210-wakeup-eint"; - interrupt-parent = <&gic>; - interrupts = <0 32 0>; + /* i2c_0-3 are defined in exynos5.dtsi */ + hsi2c_4: i2c@12ca0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12ca0000 0x1000>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; }; - };
- pinctrl_1: pinctrl@13410000 { - compatible = "samsung,exynos5420-pinctrl"; - reg = <0x13410000 0x1000>; - interrupts = <0 78 0>; - }; + hsi2c_5: i2c@12cb0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12cb0000 0x1000>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + };
- pinctrl_2: pinctrl@14000000 { - compatible = "samsung,exynos5420-pinctrl"; - reg = <0x14000000 0x1000>; - interrupts = <0 46 0>; - }; + hsi2c_6: i2c@12cc0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12cc0000 0x1000>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + };
- pinctrl_3: pinctrl@14010000 { - compatible = "samsung,exynos5420-pinctrl"; - reg = <0x14010000 0x1000>; - interrupts = <0 50 0>; - }; + hsi2c_7: i2c@12cd0000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12cd0000 0x1000>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + };
- pinctrl_4: pinctrl@03860000 { - compatible = "samsung,exynos5420-pinctrl"; - reg = <0x03860000 0x1000>; - interrupts = <0 47 0>; - }; + usbdrd3_0: usb3-0 { + compatible = "samsung,exynos5250-dwusb3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbdrd_dwc3_0: usb@12000000 { + compatible = "snps,dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; + phy-names = "usb2-phy", "usb3-phy"; + snps,dis_u3_susphy_quirk; + }; + };
- fimd@14400000 { - /* sysmmu is not used in U-Boot */ - samsung,disable-sysmmu; - samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>; - }; + usbdrd_phy0: phy@12100000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12100000 0x100>; + #phy-cells = <1>; + };
- dp: dp@145b0000 { - samsung,lt-status = <0>; - - samsung,master-mode = <0>; - samsung,bist-mode = <0>; - samsung,bist-pattern = <0>; - samsung,h-sync-polarity = <0>; - samsung,v-sync-polarity = <0>; - samsung,interlaced = <0>; - samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; - samsung,color-depth = <1>; - }; + usbdrd3_1: usb3-1 { + compatible = "samsung,exynos5250-dwusb3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbdrd_dwc3_1: usb@12400000 { + compatible = "snps,dwc3"; + reg = <0x12400000 0x10000>; + phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>; + phy-names = "usb2-phy", "usb3-phy"; + snps,dis_u3_susphy_quirk; + }; + };
- dmc { - mem-type = "ddr3"; - }; + usbdrd_phy1: phy@12500000 { + compatible = "samsung,exynos5420-usbdrd-phy"; + reg = <0x12500000 0x100>; + #phy-cells = <1>; + };
- pwm: pwm@12dd0000 { - compatible = "samsung,exynos4210-pwm"; - reg = <0x12dd0000 0x100>; - samsung,pwm-outputs = <0>, <1>, <2>, <3>; - #pwm-cells = <3>; - }; + usbhost2: usb@12110000 { + compatible = "samsung,exynos4210-ehci"; + reg = <0x12110000 0x100>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb2_phy 0>; + phy-names = "host"; + };
- xhci1: xhci@12400000 { - compatible = "samsung,exynos5250-xhci"; - reg = <0x12400000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; + usbhost1: usb@12120000 { + compatible = "samsung,exynos4210-ohci"; + reg = <0x12120000 0x100>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usb2_phy 0>; + phy-names = "host"; + };
- phy { - compatible = "samsung,exynos5250-usb3-phy"; - reg = <0x12500000 0x100>; + usb2_phy: phy@12130000 { + compatible = "samsung,exynos5420-usb2-phy"; + reg = <0x12130000 0x100>; + #phy-cells = <1>; }; }; }; diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts index 63c0b186e426..77013ee586f8 100644 --- a/arch/arm/dts/exynos5800-peach-pi.dts +++ b/arch/arm/dts/exynos5800-peach-pi.dts @@ -1,32 +1,34 @@ -// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0 /* - * SAMSUNG/GOOGLE Peach-Pit board device tree source + * Google Peach Pi Rev 10+ board device tree source * - * Copyright (c) 2013 Samsung Electronics Co., Ltd. - * http://www.samsung.com + * Copyright (c) 2014 Google, Inc */
/dts-v1/; -#include "exynos54xx.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/maxim,max77802.h> +#include <dt-bindings/regulator/maxim,max77802.h> +#include <dt-bindings/sound/samsung-i2s.h> +#include "exynos5800.dtsi" +#include "exynos5420-cpus.dtsi"
/ { - model = "Samsung/Google Peach Pi board based on Exynos5800"; - cpu-model = "Exynos5800"; + model = "Google Peach Pi Rev 10+";
- compatible = "google,pit-rev#", "google,pit", - "google,peach", "samsung,exynos5800", "samsung,exynos5"; - - config { - google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; - hwid = "PIT TEST A-A 7848"; - lazy-init = <1>; - }; + compatible = "google,pi-rev16", + "google,pi-rev15", "google,pi-rev14", + "google,pi-rev13", "google,pi-rev12", + "google,pi-rev11", "google,pi-rev10", + "google,pi", "google,peach", "samsung,exynos5800", + "samsung,exynos5"; + chassis-type = "laptop";
aliases { - serial0 = "/serial@12C30000"; - console = "/serial@12C30000"; - pmic = "/i2c@12CA0000"; - i2c104 = &i2c_tunnel; + /* Assign 20 so we don't get confused w/ builtin ones */ + i2c20 = &i2c_tunnel; };
backlight: backlight { @@ -36,143 +38,147 @@ default-brightness-level = <7>; enable-gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>; power-supply = <&tps65090_fet1>; + pinctrl-0 = <&pwm0_out>; + pinctrl-names = "default"; };
- panel: panel { - compatible = "auo,b133htn01"; - power-supply = <&tps65090_fet6>; - backlight = <&backlight>; + chosen { + stdout-path = "serial3:115200n8"; + };
- port { - panel_in: endpoint { - remote-endpoint = <&dp_out>; - }; + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; }; };
- dmc { - mem-manuf = "samsung"; - mem-type = "ddr3"; - clock-frequency = <800000000>; - arm-frequency = <900000000>; - }; - - tmu@10060000 { - samsung,min-temp = <25>; - samsung,max-temp = <125>; - samsung,start-warning = <95>; - samsung,start-tripping = <105>; - samsung,hw-tripping = <110>; - samsung,efuse-min-value = <40>; - samsung,efuse-value = <55>; - samsung,efuse-max-value = <100>; - samsung,slope = <274761730>; - samsung,dc-value = <25>; - }; - - /* MAX77802 is on i2c bus 4 */ - i2c@12CA0000 { - clock-frequency = <400000>; - power-regulator@9 { - compatible = "maxim,max77802-pmic"; - reg = <0x9>; + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq &lid_irq>; + + power { + label = "Power"; + gpios = <&gpx1 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_POWER>; + wakeup-source; + }; + + lid-switch { + label = "Lid"; + gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + wakeup-source; }; + + }; + + memory@20000000 { + device_type = "memory"; + reg = <0x20000000 0x80000000>; };
sound { - compatible = "google,peach-audio-max98090"; + compatible = "google,snow-audio-max98091";
- samsung,model = "PEACH-I2S-MAX98090"; - samsung,audio-codec = <&max98090>; + samsung,model = "Peach-Pi-I2S-MAX98091"; + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98091>;
cpu { sound-dai = <&i2s0 0>; };
codec { - sound-dai = <&max98090 0>; + sound-dai = <&max98091>, <&hdmi>; }; };
- i2c@12CD0000 { /* i2c7 */ - clock-frequency = <100000>; - max98090: soundcodec@10 { - reg = <0x10>; - compatible = "maxim,max98090"; - #sound-dai-cells = <1>; - }; + usb300_vbus_reg: regulator-usb300 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gph0 0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb300_vbus_en>; + enable-active-high; };
- sound@3830000 { - samsung,codec-type = "max98090"; - }; - - i2c@12E10000 { /* i2c9 */ - clock-frequency = <400000>; - tpm@20 { - compatible = "infineon,slb9645tt"; - reg = <0x20>; - }; + usb301_vbus_reg: regulator-usb301 { + compatible = "regulator-fixed"; + regulator-name = "P5.0V_USB3CON1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gph0 1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb301_vbus_en>; + enable-active-high; };
- spi@12d30000 { /* spi1 */ - spi-max-frequency = <50000000>; - firmware_storage_spi: flash@0 { - reg = <0>; + vbat: fixed-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbat-supply"; + regulator-boot-on; + regulator-always-on; + };
- /* - * A region for the kernel to store a panic event - * which the firmware will add to the log. - */ - elog-panic-event-offset = <0x01e00000 0x100000>; + panel: panel { + compatible = "auo,b133htn01"; + power-supply = <&tps65090_fet6>; + backlight = <&backlight>;
- elog-shrink-size = <0x400>; - elog-full-threshold = <0xc00>; + port { + panel_in: endpoint { + remote-endpoint = <&dp_out>; + }; }; };
- xhci@12000000 { - samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>; - }; - - xhci@12400000 { - samsung,vbus-gpio = <&gph0 1 GPIO_ACTIVE_HIGH>; + mmc1_pwrseq: mmc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpx0 0 GPIO_ACTIVE_LOW>; /* WIFI_EN */ + clocks = <&max77802 MAX77802_CLK_32K_CP>; + clock-names = "ext_clock"; }; +};
- fimd@14400000 { - samsung,vl-freq = <60>; - samsung,vl-col = <1920>; - samsung,vl-row = <1080>; - samsung,vl-width = <1920>; - samsung,vl-height = <1080>; +&adc { + status = "okay"; + vdd-supply = <&ldo9_reg>; +};
- samsung,vl-clkp; - samsung,vl-dp; - samsung,vl-bpix = <4>; +&clock_audss { + assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>; + assigned-clock-parents = <&clock CLK_MAU_EPLL>; +};
- samsung,vl-hspw = <80>; - samsung,vl-hbpd = <172>; - samsung,vl-hfpd = <60>; - samsung,vl-vspw = <10>; - samsung,vl-vbpd = <25>; - samsung,vl-vfpd = <10>; - samsung,vl-cmd-allow-len = <0xf>; +/* + * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores + * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to + * update A7 OPPs table accordingly. + */ +&cluster_a7_opp_table { + /delete-node/opp-1400000000; +};
- samsung,power-on-delay = <30000>; - samsung,winid = <3>; - samsung,interface-mode = <1>; - samsung,dp-enabled = <1>; - samsung,dual-lcd-enabled = <0>; +&cpu0 { + cpu-supply = <&buck2_reg>; +};
- samsung,bl-en-gpio = <&gpx2 2 GPIO_ACTIVE_HIGH>; - }; +&cpu4 { + cpu-supply = <&buck6_reg>; };
&dp { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&dp_hpd_gpio>; samsung,color-space = <0>; - samsung,dynamic-range = <0>; - samsung,ycbcr-coeff = <0>; samsung,color-depth = <1>; samsung,link-rate = <0x0a>; samsung,lane-count = <2>; @@ -187,33 +193,765 @@ }; };
+&fimd { + status = "okay"; + samsung,invert-vclk; +}; + +&hdmi { + status = "okay"; + hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + ddc = <&i2c_2>; + + hdmi-en-supply = <&tps65090_fet7>; + vdd-supply = <&ldo8_reg>; + vdd_osc-supply = <&ldo10_reg>; + vdd_pll-supply = <&ldo8_reg>; +}; + +&hsi2c_4 { + status = "okay"; + clock-frequency = <400000>; + + max77802: pmic@9 { + compatible = "maxim,max77802"; + interrupt-parent = <&gpx3>; + interrupts = <1 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&max77802_irq>, <&pmic_selb>, + <&pmic_dvs_1>, <&pmic_dvs_2>, <&pmic_dvs_3>; + wakeup-source; + reg = <0x9>; + #clock-cells = <1>; + + inb1-supply = <&tps65090_dcdc2>; + inb2-supply = <&tps65090_dcdc1>; + inb3-supply = <&tps65090_dcdc2>; + inb4-supply = <&tps65090_dcdc2>; + inb5-supply = <&tps65090_dcdc1>; + inb6-supply = <&tps65090_dcdc2>; + inb7-supply = <&tps65090_dcdc1>; + inb8-supply = <&tps65090_dcdc1>; + inb9-supply = <&tps65090_dcdc1>; + inb10-supply = <&tps65090_dcdc1>; + + inl1-supply = <&buck5_reg>; + inl2-supply = <&buck7_reg>; + inl3-supply = <&buck9_reg>; + inl4-supply = <&buck9_reg>; + inl5-supply = <&buck9_reg>; + inl6-supply = <&tps65090_dcdc2>; + inl7-supply = <&buck9_reg>; + inl9-supply = <&tps65090_dcdc2>; + inl10-supply = <&buck7_reg>; + + regulators { + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck3_reg>; + regulator-coupled-max-spread = <300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-coupled-with = <&buck2_reg>; + regulator-coupled-max-spread = <300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1v35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_emmc"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2v"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + ldo1_reg: LDO1 { + regulator-name = "vdd_1v0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo2_reg: LDO2 { + regulator-name = "vdd_1v2_2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo3_reg: LDO3 { + regulator-name = "vdd_1v8_3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + vqmmc_sdcard: ldo4_reg: LDO4 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_1v8_5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_1v8_6"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_1v8_7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo12_reg: LDO12 { + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo13_reg: LDO13 { + regulator-name = "vdd_ldo13"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = <MAX77802_OPMODE_LP>; + }; + }; + + ldo14_reg: LDO14 { + regulator-name = "vdd_ldo14"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo17_reg: LDO17 { + regulator-name = "vdd_g3ds"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo18_reg: LDO18 { + regulator-name = "ldo_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo19_reg: LDO19 { + regulator-name = "ldo_19"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo20_reg: LDO20 { + regulator-name = "ldo_20"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo21_reg: LDO21 { + regulator-name = "ldo_21"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo23_reg: LDO23 { + regulator-name = "ldo_23"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + ldo24_reg: LDO24 { + regulator-name = "ldo_24"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo25_reg: LDO25 { + regulator-name = "ldo_25"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ldo26_reg: LDO26 { + regulator-name = "ldo_26"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo27_reg: LDO27 { + regulator-name = "ldo_27"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo28_reg: LDO28 { + regulator-name = "ldo_28"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo29_reg: LDO29 { + regulator-name = "ldo_29"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ldo30_reg: LDO30 { + regulator-name = "vdd_mifs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + ldo32_reg: LDO32 { + regulator-name = "ldo_32"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo33_reg: LDO33 { + regulator-name = "ldo_33"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + ldo34_reg: LDO34 { + regulator-name = "ldo_34"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ldo35_reg: LDO35 { + regulator-name = "ldo_35"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + }; + }; +}; + +&hsi2c_7 { + status = "okay"; + clock-frequency = <400000>; + + max98091: codec@10 { + compatible = "maxim,max98091"; + reg = <0x10>; + interrupts = <2 IRQ_TYPE_NONE>; + interrupt-parent = <&gpx0>; + pinctrl-names = "default"; + pinctrl-0 = <&max98091_irq>; + clocks = <&pmu_system_controller 0>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + }; + + light-sensor@44 { + compatible = "isil,isl29018"; + reg = <0x44>; + vcc-supply = <&tps65090_fet5>; + }; +}; + +&hsi2c_8 { + status = "okay"; + clock-frequency = <333000>; + /* Atmel mXT540S */ + trackpad@4b { + compatible = "atmel,maxtouch"; + reg = <0x4b>; + interrupt-parent = <&gpx1>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + wakeup-source; + pinctrl-names = "default"; + pinctrl-0 = <&trackpad_irq>; + linux,gpio-keymap = <KEY_RESERVED + KEY_RESERVED + KEY_RESERVED /* GPIO 0 */ + KEY_RESERVED /* GPIO 1 */ + BTN_LEFT /* GPIO 2 */ + KEY_RESERVED>; /* GPIO 3 */ + }; +}; + +&hsi2c_9 { + status = "okay"; + clock-frequency = <400000>; + + tpm@20 { + compatible = "infineon,slb9645tt"; + reg = <0x20>; + + /* Unused irq; but still need to configure the pins */ + pinctrl-names = "default"; + pinctrl-0 = <&tpm_irq>; + }; +}; + +&i2c_2 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + samsung,i2c-slave-addr = <0x50>; +}; + +&i2s0 { + assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>; + assigned-clock-parents = <&clock_audss EXYNOS_I2S_BUS>; + status = "okay"; +}; + +&mixer { + status = "okay"; +}; + +/* eMMC flash */ +&mmc_0 { + status = "okay"; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cap-mmc-highspeed; + non-removable; + clock-frequency = <800000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + samsung,dw-mshc-hs400-timing = <0 2>; + samsung,read-strobe-delay = <90>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>; + bus-width = <8>; +}; + +/* WiFi SDIO module */ +&mmc_1 { + status = "okay"; + non-removable; + cap-sdio-irq; + keep-power-in-suspend; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <1>; + samsung,dw-mshc-sdr-timing = <0 1>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_int>, <&sd1_bus1>, + <&sd1_bus4>, <&sd1_bus8>, <&wifi_en>; + bus-width = <4>; + cap-sd-highspeed; + mmc-pwrseq = <&mmc1_pwrseq>; + vqmmc-supply = <&buck10_reg>; +}; + +/* uSD card */ +&mmc_2 { + status = "okay"; + cap-sd-highspeed; + card-detect-delay = <200>; + clock-frequency = <400000000>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + bus-width = <4>; +}; + + +&pinctrl_0 { + pinctrl-names = "default"; + pinctrl-0 = <&mask_tpm_reset>; + + wifi_en: wifi-en { + samsung,pins = "gpx0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + max98091_irq: max98091-irq { + samsung,pins = "gpx0-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + /* We need GPX0_6 to be low at sleep time; just keep it low always */ + mask_tpm_reset: mask-tpm-reset { + samsung,pins = "gpx0-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + samsung,pin-val = <0>; + }; + + tpm_irq: tpm-irq { + samsung,pins = "gpx1-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + trackpad_irq: trackpad-irq { + samsung,pins = "gpx1-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + power_key_irq: power-key-irq { + samsung,pins = "gpx1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + ec_irq: ec-irq { + samsung,pins = "gpx1-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + tps65090_irq: tps65090-irq { + samsung,pins = "gpx2-5"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + dp_hpd_gpio: dp_hpd_gpio { + samsung,pins = "gpx2-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + max77802_irq: max77802-irq { + samsung,pins = "gpx3-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + lid_irq: lid-irq { + samsung,pins = "gpx3-4"; + samsung,pin-function = <EXYNOS_PIN_FUNC_F>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pmic_dvs_1: pmic-dvs-1 { + samsung,pins = "gpy7-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_1 { + /* Adjust WiFi drive strengths lower for EMI */ + sd1_clk: sd1-clk { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_cmd: sd1-cmd { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_bus1: sd1-bus-width1 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_bus4: sd1-bus-width4 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + sd1_bus8: sd1-bus-width8 { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; +}; + +&pinctrl_2 { + pmic_dvs_2: pmic-dvs-2 { + samsung,pins = "gpj4-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pmic_dvs_3: pmic-dvs-3 { + samsung,pins = "gpj4-3"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pinctrl_3 { + /* Drive SPI lines at x2 for better integrity */ + spi2-bus { + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + /* Drive SPI chip select at x2 for better integrity */ + ec_spi_cs: ec-spi-cs { + samsung,pins = "gpb1-2"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV3>; + }; + + usb300_vbus_en: usb300-vbus-en { + samsung,pins = "gph0-0"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + usb301_vbus_en: usb301-vbus-en { + samsung,pins = "gph0-1"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; + + pmic_selb: pmic-selb { + samsung,pins = "gph0-2", "gph0-3", "gph0-4", "gph0-5", + "gph0-6"; + samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; + }; +}; + +&pmu_system_controller { + assigned-clocks = <&pmu_system_controller 0>; + assigned-clock-parents = <&clock CLK_FIN_PLL>; +}; + +&rtc { + status = "okay"; + clocks = <&clock CLK_RTC>, <&max77802 MAX77802_CLK_32K_AP>; + clock-names = "rtc", "rtc_src"; +}; + &spi_2 { - spi-max-frequency = <3125000>; - spi-deactivate-delay = <200>; status = "okay"; num-cs = <1>; samsung,spi-src-clk = <0>; - cs-gpios = <&gpb1 2 0>; + cs-gpios = <&gpb1 2 GPIO_ACTIVE_HIGH>;
cros_ec: cros-ec@0 { compatible = "google,cros-ec-spi"; interrupt-parent = <&gpx1>; - interrupts = <5 0>; + interrupts = <5 IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = <&ec_spi_cs &ec_irq>; reg = <0>; - spi-half-duplex; - spi-max-timeout-ms = <1100>; - ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>; - - /* - * This describes the flash memory within the EC. Note - * that the STM32L flash erases to 0, not 0xff. - */ - #address-cells = <1>; - #size-cells = <1>; - flash@8000000 { - reg = <0x08000000 0x20000>; - erase-value = <0>; - }; + spi-max-frequency = <3125000>; + google,has-vbc-nvram;
controller-data { samsung,spi-feedback-delay = <1>; @@ -236,6 +974,26 @@ compatible = "ti,tps65090"; reg = <0x48>;
+ /* + * Config irq to disable internal pulls + * even though we run in polling mode. + */ + pinctrl-names = "default"; + pinctrl-0 = <&tps65090_irq>; + + vsys1-supply = <&vbat>; + vsys2-supply = <&vbat>; + vsys3-supply = <&vbat>; + infet1-supply = <&vbat>; + infet2-supply = <&tps65090_dcdc1>; + infet3-supply = <&tps65090_dcdc2>; + infet4-supply = <&tps65090_dcdc2>; + infet5-supply = <&tps65090_dcdc2>; + infet6-supply = <&tps65090_dcdc2>; + infet7-supply = <&tps65090_dcdc1>; + vsys-l1-supply = <&vbat>; + vsys-l2-supply = <&vbat>; + regulators { tps65090_dcdc1: dcdc1 { ti,enable-ext-control; @@ -286,4 +1044,58 @@ }; };
+&serial_3 { + status = "okay"; +}; + +&timer { + arm,cpu-registers-not-fw-configured; +}; + +&tmu_cpu0 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu1 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu2 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_cpu3 { + vtmu-supply = <&ldo10_reg>; +}; + +&tmu_gpu { + vtmu-supply = <&ldo10_reg>; +}; + +&usbdrd_dwc3_0 { + dr_mode = "host"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "host"; +}; + +&usbdrd_phy0 { + vbus-supply = <&usb300_vbus_reg>; +}; + +&usbdrd_phy1 { + vbus-supply = <&usb301_vbus_reg>; +}; + +/* + * Use longest HW watchdog in SoC (32 seconds) since the hardware + * watchdog provides no debugging information (compared to soft/hard + * lockup detectors) and so should be last resort. + */ +&watchdog { + timeout-sec = <32>; +}; + #include "cros-ec-keyboard.dtsi" +#include "cros-adc-thermistors.dtsi" diff --git a/arch/arm/dts/exynos5800.dtsi b/arch/arm/dts/exynos5800.dtsi new file mode 100644 index 000000000000..526729dad53f --- /dev/null +++ b/arch/arm/dts/exynos5800.dtsi @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung Exynos5800 SoC device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung Exynos5800 SoC device nodes are listed in this file. + * Exynos5800 based board files can include this file and provide + * values for board specfic bindings. + */ + +#include "exynos5420.dtsi" + +/ { + compatible = "samsung,exynos5800", "samsung,exynos5"; +}; + +&clock { + compatible = "samsung,exynos5800-clock", "syscon"; +}; + +&cluster_a15_opp_table { + opp-2000000000 { + opp-hz = /bits/ 64 <2000000000>; + opp-microvolt = <1312500 1312500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1900000000 { + opp-hz = /bits/ 64 <1900000000>; + opp-microvolt = <1262500 1262500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1237500 1237500 1500000>; + clock-latency-ns = <140000>; + }; + opp-1700000000 { + opp-microvolt = <1250000 1250000 1500000>; + }; + opp-1600000000 { + opp-microvolt = <1250000 1250000 1500000>; + }; + opp-1500000000 { + opp-microvolt = <1100000 1100000 1500000>; + }; + opp-1400000000 { + opp-microvolt = <1100000 1100000 1500000>; + }; + opp-1300000000 { + opp-microvolt = <1100000 1100000 1500000>; + }; + opp-1200000000 { + opp-microvolt = <1000000 1000000 1500000>; + }; + opp-1100000000 { + opp-microvolt = <1000000 1000000 1500000>; + }; + opp-1000000000 { + opp-microvolt = <1000000 1000000 1500000>; + }; + opp-900000000 { + opp-microvolt = <1000000 1000000 1500000>; + }; + opp-800000000 { + opp-microvolt = <900000 900000 1500000>; + }; + opp-700000000 { + opp-microvolt = <900000 900000 1500000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000 900000 1500000>; + clock-latency-ns = <140000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <900000 900000 1500000>; + clock-latency-ns = <140000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <900000 900000 1500000>; + clock-latency-ns = <140000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <900000 900000 1500000>; + clock-latency-ns = <140000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <900000 900000 1500000>; + clock-latency-ns = <140000>; + }; +}; + +&cluster_a7_opp_table { + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt = <1275000>; + clock-latency-ns = <140000>; + }; + opp-1300000000 { + opp-microvolt = <1250000>; + }; + opp-1200000000 { + opp-microvolt = <1250000>; + }; + opp-1100000000 { + opp-microvolt = <1250000>; + }; + opp-1000000000 { + opp-microvolt = <1100000>; + }; + opp-900000000 { + opp-microvolt = <1100000>; + }; + opp-800000000 { + opp-microvolt = <1100000>; + }; + opp-700000000 { + opp-microvolt = <1000000>; + }; + opp-600000000 { + opp-microvolt = <1000000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <140000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <140000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <900000>; + clock-latency-ns = <140000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <900000>; + clock-latency-ns = <140000>; + }; +}; + +&mfc { + compatible = "samsung,mfc-v8"; +}; + +&soc { + cam_pd: power-domain@10045100 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10045100 0x20>; + #power-domain-cells = <0>; + label = "CAM"; + }; +}; diff --git a/include/dt-bindings/clock/exynos-audss-clk.h b/include/dt-bindings/clock/exynos-audss-clk.h new file mode 100644 index 000000000000..eee9fcc6e6af --- /dev/null +++ b/include/dt-bindings/clock/exynos-audss-clk.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for Samsung audio subsystem + * clock controller. + * + * The constants defined in this header are being used in dts + * and exynos audss driver. + */ + +#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H +#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H + +#define EXYNOS_MOUT_AUDSS 0 +#define EXYNOS_MOUT_I2S 1 +#define EXYNOS_DOUT_SRP 2 +#define EXYNOS_DOUT_AUD_BUS 3 +#define EXYNOS_DOUT_I2S 4 +#define EXYNOS_SRP_CLK 5 +#define EXYNOS_I2S_BUS 6 +#define EXYNOS_SCLK_I2S 7 +#define EXYNOS_PCM_BUS 8 +#define EXYNOS_SCLK_PCM 9 +#define EXYNOS_ADMA 10 + +#define EXYNOS_AUDSS_MAX_CLKS 11 + +#endif diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h new file mode 100644 index 000000000000..e259cc01f22f --- /dev/null +++ b/include/dt-bindings/clock/exynos5250.h @@ -0,0 +1,181 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * Author: Andrzej Hajda a.hajda@samsung.com + * + * Device Tree binding constants for Exynos5250 clock controller. + */ + +#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5250_H +#define _DT_BINDINGS_CLOCK_EXYNOS_5250_H + +/* core clocks */ +#define CLK_FIN_PLL 1 +#define CLK_FOUT_APLL 2 +#define CLK_FOUT_MPLL 3 +#define CLK_FOUT_BPLL 4 +#define CLK_FOUT_GPLL 5 +#define CLK_FOUT_CPLL 6 +#define CLK_FOUT_EPLL 7 +#define CLK_FOUT_VPLL 8 +#define CLK_ARM_CLK 9 + +/* gate for special clocks (sclk) */ +#define CLK_SCLK_CAM_BAYER 128 +#define CLK_SCLK_CAM0 129 +#define CLK_SCLK_CAM1 130 +#define CLK_SCLK_GSCL_WA 131 +#define CLK_SCLK_GSCL_WB 132 +#define CLK_SCLK_FIMD1 133 +#define CLK_SCLK_MIPI1 134 +#define CLK_SCLK_DP 135 +#define CLK_SCLK_HDMI 136 +#define CLK_SCLK_PIXEL 137 +#define CLK_SCLK_AUDIO0 138 +#define CLK_SCLK_MMC0 139 +#define CLK_SCLK_MMC1 140 +#define CLK_SCLK_MMC2 141 +#define CLK_SCLK_MMC3 142 +#define CLK_SCLK_SATA 143 +#define CLK_SCLK_USB3 144 +#define CLK_SCLK_JPEG 145 +#define CLK_SCLK_UART0 146 +#define CLK_SCLK_UART1 147 +#define CLK_SCLK_UART2 148 +#define CLK_SCLK_UART3 149 +#define CLK_SCLK_PWM 150 +#define CLK_SCLK_AUDIO1 151 +#define CLK_SCLK_AUDIO2 152 +#define CLK_SCLK_SPDIF 153 +#define CLK_SCLK_SPI0 154 +#define CLK_SCLK_SPI1 155 +#define CLK_SCLK_SPI2 156 +#define CLK_DIV_I2S1 157 +#define CLK_DIV_I2S2 158 +#define CLK_SCLK_HDMIPHY 159 +#define CLK_DIV_PCM0 160 + +/* gate clocks */ +#define CLK_GSCL0 256 +#define CLK_GSCL1 257 +#define CLK_GSCL2 258 +#define CLK_GSCL3 259 +#define CLK_GSCL_WA 260 +#define CLK_GSCL_WB 261 +#define CLK_SMMU_GSCL0 262 +#define CLK_SMMU_GSCL1 263 +#define CLK_SMMU_GSCL2 264 +#define CLK_SMMU_GSCL3 265 +#define CLK_MFC 266 +#define CLK_SMMU_MFCL 267 +#define CLK_SMMU_MFCR 268 +#define CLK_ROTATOR 269 +#define CLK_JPEG 270 +#define CLK_MDMA1 271 +#define CLK_SMMU_ROTATOR 272 +#define CLK_SMMU_JPEG 273 +#define CLK_SMMU_MDMA1 274 +#define CLK_PDMA0 275 +#define CLK_PDMA1 276 +#define CLK_SATA 277 +#define CLK_USBOTG 278 +#define CLK_MIPI_HSI 279 +#define CLK_SDMMC0 280 +#define CLK_SDMMC1 281 +#define CLK_SDMMC2 282 +#define CLK_SDMMC3 283 +#define CLK_SROMC 284 +#define CLK_USB2 285 +#define CLK_USB3 286 +#define CLK_SATA_PHYCTRL 287 +#define CLK_SATA_PHYI2C 288 +#define CLK_UART0 289 +#define CLK_UART1 290 +#define CLK_UART2 291 +#define CLK_UART3 292 +#define CLK_UART4 293 +#define CLK_I2C0 294 +#define CLK_I2C1 295 +#define CLK_I2C2 296 +#define CLK_I2C3 297 +#define CLK_I2C4 298 +#define CLK_I2C5 299 +#define CLK_I2C6 300 +#define CLK_I2C7 301 +#define CLK_I2C_HDMI 302 +#define CLK_ADC 303 +#define CLK_SPI0 304 +#define CLK_SPI1 305 +#define CLK_SPI2 306 +#define CLK_I2S1 307 +#define CLK_I2S2 308 +#define CLK_PCM1 309 +#define CLK_PCM2 310 +#define CLK_PWM 311 +#define CLK_SPDIF 312 +#define CLK_AC97 313 +#define CLK_HSI2C0 314 +#define CLK_HSI2C1 315 +#define CLK_HSI2C2 316 +#define CLK_HSI2C3 317 +#define CLK_CHIPID 318 +#define CLK_SYSREG 319 +#define CLK_PMU 320 +#define CLK_CMU_TOP 321 +#define CLK_CMU_CORE 322 +#define CLK_CMU_MEM 323 +#define CLK_TZPC0 324 +#define CLK_TZPC1 325 +#define CLK_TZPC2 326 +#define CLK_TZPC3 327 +#define CLK_TZPC4 328 +#define CLK_TZPC5 329 +#define CLK_TZPC6 330 +#define CLK_TZPC7 331 +#define CLK_TZPC8 332 +#define CLK_TZPC9 333 +#define CLK_HDMI_CEC 334 +#define CLK_MCT 335 +#define CLK_WDT 336 +#define CLK_RTC 337 +#define CLK_TMU 338 +#define CLK_FIMD1 339 +#define CLK_MIE1 340 +#define CLK_DSIM0 341 +#define CLK_DP 342 +#define CLK_MIXER 343 +#define CLK_HDMI 344 +#define CLK_G2D 345 +#define CLK_MDMA0 346 +#define CLK_SMMU_MDMA0 347 +#define CLK_SSS 348 +#define CLK_G3D 349 +#define CLK_SMMU_TV 350 +#define CLK_SMMU_FIMD1 351 +#define CLK_SMMU_2D 352 +#define CLK_SMMU_FIMC_ISP 353 +#define CLK_SMMU_FIMC_DRC 354 +#define CLK_SMMU_FIMC_SCC 355 +#define CLK_SMMU_FIMC_SCP 356 +#define CLK_SMMU_FIMC_FD 357 +#define CLK_SMMU_FIMC_MCU 358 +#define CLK_SMMU_FIMC_ODC 359 +#define CLK_SMMU_FIMC_DIS0 360 +#define CLK_SMMU_FIMC_DIS1 361 +#define CLK_SMMU_FIMC_3DNR 362 +#define CLK_SMMU_FIMC_LITE0 363 +#define CLK_SMMU_FIMC_LITE1 364 +#define CLK_CAMIF_TOP 365 + +/* mux clocks */ +#define CLK_MOUT_HDMI 1024 +#define CLK_MOUT_GPLL 1025 +#define CLK_MOUT_ACLK200_DISP1_SUB 1026 +#define CLK_MOUT_ACLK300_DISP1_SUB 1027 +#define CLK_MOUT_APLL 1028 +#define CLK_MOUT_MPLL 1029 + +/* must be greater than maximal clock id */ +#define CLK_NR_CLKS 1030 + +#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */ diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h new file mode 100644 index 000000000000..9fffc6ceaadd --- /dev/null +++ b/include/dt-bindings/clock/exynos5420.h @@ -0,0 +1,277 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * Author: Andrzej Hajda a.hajda@samsung.com + * + * Device Tree binding constants for Exynos5420 clock controller. + */ + +#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5420_H +#define _DT_BINDINGS_CLOCK_EXYNOS_5420_H + +/* core clocks */ +#define CLK_FIN_PLL 1 +#define CLK_FOUT_APLL 2 +#define CLK_FOUT_CPLL 3 +#define CLK_FOUT_DPLL 4 +#define CLK_FOUT_EPLL 5 +#define CLK_FOUT_RPLL 6 +#define CLK_FOUT_IPLL 7 +#define CLK_FOUT_SPLL 8 +#define CLK_FOUT_VPLL 9 +#define CLK_FOUT_MPLL 10 +#define CLK_FOUT_BPLL 11 +#define CLK_FOUT_KPLL 12 +#define CLK_ARM_CLK 13 +#define CLK_KFC_CLK 14 + +/* gate for special clocks (sclk) */ +#define CLK_SCLK_UART0 128 +#define CLK_SCLK_UART1 129 +#define CLK_SCLK_UART2 130 +#define CLK_SCLK_UART3 131 +#define CLK_SCLK_MMC0 132 +#define CLK_SCLK_MMC1 133 +#define CLK_SCLK_MMC2 134 +#define CLK_SCLK_SPI0 135 +#define CLK_SCLK_SPI1 136 +#define CLK_SCLK_SPI2 137 +#define CLK_SCLK_I2S1 138 +#define CLK_SCLK_I2S2 139 +#define CLK_SCLK_PCM1 140 +#define CLK_SCLK_PCM2 141 +#define CLK_SCLK_SPDIF 142 +#define CLK_SCLK_HDMI 143 +#define CLK_SCLK_PIXEL 144 +#define CLK_SCLK_DP1 145 +#define CLK_SCLK_MIPI1 146 +#define CLK_SCLK_FIMD1 147 +#define CLK_SCLK_MAUDIO0 148 +#define CLK_SCLK_MAUPCM0 149 +#define CLK_SCLK_USBD300 150 +#define CLK_SCLK_USBD301 151 +#define CLK_SCLK_USBPHY300 152 +#define CLK_SCLK_USBPHY301 153 +#define CLK_SCLK_UNIPRO 154 +#define CLK_SCLK_PWM 155 +#define CLK_SCLK_GSCL_WA 156 +#define CLK_SCLK_GSCL_WB 157 +#define CLK_SCLK_HDMIPHY 158 +#define CLK_MAU_EPLL 159 +#define CLK_SCLK_HSIC_12M 160 +#define CLK_SCLK_MPHY_IXTAL24 161 +#define CLK_SCLK_BPLL 162 + +/* gate clocks */ +#define CLK_UART0 257 +#define CLK_UART1 258 +#define CLK_UART2 259 +#define CLK_UART3 260 +#define CLK_I2C0 261 +#define CLK_I2C1 262 +#define CLK_I2C2 263 +#define CLK_I2C3 264 +#define CLK_USI0 265 +#define CLK_USI1 266 +#define CLK_USI2 267 +#define CLK_USI3 268 +#define CLK_I2C_HDMI 269 +#define CLK_TSADC 270 +#define CLK_SPI0 271 +#define CLK_SPI1 272 +#define CLK_SPI2 273 +#define CLK_KEYIF 274 +#define CLK_I2S1 275 +#define CLK_I2S2 276 +#define CLK_PCM1 277 +#define CLK_PCM2 278 +#define CLK_PWM 279 +#define CLK_SPDIF 280 +#define CLK_USI4 281 +#define CLK_USI5 282 +#define CLK_USI6 283 +#define CLK_ACLK66_PSGEN 300 +#define CLK_CHIPID 301 +#define CLK_SYSREG 302 +#define CLK_TZPC0 303 +#define CLK_TZPC1 304 +#define CLK_TZPC2 305 +#define CLK_TZPC3 306 +#define CLK_TZPC4 307 +#define CLK_TZPC5 308 +#define CLK_TZPC6 309 +#define CLK_TZPC7 310 +#define CLK_TZPC8 311 +#define CLK_TZPC9 312 +#define CLK_HDMI_CEC 313 +#define CLK_SECKEY 314 +#define CLK_MCT 315 +#define CLK_WDT 316 +#define CLK_RTC 317 +#define CLK_TMU 318 +#define CLK_TMU_GPU 319 +#define CLK_PCLK66_GPIO 330 +#define CLK_ACLK200_FSYS2 350 +#define CLK_MMC0 351 +#define CLK_MMC1 352 +#define CLK_MMC2 353 +#define CLK_SROMC 354 +#define CLK_UFS 355 +#define CLK_ACLK200_FSYS 360 +#define CLK_TSI 361 +#define CLK_PDMA0 362 +#define CLK_PDMA1 363 +#define CLK_RTIC 364 +#define CLK_USBH20 365 +#define CLK_USBD300 366 +#define CLK_USBD301 367 +#define CLK_ACLK400_MSCL 380 +#define CLK_MSCL0 381 +#define CLK_MSCL1 382 +#define CLK_MSCL2 383 +#define CLK_SMMU_MSCL0 384 +#define CLK_SMMU_MSCL1 385 +#define CLK_SMMU_MSCL2 386 +#define CLK_ACLK333 400 +#define CLK_MFC 401 +#define CLK_SMMU_MFCL 402 +#define CLK_SMMU_MFCR 403 +#define CLK_ACLK200_DISP1 410 +#define CLK_DSIM1 411 +#define CLK_DP1 412 +#define CLK_HDMI 413 +#define CLK_ACLK300_DISP1 420 +#define CLK_FIMD1 421 +#define CLK_SMMU_FIMD1M0 422 +#define CLK_SMMU_FIMD1M1 423 +#define CLK_ACLK166 430 +#define CLK_MIXER 431 +#define CLK_ACLK266 440 +#define CLK_ROTATOR 441 +#define CLK_MDMA1 442 +#define CLK_SMMU_ROTATOR 443 +#define CLK_SMMU_MDMA1 444 +#define CLK_ACLK300_JPEG 450 +#define CLK_JPEG 451 +#define CLK_JPEG2 452 +#define CLK_SMMU_JPEG 453 +#define CLK_SMMU_JPEG2 454 +#define CLK_ACLK300_GSCL 460 +#define CLK_SMMU_GSCL0 461 +#define CLK_SMMU_GSCL1 462 +#define CLK_GSCL_WA 463 +#define CLK_GSCL_WB 464 +#define CLK_GSCL0 465 +#define CLK_GSCL1 466 +#define CLK_FIMC_3AA 467 +#define CLK_ACLK266_G2D 470 +#define CLK_SSS 471 +#define CLK_SLIM_SSS 472 +#define CLK_MDMA0 473 +#define CLK_ACLK333_G2D 480 +#define CLK_G2D 481 +#define CLK_ACLK333_432_GSCL 490 +#define CLK_SMMU_3AA 491 +#define CLK_SMMU_FIMCL0 492 +#define CLK_SMMU_FIMCL1 493 +#define CLK_SMMU_FIMCL3 494 +#define CLK_FIMC_LITE3 495 +#define CLK_FIMC_LITE0 496 +#define CLK_FIMC_LITE1 497 +#define CLK_ACLK_G3D 500 +#define CLK_G3D 501 +#define CLK_SMMU_MIXER 502 +#define CLK_SMMU_G2D 503 +#define CLK_SMMU_MDMA0 504 +#define CLK_MC 505 +#define CLK_TOP_RTC 506 +#define CLK_SCLK_UART_ISP 510 +#define CLK_SCLK_SPI0_ISP 511 +#define CLK_SCLK_SPI1_ISP 512 +#define CLK_SCLK_PWM_ISP 513 +#define CLK_SCLK_ISP_SENSOR0 514 +#define CLK_SCLK_ISP_SENSOR1 515 +#define CLK_SCLK_ISP_SENSOR2 516 +#define CLK_ACLK432_SCALER 517 +#define CLK_ACLK432_CAM 518 +#define CLK_ACLK_FL1550_CAM 519 +#define CLK_ACLK550_CAM 520 +#define CLK_CLKM_PHY0 521 +#define CLK_CLKM_PHY1 522 +#define CLK_ACLK_PPMU_DREX0_0 523 +#define CLK_ACLK_PPMU_DREX0_1 524 +#define CLK_ACLK_PPMU_DREX1_0 525 +#define CLK_ACLK_PPMU_DREX1_1 526 +#define CLK_PCLK_PPMU_DREX0_0 527 +#define CLK_PCLK_PPMU_DREX0_1 528 +#define CLK_PCLK_PPMU_DREX1_0 529 +#define CLK_PCLK_PPMU_DREX1_1 530 + +/* mux clocks */ +#define CLK_MOUT_HDMI 640 +#define CLK_MOUT_G3D 641 +#define CLK_MOUT_VPLL 642 +#define CLK_MOUT_MAUDIO0 643 +#define CLK_MOUT_USER_ACLK333 644 +#define CLK_MOUT_SW_ACLK333 645 +#define CLK_MOUT_USER_ACLK200_DISP1 646 +#define CLK_MOUT_SW_ACLK200 647 +#define CLK_MOUT_USER_ACLK300_DISP1 648 +#define CLK_MOUT_SW_ACLK300 649 +#define CLK_MOUT_USER_ACLK400_DISP1 650 +#define CLK_MOUT_SW_ACLK400 651 +#define CLK_MOUT_USER_ACLK300_GSCL 652 +#define CLK_MOUT_SW_ACLK300_GSCL 653 +#define CLK_MOUT_MCLK_CDREX 654 +#define CLK_MOUT_BPLL 655 +#define CLK_MOUT_MX_MSPLL_CCORE 656 +#define CLK_MOUT_EPLL 657 +#define CLK_MOUT_MAU_EPLL 658 +#define CLK_MOUT_USER_MAU_EPLL 659 +#define CLK_MOUT_SCLK_SPLL 660 +#define CLK_MOUT_MX_MSPLL_CCORE_PHY 661 +#define CLK_MOUT_SW_ACLK_G3D 662 +#define CLK_MOUT_APLL 663 +#define CLK_MOUT_MSPLL_CPU 664 +#define CLK_MOUT_KPLL 665 +#define CLK_MOUT_MSPLL_KFC 666 + + +/* divider clocks */ +#define CLK_DOUT_PIXEL 768 +#define CLK_DOUT_ACLK400_WCORE 769 +#define CLK_DOUT_ACLK400_ISP 770 +#define CLK_DOUT_ACLK400_MSCL 771 +#define CLK_DOUT_ACLK200 772 +#define CLK_DOUT_ACLK200_FSYS2 773 +#define CLK_DOUT_ACLK100_NOC 774 +#define CLK_DOUT_PCLK200_FSYS 775 +#define CLK_DOUT_ACLK200_FSYS 776 +#define CLK_DOUT_ACLK333_432_GSCL 777 +#define CLK_DOUT_ACLK333_432_ISP 778 +#define CLK_DOUT_ACLK66 779 +#define CLK_DOUT_ACLK333_432_ISP0 780 +#define CLK_DOUT_ACLK266 781 +#define CLK_DOUT_ACLK166 782 +#define CLK_DOUT_ACLK333 783 +#define CLK_DOUT_ACLK333_G2D 784 +#define CLK_DOUT_ACLK266_G2D 785 +#define CLK_DOUT_ACLK_G3D 786 +#define CLK_DOUT_ACLK300_JPEG 787 +#define CLK_DOUT_ACLK300_DISP1 788 +#define CLK_DOUT_ACLK300_GSCL 789 +#define CLK_DOUT_ACLK400_DISP1 790 +#define CLK_DOUT_PCLK_CDREX 791 +#define CLK_DOUT_SCLK_CDREX 792 +#define CLK_DOUT_ACLK_CDREX1 793 +#define CLK_DOUT_CCLK_DREX0 794 +#define CLK_DOUT_CLK2X_PHY0 795 +#define CLK_DOUT_PCLK_CORE_MEM 796 +#define CLK_FF_DOUT_SPLL2 797 +#define CLK_DOUT_PCLK_DREX0 798 +#define CLK_DOUT_PCLK_DREX1 799 + +/* must be greater than maximal clock id */ +#define CLK_NR_CLKS 800 + +#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5420_H */ diff --git a/include/dt-bindings/clock/maxim,max77686.h b/include/dt-bindings/clock/maxim,max77686.h new file mode 100644 index 000000000000..af8261dcace1 --- /dev/null +++ b/include/dt-bindings/clock/maxim,max77686.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2014 Google, Inc + * + * Device Tree binding constants clocks for the Maxim 77686 PMIC. + */ + +#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H +#define _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H + +/* Fixed rate clocks. */ + +#define MAX77686_CLK_AP 0 +#define MAX77686_CLK_CP 1 +#define MAX77686_CLK_PMIC 2 + +/* Total number of clocks. */ +#define MAX77686_CLKS_NUM (MAX77686_CLK_PMIC + 1) + +#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77686_CLOCK_H */ diff --git a/include/dt-bindings/clock/samsung,s2mps11.h b/include/dt-bindings/clock/samsung,s2mps11.h new file mode 100644 index 000000000000..5ece35d429ff --- /dev/null +++ b/include/dt-bindings/clock/samsung,s2mps11.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2015 Markus Reichl + * + * Device Tree binding constants clocks for the Samsung S2MPS11 PMIC. + */ + +#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H +#define _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H + +/* Fixed rate clocks. */ + +#define S2MPS11_CLK_AP 0 +#define S2MPS11_CLK_CP 1 +#define S2MPS11_CLK_BT 2 + +/* Total number of clocks. */ +#define S2MPS11_CLKS_NUM (S2MPS11_CLK_BT + 1) + +#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S2MPS11_CLOCK_H */ diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h new file mode 100644 index 000000000000..b1832506b923 --- /dev/null +++ b/include/dt-bindings/pinctrl/samsung.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung's Exynos pinctrl bindings + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Author: Krzysztof Kozlowski krzk@kernel.org + */ + +#ifndef __DT_BINDINGS_PINCTRL_SAMSUNG_H__ +#define __DT_BINDINGS_PINCTRL_SAMSUNG_H__ + +#define EXYNOS_PIN_PULL_NONE 0 +#define EXYNOS_PIN_PULL_DOWN 1 +#define EXYNOS_PIN_PULL_UP 3 + +#define S3C64XX_PIN_PULL_NONE 0 +#define S3C64XX_PIN_PULL_DOWN 1 +#define S3C64XX_PIN_PULL_UP 2 + +/* Pin function in power down mode */ +#define EXYNOS_PIN_PDN_OUT0 0 +#define EXYNOS_PIN_PDN_OUT1 1 +#define EXYNOS_PIN_PDN_INPUT 2 +#define EXYNOS_PIN_PDN_PREV 3 + +/* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ +#define EXYNOS4_PIN_DRV_LV1 0 +#define EXYNOS4_PIN_DRV_LV2 2 +#define EXYNOS4_PIN_DRV_LV3 1 +#define EXYNOS4_PIN_DRV_LV4 3 + +/* Drive strengths for Exynos5260 */ +#define EXYNOS5260_PIN_DRV_LV1 0 +#define EXYNOS5260_PIN_DRV_LV2 1 +#define EXYNOS5260_PIN_DRV_LV4 2 +#define EXYNOS5260_PIN_DRV_LV6 3 + +/* Drive strengths for Exynos5410, Exynos542x and Exynos5800 */ +#define EXYNOS5420_PIN_DRV_LV1 0 +#define EXYNOS5420_PIN_DRV_LV2 1 +#define EXYNOS5420_PIN_DRV_LV3 2 +#define EXYNOS5420_PIN_DRV_LV4 3 + +/* Drive strengths for Exynos5433 */ +#define EXYNOS5433_PIN_DRV_FAST_SR1 0 +#define EXYNOS5433_PIN_DRV_FAST_SR2 1 +#define EXYNOS5433_PIN_DRV_FAST_SR3 2 +#define EXYNOS5433_PIN_DRV_FAST_SR4 3 +#define EXYNOS5433_PIN_DRV_FAST_SR5 4 +#define EXYNOS5433_PIN_DRV_FAST_SR6 5 +#define EXYNOS5433_PIN_DRV_SLOW_SR1 8 +#define EXYNOS5433_PIN_DRV_SLOW_SR2 9 +#define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa +#define EXYNOS5433_PIN_DRV_SLOW_SR4 0xb +#define EXYNOS5433_PIN_DRV_SLOW_SR5 0xc +#define EXYNOS5433_PIN_DRV_SLOW_SR6 0xf + +#define EXYNOS_PIN_FUNC_INPUT 0 +#define EXYNOS_PIN_FUNC_OUTPUT 1 +#define EXYNOS_PIN_FUNC_2 2 +#define EXYNOS_PIN_FUNC_3 3 +#define EXYNOS_PIN_FUNC_4 4 +#define EXYNOS_PIN_FUNC_5 5 +#define EXYNOS_PIN_FUNC_6 6 +#define EXYNOS_PIN_FUNC_EINT 0xf +#define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT + +/* Drive strengths for Exynos7 FSYS1 block */ +#define EXYNOS7_FSYS1_PIN_DRV_LV1 0 +#define EXYNOS7_FSYS1_PIN_DRV_LV2 4 +#define EXYNOS7_FSYS1_PIN_DRV_LV3 2 +#define EXYNOS7_FSYS1_PIN_DRV_LV4 6 +#define EXYNOS7_FSYS1_PIN_DRV_LV5 1 +#define EXYNOS7_FSYS1_PIN_DRV_LV6 5 + +#endif /* __DT_BINDINGS_PINCTRL_SAMSUNG_H__ */ diff --git a/include/dt-bindings/sound/samsung-i2s.h b/include/dt-bindings/sound/samsung-i2s.h new file mode 100644 index 000000000000..250de0d6c734 --- /dev/null +++ b/include/dt-bindings/sound/samsung-i2s.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _DT_BINDINGS_SAMSUNG_I2S_H +#define _DT_BINDINGS_SAMSUNG_I2S_H + +#define CLK_I2S_CDCLK 0 /* the CDCLK (CODECLKO) gate clock */ + +#define CLK_I2S_RCLK_SRC 1 /* the RCLKSRC mux clock (corresponding to + * RCLKSRC bit in IISMOD register) + */ + +#define CLK_I2S_RCLK_PSR 2 /* the RCLK prescaler divider clock + * (corresponding to the IISPSR register) + */ + +#endif /* _DT_BINDINGS_SAMSUNG_I2S_H */
Add hardkernel,odroid-xu3 compatible. Linux kernel device-tree is using it.
Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- board/samsung/common/exynos5-dt-types.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c index 554fc91cc1a3..d75ec4251c49 100644 --- a/board/samsung/common/exynos5-dt-types.c +++ b/board/samsung/common/exynos5-dt-types.c @@ -21,6 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
static const struct udevice_id board_ids[] = { { .compatible = "samsung,odroidxu3", .data = EXYNOS5_BOARD_ODROID_XU3 }, + { .compatible = "hardkernel,odroid-xu3", .data = EXYNOS5_BOARD_ODROID_XU3 }, { .compatible = "samsung,exynos5", .data = EXYNOS5_BOARD_GENERIC }, { }, };
Add exynos5420 compatible. It's from Linux kernel.
Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- drivers/mmc/exynos_dw_mmc.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 544798bb71d1..526c30d2fe0f 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -241,6 +241,8 @@ static int exynos_dwmmc_bind(struct udevice *dev) }
static const struct udevice_id exynos_dwmmc_ids[] = { + { .compatible = "samsung,exynos5420-dw-mshc-smu" }, + { .compatible = "samsung,exynos5420-dw-mshc" }, { .compatible = "samsung,exynos4412-dw-mshc" }, { .compatible = "samsung,exynos-dwmmc" }, { }
Remove error message and not return when there is error value. After checked whether error is or not, if be, use default value.
Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- drivers/mmc/exynos_dw_mmc.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 526c30d2fe0f..49e57f695029 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -182,18 +182,12 @@ static int exynos_dwmci_get_config(const void *blob, int node,
/* Extract the timing info from the node */ err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); - if (err) { - printf("DWMMC%d: Can't get sdr-timings for devider\n", - host->dev_index); - return -EINVAL; - } - priv->sdr_timing = (DWMCI_SET_SAMPLE_CLK(timing[0]) | DWMCI_SET_DRV_CLK(timing[1]) | DWMCI_SET_DIV_RATIO(timing[2]));
/* sdr_timing didn't assigned anything, use the default value */ - if (!priv->sdr_timing) { + if (err || !priv->sdr_timing) { if (host->dev_index == 0) priv->sdr_timing = DWMMC_MMC0_SDR_TIMING_VAL; else if (host->dev_index == 2)
Add samsung,exynos5250-hsi2c compatible.
Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- drivers/i2c/exynos_hs_i2c.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c index 39bcacc17a7e..2ed1245bb3ab 100644 --- a/drivers/i2c/exynos_hs_i2c.c +++ b/drivers/i2c/exynos_hs_i2c.c @@ -550,6 +550,7 @@ static const struct dm_i2c_ops exynos_hs_i2c_ops = { };
static const struct udevice_id exynos_hs_i2c_ids[] = { + { .compatible = "samsung,exynos5250-hsi2c" }, { .compatible = "samsung,exynos5-hsi2c" }, { } };
Change the subnode name from voltage-regulators to regulators.
Signed-off-by: Jaehoon Chung jh80.chung@samsung.com --- drivers/power/pmic/s2mps11.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c index 1ba1640a8df3..4098a2bed671 100644 --- a/drivers/power/pmic/s2mps11.c +++ b/drivers/power/pmic/s2mps11.c @@ -52,7 +52,7 @@ static int s2mps11_probe(struct udevice *dev) ofnode regulators_node; int children;
- regulators_node = dev_read_subnode(dev, "voltage-regulators"); + regulators_node = dev_read_subnode(dev, "regulators"); if (!ofnode_valid(regulators_node)) { debug("%s: %s regulators subnode not found!\n", __func__, dev->name);
Hi,
On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung jh80.chung@samsung.com wrote:
Exynos5 is using old devicetree file for only U-boot. It's difficult to adjust the driver-model and sync codes with linux. This patchset is to copy exynos5 devicetree files from linux v5.16.
I don't have all exynos5 boards, so it's difficult to check whether all boards are working fine or not. If this is worthful job, I will work this continously. Otherwise, I will drop this RFC patches.
Tested on XU3 boards.
Nice work! It looks good to me. It would be nice to check other boards as well.
Jaehoon Chung (6): ARM: exynos5: sync devicetree files from linux kernel board: exynos5-dt-type: add hardkernel,odroid-xu3 compatible mmc: exynos_dw_mmc: add exynos5420 compatible mmc: exynos_dw_mmc: remove the error message and not return i2c: exynos_hs_i2c: add samsung,exynos5250-hsi2c compatible power: s2pms11: change the subnode name to regulators
arch/arm/dts/cros-adc-thermistors.dtsi | 41 + arch/arm/dts/exynos-syscon-restart.dtsi | 20 + arch/arm/dts/exynos4-cpu-thermal.dtsi | 48 + arch/arm/dts/exynos5.dtsi | 384 ++--- arch/arm/dts/exynos5250-arndale.dts | 638 +++++++- arch/arm/dts/exynos5250-pinctrl.dtsi | 1080 +++++++++---- arch/arm/dts/exynos5250-smdk5250.dts | 367 +++-- arch/arm/dts/exynos5250-snow-common.dtsi | 709 +++++++++ arch/arm/dts/exynos5250-snow-rev5.dts | 56 + arch/arm/dts/exynos5250-snow.dts | 549 +------ arch/arm/dts/exynos5250-spring.dts | 677 ++++---- arch/arm/dts/exynos5250.dtsi | 1298 +++++++++++++-- arch/arm/dts/exynos5420-cpus.dtsi | 163 ++ arch/arm/dts/exynos5420-peach-pit.dts | 1228 ++++++++++---- arch/arm/dts/exynos5420-pinctrl.dtsi | 734 +++++++++ arch/arm/dts/exynos5420-smdk5420.dts | 488 ++++-- arch/arm/dts/exynos5420-trip-points.dtsi | 31 + arch/arm/dts/exynos5420.dtsi | 1413 +++++++++++++++++ arch/arm/dts/exynos5422-cpus.dtsi | 170 ++ arch/arm/dts/exynos5422-odroid-core.dtsi | 1071 +++++++++++++ arch/arm/dts/exynos5422-odroidxu3-audio.dtsi | 83 + arch/arm/dts/exynos5422-odroidxu3-common.dtsi | 505 ++++++ arch/arm/dts/exynos5422-odroidxu3-lite.dts | 127 ++ arch/arm/dts/exynos5422-odroidxu3.dts | 336 +--- arch/arm/dts/exynos5422-odroidxu4.dts | 92 ++ arch/arm/dts/exynos54xx-odroidxu-leds.dtsi | 48 + arch/arm/dts/exynos54xx.dtsi | 376 +++-- arch/arm/dts/exynos5800-peach-pi.dts | 1080 +++++++++++-- arch/arm/dts/exynos5800.dtsi | 162 ++ board/samsung/common/exynos5-dt-types.c | 1 + drivers/i2c/exynos_hs_i2c.c | 1 + drivers/mmc/exynos_dw_mmc.c | 10 +- drivers/power/pmic/s2mps11.c | 2 +- include/dt-bindings/clock/exynos-audss-clk.h | 27 + include/dt-bindings/clock/exynos5250.h | 181 +++ include/dt-bindings/clock/exynos5420.h | 277 ++++ include/dt-bindings/clock/maxim,max77686.h | 20 + include/dt-bindings/clock/samsung,s2mps11.h | 20 + include/dt-bindings/pinctrl/samsung.h | 77 + include/dt-bindings/sound/samsung-i2s.h | 15 + 40 files changed, 11944 insertions(+), 2661 deletions(-) create mode 100644 arch/arm/dts/cros-adc-thermistors.dtsi create mode 100644 arch/arm/dts/exynos-syscon-restart.dtsi create mode 100644 arch/arm/dts/exynos4-cpu-thermal.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-common.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-rev5.dts create mode 100644 arch/arm/dts/exynos5420-cpus.dtsi create mode 100644 arch/arm/dts/exynos5420-pinctrl.dtsi create mode 100644 arch/arm/dts/exynos5420-trip-points.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/dts/exynos5422-cpus.dtsi create mode 100644 arch/arm/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-audio.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-common.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-lite.dts create mode 100644 arch/arm/dts/exynos5422-odroidxu4.dts create mode 100644 arch/arm/dts/exynos54xx-odroidxu-leds.dtsi create mode 100644 arch/arm/dts/exynos5800.dtsi create mode 100644 include/dt-bindings/clock/exynos-audss-clk.h create mode 100644 include/dt-bindings/clock/exynos5250.h create mode 100644 include/dt-bindings/clock/exynos5420.h create mode 100644 include/dt-bindings/clock/maxim,max77686.h create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h create mode 100644 include/dt-bindings/pinctrl/samsung.h create mode 100644 include/dt-bindings/sound/samsung-i2s.h
-- 2.29.0
On 1/17/22 23:34, Minkyu Kang wrote:
Hi,
On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung jh80.chung@samsung.com wrote:
Exynos5 is using old devicetree file for only U-boot. It's difficult to adjust the driver-model and sync codes with linux. This patchset is to copy exynos5 devicetree files from linux v5.16.
I don't have all exynos5 boards, so it's difficult to check whether all boards are working fine or not. If this is worthful job, I will work this continously. Otherwise, I will drop this RFC patches.
Tested on XU3 boards.
Nice work! It looks good to me. It would be nice to check other boards as well.
I hope that more boards can be tested with kernel dt. But maybe.. this patch isn't stable..Because it should affect many things. So I want to know more opinion.
Best Regards Jaehoon Chung
Jaehoon Chung (6): ARM: exynos5: sync devicetree files from linux kernel board: exynos5-dt-type: add hardkernel,odroid-xu3 compatible mmc: exynos_dw_mmc: add exynos5420 compatible mmc: exynos_dw_mmc: remove the error message and not return i2c: exynos_hs_i2c: add samsung,exynos5250-hsi2c compatible power: s2pms11: change the subnode name to regulators
arch/arm/dts/cros-adc-thermistors.dtsi | 41 + arch/arm/dts/exynos-syscon-restart.dtsi | 20 + arch/arm/dts/exynos4-cpu-thermal.dtsi | 48 + arch/arm/dts/exynos5.dtsi | 384 ++--- arch/arm/dts/exynos5250-arndale.dts | 638 +++++++- arch/arm/dts/exynos5250-pinctrl.dtsi | 1080 +++++++++---- arch/arm/dts/exynos5250-smdk5250.dts | 367 +++-- arch/arm/dts/exynos5250-snow-common.dtsi | 709 +++++++++ arch/arm/dts/exynos5250-snow-rev5.dts | 56 + arch/arm/dts/exynos5250-snow.dts | 549 +------ arch/arm/dts/exynos5250-spring.dts | 677 ++++---- arch/arm/dts/exynos5250.dtsi | 1298 +++++++++++++-- arch/arm/dts/exynos5420-cpus.dtsi | 163 ++ arch/arm/dts/exynos5420-peach-pit.dts | 1228 ++++++++++---- arch/arm/dts/exynos5420-pinctrl.dtsi | 734 +++++++++ arch/arm/dts/exynos5420-smdk5420.dts | 488 ++++-- arch/arm/dts/exynos5420-trip-points.dtsi | 31 + arch/arm/dts/exynos5420.dtsi | 1413 +++++++++++++++++ arch/arm/dts/exynos5422-cpus.dtsi | 170 ++ arch/arm/dts/exynos5422-odroid-core.dtsi | 1071 +++++++++++++ arch/arm/dts/exynos5422-odroidxu3-audio.dtsi | 83 + arch/arm/dts/exynos5422-odroidxu3-common.dtsi | 505 ++++++ arch/arm/dts/exynos5422-odroidxu3-lite.dts | 127 ++ arch/arm/dts/exynos5422-odroidxu3.dts | 336 +--- arch/arm/dts/exynos5422-odroidxu4.dts | 92 ++ arch/arm/dts/exynos54xx-odroidxu-leds.dtsi | 48 + arch/arm/dts/exynos54xx.dtsi | 376 +++-- arch/arm/dts/exynos5800-peach-pi.dts | 1080 +++++++++++-- arch/arm/dts/exynos5800.dtsi | 162 ++ board/samsung/common/exynos5-dt-types.c | 1 + drivers/i2c/exynos_hs_i2c.c | 1 + drivers/mmc/exynos_dw_mmc.c | 10 +- drivers/power/pmic/s2mps11.c | 2 +- include/dt-bindings/clock/exynos-audss-clk.h | 27 + include/dt-bindings/clock/exynos5250.h | 181 +++ include/dt-bindings/clock/exynos5420.h | 277 ++++ include/dt-bindings/clock/maxim,max77686.h | 20 + include/dt-bindings/clock/samsung,s2mps11.h | 20 + include/dt-bindings/pinctrl/samsung.h | 77 + include/dt-bindings/sound/samsung-i2s.h | 15 + 40 files changed, 11944 insertions(+), 2661 deletions(-) create mode 100644 arch/arm/dts/cros-adc-thermistors.dtsi create mode 100644 arch/arm/dts/exynos-syscon-restart.dtsi create mode 100644 arch/arm/dts/exynos4-cpu-thermal.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-common.dtsi create mode 100644 arch/arm/dts/exynos5250-snow-rev5.dts create mode 100644 arch/arm/dts/exynos5420-cpus.dtsi create mode 100644 arch/arm/dts/exynos5420-pinctrl.dtsi create mode 100644 arch/arm/dts/exynos5420-trip-points.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/dts/exynos5422-cpus.dtsi create mode 100644 arch/arm/dts/exynos5422-odroid-core.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-audio.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-common.dtsi create mode 100644 arch/arm/dts/exynos5422-odroidxu3-lite.dts create mode 100644 arch/arm/dts/exynos5422-odroidxu4.dts create mode 100644 arch/arm/dts/exynos54xx-odroidxu-leds.dtsi create mode 100644 arch/arm/dts/exynos5800.dtsi create mode 100644 include/dt-bindings/clock/exynos-audss-clk.h create mode 100644 include/dt-bindings/clock/exynos5250.h create mode 100644 include/dt-bindings/clock/exynos5420.h create mode 100644 include/dt-bindings/clock/maxim,max77686.h create mode 100644 include/dt-bindings/clock/samsung,s2mps11.h create mode 100644 include/dt-bindings/pinctrl/samsung.h create mode 100644 include/dt-bindings/sound/samsung-i2s.h
-- 2.29.0
On Thu, Jan 27, 2022 at 07:33:36PM +0900, Jaehoon Chung wrote:
On 1/17/22 23:34, Minkyu Kang wrote:
Hi,
On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung jh80.chung@samsung.com wrote:
Exynos5 is using old devicetree file for only U-boot. It's difficult to adjust the driver-model and sync codes with linux. This patchset is to copy exynos5 devicetree files from linux v5.16.
I don't have all exynos5 boards, so it's difficult to check whether all boards are working fine or not. If this is worthful job, I will work this continously. Otherwise, I will drop this RFC patches.
Tested on XU3 boards.
Nice work! It looks good to me. It would be nice to check other boards as well.
I hope that more boards can be tested with kernel dt. But maybe.. this patch isn't stable..Because it should affect many things. So I want to know more opinion.
I feel like we need to take this now and then deal with the fallout if any of broken boards.
Hi,
On Thu, 27 Jan 2022 at 10:31, Tom Rini trini@konsulko.com wrote:
On Thu, Jan 27, 2022 at 07:33:36PM +0900, Jaehoon Chung wrote:
On 1/17/22 23:34, Minkyu Kang wrote:
Hi,
On Thu, 13 Jan 2022 at 17:39, Jaehoon Chung jh80.chung@samsung.com wrote:
Exynos5 is using old devicetree file for only U-boot. It's difficult to adjust the driver-model and sync codes with linux. This patchset is to copy exynos5 devicetree files from linux v5.16.
I don't have all exynos5 boards, so it's difficult to check whether all boards are working fine or not. If this is worthful job, I will work this continously. Otherwise, I will drop this RFC patches.
Tested on XU3 boards.
Nice work! It looks good to me. It would be nice to check other boards as well.
I hope that more boards can be tested with kernel dt. But maybe.. this patch isn't stable..Because it should affect many things. So I want to know more opinion.
I feel like we need to take this now and then deal with the fallout if any of broken boards.
This breaks snow, at least. I will take a look at why.
U-Boot 2022.01-00293-ga20c2ce0916 (Jan 27 2022 - 10:36:05 -0700) for snow
CPU: Exynos5250 @ 1.7 GHz Model: Google Snow DRAM: 2 GiB initcall sequence bffdd1b4 failed at call 43e03c01 (err=-1) ### ERROR ### Please RESET the board ###
Regards, Simon
participants (4)
-
Jaehoon Chung -
Minkyu Kang -
Simon Glass -
Tom Rini