When debugging drivers it is useful to see what I/O accesses were done and in what order.

Even if the individual accesses are of little interest it can be useful to verify that the access pattern is consistent each time an operation is performed. In this case a checksum can be used to characterise the operation of a driver. The checksum can be compared across different runs of the operation to verify that the driver is working properly.

In particular, when performing major refactoring of the driver, where the access pattern should not change, the checksum provides assurance that the refactoring work has not broken the driver.

Add an I/O tracing feature and associated commands to provide this facility. It works by sneaking into the io.h heder for an architecture and redirecting I/O accesses through its tracing mechanism.

For now no commands are provided to examine the trace buffer. The format is fairly simple, so 'md' is a reasonable substitute.

Note: The checksum feature is only useful for I/O regions where the contents do not change outside of software control. Where this is not suitable you can fall back to manually comparing the addresses. It might be useful to enhance tracing to only checksum the accesses and not the data read/written.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v5: None Changes in v4: None Changes in v3: - Remove use of bool in header file to avoid exynos5 build failure

Changes in v2: - Add a new patch for an I/O tracing feature

README | 23 +++++++ common/Makefile | 2 + common/cmd_iotrace.c | 73 ++++++++++++++++++++++ common/iotrace.c | 169 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/iotrace.h | 104 +++++++++++++++++++++++++++++++ 5 files changed, 371 insertions(+) create mode 100644 common/cmd_iotrace.c create mode 100644 common/iotrace.c create mode 100644 include/iotrace.h

diff --git a/README b/README index a248ab5..21605b8 100644 --- a/README +++ b/README @@ -1000,6 +1000,7 @@ The following options need to be configured: CONFIG_CMD_IMLS List all images found in NOR flash CONFIG_CMD_IMLS_NAND * List all images found in NAND flash CONFIG_CMD_IMMAP * IMMR dump support + CONFIG_CMD_IOTRACE * I/O tracing for debugging CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_INI * import data from an ini file into the env CONFIG_CMD_IRQ * irqinfo @@ -1171,6 +1172,28 @@ The following options need to be configured: Note that if the GPIO device uses I2C, then the I2C interface must also be configured. See I2C Support, below.

+- I/O tracing: + When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O + accesses and can checksum them or write a list of them out + to memory. See the 'iotrace' command for details. This is + useful for testing device drivers since it can confirm that + the driver behaves the same way before and after a code + change. Currently this is supported on sandbox and arm. To + add support for your architecture, add '#include <iotrace.h>' + to the bottom of arch/<arch>/include/asm/io.h and test. + + Example output from the 'iotrace stats' command is below. + Note that if the trace buffer is exhausted, the checksum will + still continue to operate. + + iotrace is enabled + Start: 10000000 (buffer start address) + Size: 00010000 (buffer size) + Offset: 00000120 (current buffer offset) + Output: 10000120 (start + offset) + Count: 00000018 (number of trace records) + CRC32: 9526fb66 (CRC32 of all trace records) + - Timestamp Support:

When CONFIG_TIMESTAMP is selected, the timestamp diff --git a/common/Makefile b/common/Makefile index 391a8d6..7e192c7 100644 --- a/common/Makefile +++ b/common/Makefile @@ -114,6 +114,7 @@ obj-$(CONFIG_CMD_FUSE) += cmd_fuse.o obj-$(CONFIG_CMD_GETTIME) += cmd_gettime.o obj-$(CONFIG_CMD_GPIO) += cmd_gpio.o obj-$(CONFIG_CMD_I2C) += cmd_i2c.o +obj-$(CONFIG_CMD_IOTRACE) += cmd_iotrace.o obj-$(CONFIG_CMD_HASH) += cmd_hash.o obj-$(CONFIG_CMD_IDE) += cmd_ide.o obj-$(CONFIG_CMD_IMMAP) += cmd_immap.o @@ -261,6 +262,7 @@ obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o obj-$(CONFIG_OF_LIBFDT) += image-fdt.o obj-$(CONFIG_FIT) += image-fit.o obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o +obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o obj-y += stdio.o

diff --git a/common/cmd_iotrace.c b/common/cmd_iotrace.c new file mode 100644 index 0000000..f54276d --- /dev/null +++ b/common/cmd_iotrace.c @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <iotrace.h> + +static void do_print_stats(void) +{ + ulong start, size, offset, count; + + printf("iotrace is %sabled\n", iotrace_get_enabled() ? "en" : "dis"); + iotrace_get_buffer(&start, &size, &offset, &count); + printf("Start: %08lx\n", start); + printf("Size: %08lx\n", size); + printf("Offset: %08lx\n", offset); + printf("Output: %08lx\n", start + offset); + printf("Count: %08lx\n", count); + printf("CRC32: %08lx\n", (ulong)iotrace_get_checksum()); +} + +static int do_set_buffer(int argc, char * const argv[]) +{ + ulong addr = 0, size = 0; + + if (argc == 2) { + addr = simple_strtoul(*argv++, NULL, 16); + size = simple_strtoul(*argv++, NULL, 16); + } else if (argc != 0) { + return CMD_RET_USAGE; + } + + iotrace_set_buffer(addr, size); + + return 0; +} + +int do_iotrace(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const char *cmd = argc < 2 ? NULL : argv[1]; + + if (!cmd) + return cmd_usage(cmdtp); + switch (*cmd) { + case 'b': + return do_set_buffer(argc - 2, argv + 2); + case 'p': + iotrace_set_enabled(0); + break; + case 'r': + iotrace_set_enabled(1); + break; + case 's': + do_print_stats(); + break; + default: + return CMD_RET_USAGE; + } + + return 0; +} + +U_BOOT_CMD( + iotrace, 4, 1, do_iotrace, + "iotrace utility commands", + "stats - display iotrace stats\n" + "iotrace buffer <address> <size> - set iotrace buffer\n" + "iotrace pause - pause tracing\n" + "iotrace resume - resume tracing" +); diff --git a/common/iotrace.c b/common/iotrace.c new file mode 100644 index 0000000..ced426e --- /dev/null +++ b/common/iotrace.c @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2014 Google, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#define IOTRACE_IMPL + +#include <common.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Support up to the machine word length for now */ +typedef ulong iovalue_t; + +enum iotrace_flags { + IOT_8 = 0, + IOT_16, + IOT_32, + + IOT_READ = 0 << 3, + IOT_WRITE = 1 << 3, +}; + +/** + * struct iotrace_record - Holds a single I/O trace record + * + * @flags: I/O access type + * @addr: Address of access + * @value: Value written or read + */ +struct iotrace_record { + enum iotrace_flags flags; + phys_addr_t addr; + iovalue_t value; +}; + +/** + * struct iotrace - current trace status and checksum + * + * @start: Start address of iotrace buffer + * @size: Size of iotrace buffer in bytes + * @offset: Current write offset into iotrace buffer + * @crc32: Current value of CRC chceksum of trace records + * @enabled: true if enabled, false if disabled + */ +static struct iotrace { + ulong start; + ulong size; + ulong offset; + u32 crc32; + bool enabled; +} iotrace; + +static void add_record(int flags, const void *ptr, ulong value) +{ + struct iotrace_record srec, *rec = &srec; + + /* + * We don't support iotrace before relocation. Since the trace buffer + * is set up by a command, it can't be enabled at present. To change + * this we would need to set the iotrace buffer at build-time. See + * lib/trace.c for how this might be done if you are interested. + */ + if (!(gd->flags & GD_FLG_RELOC) || !iotrace.enabled) + return; + + /* Store it if there is room */ + if (iotrace.offset + sizeof(*rec) < iotrace.size) { + rec = (struct iotrace_record *)map_sysmem( + iotrace.start + iotrace.offset, + sizeof(value)); + } + + rec->flags = flags; + rec->addr = map_to_sysmem(ptr); + rec->value = value; + + /* Update our checksum */ + iotrace.crc32 = crc32(iotrace.crc32, (unsigned char *)rec, + sizeof(*rec)); + + iotrace.offset += sizeof(struct iotrace_record); +} + +u32 iotrace_readl(const void *ptr) +{ + u32 v; + + v = readl(ptr); + add_record(IOT_32 | IOT_READ, ptr, v); + + return v; +} + +void iotrace_writel(ulong value, const void *ptr) +{ + add_record(IOT_32 | IOT_WRITE, ptr, value); + writel(value, ptr); +} + +u16 iotrace_readw(const void *ptr) +{ + u32 v; + + v = readw(ptr); + add_record(IOT_16 | IOT_READ, ptr, v); + + return v; +} + +void iotrace_writew(ulong value, const void *ptr) +{ + add_record(IOT_16 | IOT_WRITE, ptr, value); + writew(value, ptr); +} + +u8 iotrace_readb(const void *ptr) +{ + u32 v; + + v = readb(ptr); + add_record(IOT_8 | IOT_READ, ptr, v); + + return v; +} + +void iotrace_writeb(ulong value, const void *ptr) +{ + add_record(IOT_8 | IOT_WRITE, ptr, value); + writeb(value, ptr); +} + +void iotrace_reset_checksum(void) +{ + iotrace.crc32 = 0; +} + +u32 iotrace_get_checksum(void) +{ + return iotrace.crc32; +} + +void iotrace_set_enabled(int enable) +{ + iotrace.enabled = enable; +} + +int iotrace_get_enabled(void) +{ + return iotrace.enabled; +} + +void iotrace_set_buffer(ulong start, ulong size) +{ + iotrace.start = start; + iotrace.size = size; + iotrace.offset = 0; + iotrace.crc32 = 0; +} + +void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong *count) +{ + *start = iotrace.start; + *size = iotrace.size; + *offset = iotrace.offset; + *count = iotrace.offset / sizeof(struct iotrace_record); +} diff --git a/include/iotrace.h b/include/iotrace.h new file mode 100644 index 0000000..9bd1f16 --- /dev/null +++ b/include/iotrace.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2014 Google, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __IOTRACE_H +#define __IOTRACE_H + +#include <linux/types.h> + +/* + * This file is designed to be included in arch/<arch>/include/asm/io.h. + * It redirects all IO access through a tracing/checksumming feature for + * testing purposes. + */ + +#if defined(CONFIG_IO_TRACE) && !defined(IOTRACE_IMPL) && \ + !defined(CONFIG_SPL_BUILD) + +#undef readl +#define readl(addr) iotrace_readl((const void *)(addr)) + +#undef writel +#define writel(val, addr) iotrace_writel(val, (const void *)(addr)) + +#undef readw +#define readw(addr) iotrace_readw((const void *)(addr)) + +#undef writew +#define writew(val, addr) iotrace_writew(val, (const void *)(addr)) + +#undef readb +#define readb(addr) iotrace_readb((const void *)(addr)) + +#undef writeb +#define writeb(val, addr) iotrace_writeb(val, (const void *)(addr)) + +#endif + +/* Tracing functions which mirror their io.h counterparts */ +u32 iotrace_readl(const void *ptr); +void iotrace_writel(ulong value, const void *ptr); +u16 iotrace_readw(const void *ptr); +void iotrace_writew(ulong value, const void *ptr); +u8 iotrace_readb(const void *ptr); +void iotrace_writeb(ulong value, const void *ptr); + +/** + * iotrace_reset_checksum() - Reset the iotrace checksum + */ +void iotrace_reset_checksum(void); + +/** + * iotrace_get_checksum() - Get the current checksum value + * + * @return currect checksum value + */ +u32 iotrace_get_checksum(void); + +/** + * iotrace_set_enabled() - Set whether iotracing is enabled or not + * + * This controls whether the checksum is updated and a trace record added + * for each I/O access. + * + * @enable: true to enable iotracing, false to disable + */ +void iotrace_set_enabled(int enable); + +/** + * iotrace_get_enabled() - Get whether iotracing is enabled or not + * + * @return true if enabled, false if disabled + */ +int iotrace_get_enabled(void); + +/** + * iotrace_set_buffer() - Set position and size of iotrace buffer + * + * Defines where the iotrace buffer goes, and resets the output pointer to + * the start of the buffer. + * + * The buffer can be 0 size in which case the checksum is updated but no + * trace records are writen. If the buffer is exhausted, the offset will + * continue to increase but not new data will be written. + * + * @start: Start address of buffer + * @size: Size of buffer in bytes + */ +void iotrace_set_buffer(ulong start, ulong size); + +/** + * iotrace_get_buffer() - Get buffer information + * + * @start: Returns start address of buffer + * @size: Returns size of buffer in bytes + * @offset: Returns the byte offset where the next output trace record will + * @count: Returns the number of trace records recorded + * be written (or would be if the buffer was large enough) + */ +void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong *count); + +#endif /* __IOTRACE_H */

Support the iotrace feature for sandbox, and enable it, using some dummy I/O access methods.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v5: None Changes in v4: - Correct typo in CONFIG_CMD_IOTRACE

Changes in v3: None Changes in v2: - Add a new patch to enable iotrace for sandbox

arch/sandbox/include/asm/io.h | 10 ++++++++++ include/configs/sandbox.h | 3 +++ 2 files changed, 13 insertions(+)

diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 7956041..895fcb8 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -40,4 +40,14 @@ static inline void unmap_sysmem(const void *vaddr) /* Map from a pointer to our RAM buffer */ phys_addr_t map_to_sysmem(const void *ptr);

+/* Define nops for sandbox I/O access */ +#define readb(addr) 0 +#define readw(addr) 0 +#define readl(addr) 0 +#define writeb(v, addr) +#define writew(v, addr) +#define writel(v, addr) + +#include <iotrace.h> + #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 6bb2546..fdc8b75 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -16,6 +16,9 @@

#endif

+#define CONFIG_IO_TRACE +#define CONFIG_CMD_IOTRACE + #define CONFIG_SYS_TIMER_RATE 1000000

#define CONFIG_BOOTSTAGE

It is best to avoid having any occurence of 'struct device' in driver model, so rename to achieve this.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v5: None Changes in v4: - Add new patch to rename struct device_id to udevice_id

Changes in v3: None Changes in v2: None

doc/driver-model/README.txt | 2 +- drivers/core/lists.c | 2 +- drivers/demo/demo-shape.c | 2 +- drivers/demo/demo-simple.c | 2 +- drivers/gpio/sandbox.c | 2 +- include/dm/device.h | 6 +++--- test/dm/test-fdt.c | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/doc/driver-model/README.txt b/doc/driver-model/README.txt index dcecb9a..4af89b0 100644 --- a/doc/driver-model/README.txt +++ b/doc/driver-model/README.txt @@ -315,7 +315,7 @@ is little or no 'driver model' code to write. - Moved some data from code into data structure - e.g. store a pointer to the driver operations structure in the driver, rather than passing it to the driver bind function. -- Rename some structures to make them more similar to Linux (struct device +- Rename some structures to make them more similar to Linux (struct udevice instead of struct instance, struct platdata, etc.) - Change the name 'core' to 'uclass', meaning U-Boot class. It seems that this concept relates to a class of drivers (or a subsystem). We shouldn't diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 205b140..9f2917f 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -94,7 +94,7 @@ int lists_bind_drivers(struct udevice *parent) * tree error */ static int driver_check_compatible(const void *blob, int offset, - const struct device_id *of_match) + const struct udevice_id *of_match) { int ret;

diff --git a/drivers/demo/demo-shape.c b/drivers/demo/demo-shape.c index a68cc10..3fa9c59 100644 --- a/drivers/demo/demo-shape.c +++ b/drivers/demo/demo-shape.c @@ -111,7 +111,7 @@ static int shape_ofdata_to_platdata(struct udevice *dev) return 0; }

-static const struct device_id demo_shape_id[] = { +static const struct udevice_id demo_shape_id[] = { { "demo-shape", 0 }, { }, }; diff --git a/drivers/demo/demo-simple.c b/drivers/demo/demo-simple.c index 11def86..2bcb7df 100644 --- a/drivers/demo/demo-simple.c +++ b/drivers/demo/demo-simple.c @@ -32,7 +32,7 @@ static int demo_shape_ofdata_to_platdata(struct udevice *dev) return demo_parse_dt(dev); }

-static const struct device_id demo_shape_id[] = { +static const struct udevice_id demo_shape_id[] = { { "demo-simple", 0 }, { }, }; diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c index 09cebe2..75ada5d 100644 --- a/drivers/gpio/sandbox.c +++ b/drivers/gpio/sandbox.c @@ -239,7 +239,7 @@ static int gpio_sandbox_probe(struct udevice *dev) return 0; }

-static const struct device_id sandbox_gpio_ids[] = { +static const struct udevice_id sandbox_gpio_ids[] = { { .compatible = "sandbox,gpio" }, { } }; diff --git a/include/dm/device.h b/include/dm/device.h index ec04982..19f2039 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -75,11 +75,11 @@ struct udevice { #define device_active(dev) ((dev)->flags & DM_FLAG_ACTIVATED)

/** - * struct device_id - Lists the compatible strings supported by a driver + * struct udevice_id - Lists the compatible strings supported by a driver * @compatible: Compatible string * @data: Data for this compatible string */ -struct device_id { +struct udevice_id { const char *compatible; ulong data; }; @@ -121,7 +121,7 @@ struct device_id { struct driver { char *name; enum uclass_id id; - const struct device_id *of_match; + const struct udevice_id *of_match; int (*bind)(struct udevice *dev); int (*probe)(struct udevice *dev); int (*remove)(struct udevice *dev); diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 6eccf11..98e3936 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -53,7 +53,7 @@ static int testfdt_drv_probe(struct udevice *dev) return 0; }

-static const struct device_id testfdt_ids[] = { +static const struct udevice_id testfdt_ids[] = { { .compatible = "denx,u-boot-fdt-test", .data = DM_TEST_TYPE_FIRST },

We want 'N0' and 'n0' to mean the same thing, so ensure that case is not considered when naming GPIO banks.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: - Add new patch to use case-insensitive comparison for GPIO banks

drivers/gpio/gpio-uclass.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index fa2c2fb..f1bbc58 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -58,7 +58,7 @@ int gpio_lookup_name(const char *name, struct udevice **devp, uc_priv = dev->uclass_priv; len = uc_priv->bank_name ? strlen(uc_priv->bank_name) : 0;

- if (!strncmp(name, uc_priv->bank_name, len)) { + if (!strncasecmp(name, uc_priv->bank_name, len)) { if (strict_strtoul(name + len, 10, &offset)) continue; if (devp)

In a very few cases we need to adjust the driver model root device, such as when setting it up at initialisation. Add a macro to make this easier.

Signed-off-by: Simon Glass sjg@chromium.org ---

Changes in v5: None Changes in v4: None Changes in v3: - Fix typo in commit subject

Changes in v2: - Add new patch to deal with const-ness of the global_data pointer

drivers/core/root.c | 6 +++--- drivers/core/uclass.c | 2 +- include/dm/device-internal.h | 4 ++++ 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/core/root.c b/drivers/core/root.c index f31be72..70ea97f 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -43,9 +43,9 @@ int dm_init(void) dm_warn("Virtual root driver already exists!\n"); return -EINVAL; } - INIT_LIST_HEAD(&gd->uclass_root); + INIT_LIST_HEAD(&DM_UCLASS_ROOT());

- ret = device_bind_by_name(NULL, &root_info, &gd->dm_root); + ret = device_bind_by_name(NULL, &root_info, &DM_ROOT()); if (ret) return ret;

@@ -56,7 +56,7 @@ int dm_scan_platdata(void) { int ret;

- ret = lists_bind_drivers(gd->dm_root); + ret = lists_bind_drivers(DM_ROOT()); if (ret == -ENOENT) { dm_warn("Some drivers were not found\n"); ret = 0; diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index f6867e4..d16d6fc 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -75,7 +75,7 @@ static int uclass_add(enum uclass_id id, struct uclass **ucp) uc->uc_drv = uc_drv; INIT_LIST_HEAD(&uc->sibling_node); INIT_LIST_HEAD(&uc->dev_head); - list_add(&uc->sibling_node, &gd->uclass_root); + list_add(&uc->sibling_node, &DM_UCLASS_ROOT());

if (uc_drv->init) { ret = uc_drv->init(uc); diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h index ea3df36..67318fa 100644 --- a/include/dm/device-internal.h +++ b/include/dm/device-internal.h @@ -84,4 +84,8 @@ int device_remove(struct udevice *dev); */ int device_unbind(struct udevice *dev);

+/* Cast away any volatile pointer */ +#define DM_ROOT() (((gd_t *)gd)->dm_root) +#define DM_UCLASS_ROOT() (((gd_t *)gd)->uclass_root) + #endif

These files are taken from Linux 3.14.

Signed-off-by: Simon Glass sjg@chromium.org Acked-by: Stephen Warren swarren@nvidia.com ---

Changes in v5: None Changes in v4: - Remove 64-bit addresses which are not used in U-Boot

Changes in v3: - Bring in GPIO bindings for tegra{30,114,124} also

Changes in v2: - Add new patch to bring in Tegra device tree files from linux

arch/arm/dts/tegra114.dtsi | 21 +++++---- arch/arm/dts/tegra124.dtsi | 19 ++++---- arch/arm/dts/tegra20.dtsi | 15 ++++++- arch/arm/dts/tegra30.dtsi | 21 +++++---- include/dt-bindings/gpio/gpio.h | 15 +++++++ include/dt-bindings/gpio/tegra-gpio.h | 51 ++++++++++++++++++++++ include/dt-bindings/interrupt-controller/arm-gic.h | 22 ++++++++++ include/dt-bindings/interrupt-controller/irq.h | 19 ++++++++ 8 files changed, 155 insertions(+), 28 deletions(-) create mode 100644 include/dt-bindings/gpio/gpio.h create mode 100644 include/dt-bindings/gpio/tegra-gpio.h create mode 100644 include/dt-bindings/interrupt-controller/arm-gic.h create mode 100644 include/dt-bindings/interrupt-controller/irq.h

diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index f52fcf1..59434e0 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -1,3 +1,6 @@ +#include <dt-bindings/gpio/tegra-gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + #include "skeleton.dtsi"

/ { @@ -46,17 +49,17 @@ 0 143 0x04>; };

- gpio: gpio { + gpio: gpio@6000d000 { compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio"; reg = <0x6000d000 0x1000>; - interrupts = <0 32 0x04 - 0 33 0x04 - 0 34 0x04 - 0 35 0x04 - 0 55 0x04 - 0 87 0x04 - 0 89 0x04 - 0 125 0x04>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi index 18a8b24..4561c5f 100644 --- a/arch/arm/dts/tegra124.dtsi +++ b/arch/arm/dts/tegra124.dtsi @@ -1,3 +1,6 @@ +#include <dt-bindings/gpio/tegra-gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + #include "skeleton.dtsi"

/ { @@ -49,14 +52,14 @@ gpio: gpio@6000d000 { compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; reg = <0x6000d000 0x1000>; - interrupts = <0 32 0x04 - 0 33 0x04 - 0 34 0x04 - 0 35 0x04 - 0 55 0x04 - 0 87 0x04 - 0 89 0x04 - 0 125 0x04>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index 3805750..a524f6e 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -1,3 +1,6 @@ +#include <dt-bindings/gpio/tegra-gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + #include "skeleton.dtsi"

/ { @@ -139,10 +142,18 @@

gpio: gpio@6000d000 { compatible = "nvidia,tegra20-gpio"; - reg = < 0x6000d000 0x1000 >; - interrupts = < 64 65 66 67 87 119 121 >; + reg = <0x6000d000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; };

pinmux: pinmux@70000000 { diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index fee1c36..7be3791 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -1,3 +1,6 @@ +#include <dt-bindings/gpio/tegra-gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + #include "skeleton.dtsi"

/ { @@ -47,17 +50,17 @@ clocks = <&tegra_car 34>; };

- gpio: gpio { + gpio: gpio@6000d000 { compatible = "nvidia,tegra30-gpio"; reg = <0x6000d000 0x1000>; - interrupts = <0 32 0x04 - 0 33 0x04 - 0 34 0x04 - 0 35 0x04 - 0 55 0x04 - 0 87 0x04 - 0 89 0x04 - 0 125 0x04>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; #interrupt-cells = <2>; diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h new file mode 100644 index 0000000..e6b1e0a --- /dev/null +++ b/include/dt-bindings/gpio/gpio.h @@ -0,0 +1,15 @@ +/* + * This header provides constants for most GPIO bindings. + * + * Most GPIO bindings include a flags cell as part of the GPIO specifier. + * In most cases, the format of the flags cell uses the standard values + * defined in this header. + */ + +#ifndef _DT_BINDINGS_GPIO_GPIO_H +#define _DT_BINDINGS_GPIO_GPIO_H + +#define GPIO_ACTIVE_HIGH 0 +#define GPIO_ACTIVE_LOW 1 + +#endif diff --git a/include/dt-bindings/gpio/tegra-gpio.h b/include/dt-bindings/gpio/tegra-gpio.h new file mode 100644 index 0000000..197dc28 --- /dev/null +++ b/include/dt-bindings/gpio/tegra-gpio.h @@ -0,0 +1,51 @@ +/* + * This header provides constants for binding nvidia,tegra*-gpio. + * + * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below + * provide names for this. + * + * The second cell contains standard flag values specified in gpio.h. + */ + +#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H +#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H + +#include <dt-bindings/gpio/gpio.h> + +#define TEGRA_GPIO_BANK_ID_A 0 +#define TEGRA_GPIO_BANK_ID_B 1 +#define TEGRA_GPIO_BANK_ID_C 2 +#define TEGRA_GPIO_BANK_ID_D 3 +#define TEGRA_GPIO_BANK_ID_E 4 +#define TEGRA_GPIO_BANK_ID_F 5 +#define TEGRA_GPIO_BANK_ID_G 6 +#define TEGRA_GPIO_BANK_ID_H 7 +#define TEGRA_GPIO_BANK_ID_I 8 +#define TEGRA_GPIO_BANK_ID_J 9 +#define TEGRA_GPIO_BANK_ID_K 10 +#define TEGRA_GPIO_BANK_ID_L 11 +#define TEGRA_GPIO_BANK_ID_M 12 +#define TEGRA_GPIO_BANK_ID_N 13 +#define TEGRA_GPIO_BANK_ID_O 14 +#define TEGRA_GPIO_BANK_ID_P 15 +#define TEGRA_GPIO_BANK_ID_Q 16 +#define TEGRA_GPIO_BANK_ID_R 17 +#define TEGRA_GPIO_BANK_ID_S 18 +#define TEGRA_GPIO_BANK_ID_T 19 +#define TEGRA_GPIO_BANK_ID_U 20 +#define TEGRA_GPIO_BANK_ID_V 21 +#define TEGRA_GPIO_BANK_ID_W 22 +#define TEGRA_GPIO_BANK_ID_X 23 +#define TEGRA_GPIO_BANK_ID_Y 24 +#define TEGRA_GPIO_BANK_ID_Z 25 +#define TEGRA_GPIO_BANK_ID_AA 26 +#define TEGRA_GPIO_BANK_ID_BB 27 +#define TEGRA_GPIO_BANK_ID_CC 28 +#define TEGRA_GPIO_BANK_ID_DD 29 +#define TEGRA_GPIO_BANK_ID_EE 30 +#define TEGRA_GPIO_BANK_ID_FF 31 + +#define TEGRA_GPIO(bank, offset) \ + ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset) + +#endif diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h new file mode 100644 index 0000000..1ea1b70 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/arm-gic.h @@ -0,0 +1,22 @@ +/* + * This header provides constants for the ARM GIC. + */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H + +#include <dt-bindings/interrupt-controller/irq.h> + +/* interrupt specific cell 0 */ + +#define GIC_SPI 0 +#define GIC_PPI 1 + +/* + * Interrupt specifier cell 2. + * The flaggs in irq.h are valid, plus those below. + */ +#define GIC_CPU_MASK_RAW(x) ((x) << 8) +#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) + +#endif diff --git a/include/dt-bindings/interrupt-controller/irq.h b/include/dt-bindings/interrupt-controller/irq.h new file mode 100644 index 0000000..33a1003 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/irq.h @@ -0,0 +1,19 @@ +/* + * This header provides constants for most IRQ bindings. + * + * Most IRQ bindings include a flags cell as part of the IRQ specifier. + * In most cases, the format of the flags cell uses the standard values + * defined in this header. + */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_IRQ_H + +#define IRQ_TYPE_NONE 0 +#define IRQ_TYPE_EDGE_RISING 1 +#define IRQ_TYPE_EDGE_FALLING 2 +#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) +#define IRQ_TYPE_LEVEL_HIGH 4 +#define IRQ_TYPE_LEVEL_LOW 8 + +#endif

There is a spelling mistake and two functions are missing comments altogether. Also the flags declaration is correct, but doesn't follow style. Finally, the uclass_get_device() function has some errors in its documentation.

Fix these problems.

Signed-off-by: Simon Glass sjg@chromium.org Acked-by: Marek Vasut marex@denx.de ---

Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None

include/dm/device.h | 2 +- include/dm/lists.h | 20 ++++++++++++++++++++ include/dm/root.h | 2 +- include/dm/uclass.h | 6 ++++-- 4 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/include/dm/device.h b/include/dm/device.h index 19f2039..ae75a3f 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -21,7 +21,7 @@ struct driver_info; #define DM_FLAG_ACTIVATED (1 << 0)

/* DM is responsible for allocating and freeing platdata */ -#define DM_FLAG_ALLOC_PDATA (2 << 0) +#define DM_FLAG_ALLOC_PDATA (1 << 1)

/** * struct udevice - An instance of a driver diff --git a/include/dm/lists.h b/include/dm/lists.h index 7feba4b..49d87e6 100644 --- a/include/dm/lists.h +++ b/include/dm/lists.h @@ -32,8 +32,28 @@ struct driver *lists_driver_lookup_name(const char *name); */ struct uclass_driver *lists_uclass_lookup(enum uclass_id id);

+/** + * lists_bind_drivers() - search for and bind all drivers to parent + * + * This searches the U_BOOT_DEVICE() structures and creates new devices for + * each one. The devices will have @parent as their parent. + * + * @parent: parent driver (root) + * @early_only: If true, bind only drivers with the DM_INIT_F flag. If false + * bind all drivers. + */ int lists_bind_drivers(struct udevice *parent);

+/** + * lists_bind_fdt() - bind a device tree node + * + * This creates a new device bound to the given device tree node, with + * @parent as its parent. + * + * @parent: parent driver (root) + * @blob: device tree blob + * @offset: offset of this device tree node + */ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset);

#endif diff --git a/include/dm/root.h b/include/dm/root.h index 3018bc8..a4826a6 100644 --- a/include/dm/root.h +++ b/include/dm/root.h @@ -41,7 +41,7 @@ int dm_scan_platdata(void); int dm_scan_fdt(const void *blob);

/** - * dm_init() - Initialize Driver Model structures + * dm_init() - Initialise Driver Model structures * * This function will initialize roots of driver tree and class tree. * This needs to be called before anything uses the DM diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 931d9c0..0df2e5e 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -96,12 +96,14 @@ int uclass_get(enum uclass_id key, struct uclass **ucp); /** * uclass_get_device() - Get a uclass device based on an ID and index * + * The device is probed to activate it ready for use. + * * id: ID to look up * @index: Device number within that uclass (0=first) - * @ucp: Returns pointer to uclass (there is only one per for each ID) + * devp: Returns pointer to device (there is only one per for each ID) * @return 0 if OK, -ve on error */ -int uclass_get_device(enum uclass_id id, int index, struct udevice **ucp); +int uclass_get_device(enum uclass_id id, int index, struct udevice **devp);

/** * uclass_first_device() - Get the first device in a uclass