[PATCH 1/2] net: fec_mxc: Fix clk_ref rate on iMX93

From: Ye Li ye.li@nxp.com
Because iMX93 has a internal 1/2 divider before clock input to network controller, so have to set twice frequency rate
Fixes: 09de565f76b ("net: fec_mxc: support i.MX93") Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- drivers/net/fec_mxc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 0a0d92bc2cd..e5d7f0f3e1e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1215,6 +1215,9 @@ static int fecmxc_set_ref_clk(struct clk *clk_ref, phy_interface_t interface) else return -EINVAL;
+ if (is_imx93()) + freq = freq << 1; + ret = clk_set_rate(clk_ref, freq); if (ret < 0) return ret;

Hi,
On 23. 09. 24 15:14, Peng Fan (OSS) wrote:
From: Ye Li ye.li@nxp.com
Because iMX93 has a internal 1/2 divider before clock input to network controller, so have to set twice frequency rate
Fixes: 09de565f76b ("net: fec_mxc: support i.MX93") Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com
drivers/net/fec_mxc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 0a0d92bc2cd..e5d7f0f3e1e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1215,6 +1215,9 @@ static int fecmxc_set_ref_clk(struct clk *clk_ref, phy_interface_t interface) else return -EINVAL;
- if (is_imx93())
freq = freq << 1;
Humm, but how did it work so far?
On phyboard-segin-imx93, this change breaks fec ethernet.
I had to revert this already in NXP downstream u-boot.
BR, Primoz
- ret = clk_set_rate(clk_ref, freq); if (ret < 0) return ret;

Hi Peng,
On Mon, Sep 23, 2024 at 10:11 AM Primoz Fiser primoz.fiser@norik.com wrote:
Humm, but how did it work so far?
On phyboard-segin-imx93, this change breaks fec ethernet.
I had to revert this already in NXP downstream u-boot.
How does Linux handle this internal 1/2 divider?
Which board did you use to test this?
Since this causes a regression on phyboard-segin-imx93, we cannot apply it.
Please provide more details.

Subject: Re: [PATCH 1/2] net: fec_mxc: Fix clk_ref rate on iMX93
Hi Peng,
On Mon, Sep 23, 2024 at 10:11 AM Primoz Fiser primoz.fiser@norik.com wrote:
Humm, but how did it work so far?
On phyboard-segin-imx93, this change breaks fec ethernet.
I had to revert this already in NXP downstream u-boot.
How does Linux handle this internal 1/2 divider?
Linux assigned-clock-rates set 250MHz, then internal divider will set real clock to 125MHz.
Which board did you use to test this?
I tested this on i.MX93-11x11-EVK.
Since this causes a regression on phyboard-segin-imx93, we cannot apply it.
I will double check on this change. But I think this change is required.
See fecmxc_set_ref_clk. Depending on the mode, the freq will be different. I see segin using rmii mode, while imx93evk use rgmii-id mode. This might be the difference.
Regards, Peng.
Thanks, Peng.
Please provide more details.

Subject: Re: [PATCH 1/2] net: fec_mxc: Fix clk_ref rate on iMX93
Hi,
On 23. 09. 24 15:14, Peng Fan (OSS) wrote:
From: Ye Li ye.li@nxp.com
Because iMX93 has a internal 1/2 divider before clock input to
network
controller, so have to set twice frequency rate
Fixes: 09de565f76b ("net: fec_mxc: support i.MX93") Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com
drivers/net/fec_mxc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 0a0d92bc2cd..e5d7f0f3e1e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1215,6 +1215,9 @@ static int fecmxc_set_ref_clk(struct clk
*clk_ref, phy_interface_t interface)
else return -EINVAL;
- if (is_imx93())
freq = freq << 1;
Humm, but how did it work so far?
On phyboard-segin-imx93, this change breaks fec ethernet.
I had to revert this already in NXP downstream u-boot.
Ah. If you set enet_ref_clk to 250M, then you no need this change. Otherwise you need this change.
Regards, Peng.
BR, Primoz
- ret = clk_set_rate(clk_ref, freq); if (ret < 0) return ret;
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Subject: RE: [PATCH 1/2] net: fec_mxc: Fix clk_ref rate on iMX93
Subject: Re: [PATCH 1/2] net: fec_mxc: Fix clk_ref rate on iMX93
Hi,
On 23. 09. 24 15:14, Peng Fan (OSS) wrote:
From: Ye Li ye.li@nxp.com
Because iMX93 has a internal 1/2 divider before clock input to
network
controller, so have to set twice frequency rate
Fixes: 09de565f76b ("net: fec_mxc: support i.MX93") Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com
drivers/net/fec_mxc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 0a0d92bc2cd..e5d7f0f3e1e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1215,6 +1215,9 @@ static int fecmxc_set_ref_clk(struct clk
*clk_ref, phy_interface_t interface)
else return -EINVAL;
- if (is_imx93())
freq = freq << 1;
Humm, but how did it work so far?
On phyboard-segin-imx93, this change breaks fec ethernet.
I had to revert this already in NXP downstream u-boot.
Ah. If you set enet_ref_clk to 250M, then you no need this change. Otherwise you need this change.
I see your board set enet_ref to 50MHz, I have no idea why set to 100M will break your board which is in rmii mode. If you set enet_ref to 50MHz, the actually clk will be 25MHz
Regards, Peng.
Regards, Peng.
BR, Primoz
- ret = clk_set_rate(clk_ref, freq); if (ret < 0) return ret;
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Hi Fabio, Primoz, Peng,
On 9/24/2024 10:56 AM, Peng Fan wrote:
Subject: Re: [PATCH 1/2] net: fec_mxc: Fix clk_ref rate on iMX93
Hi,
On 23. 09. 24 15:14, Peng Fan (OSS) wrote:
From: Ye Li ye.li@nxp.com
Because iMX93 has a internal 1/2 divider before clock input to
network
controller, so have to set twice frequency rate
Fixes: 09de565f76b ("net: fec_mxc: support i.MX93") Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com
drivers/net/fec_mxc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 0a0d92bc2cd..e5d7f0f3e1e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1215,6 +1215,9 @@ static int fecmxc_set_ref_clk(struct clk
*clk_ref, phy_interface_t interface)
else return -EINVAL;
- if (is_imx93())
freq = freq << 1;
Humm, but how did it work so far?
On phyboard-segin-imx93, this change breaks fec ethernet.
I had to revert this already in NXP downstream u-boot.
Ah. If you set enet_ref_clk to 250M, then you no need this change. Otherwise you need this change.
Regards, Peng.
Just check phyboard-segin-imx93, this board uses RMII not RGMII. It outputs CCM clk_enet_ref on pin ENET1_TX_CLK to external phy for reference clock and loop back it on pad to FEC as RMII clock. So this usage has bypassed the 1/2 divider since the 1/2 divider is inside wakeupmix not on path CCM clk_enet_ref to pad. We need to change the patch to limit the 1/2 divider only for RGMII on iMX93.
In kernel, clk_enet_ref is assigned by dts, I don't see its rate changed by driver like u-boot.
Best regards,
Ye Li
BR, Primoz
- ret = clk_set_rate(clk_ref, freq); if (ret < 0) return ret;
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From: Ye Li ye.li@nxp.com
After FEC is halted by calling fec_halt callback, we should not continue receiving packet. Otherwise it will process previous pending interrupts on EIR register and uses wrong rbd index as this has been reset to 0.
The GRA interrupt which is triggered by issuing graceful stop command to FEC transmitter in fec_halt is processed in this case. It causes wrong receive buffer descriptors be used by FEC in next time.
Signed-off-by: Ye Li ye.li@nxp.com Reviewed-by: Peng Fan peng.fan@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- drivers/net/fec_mxc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index e5d7f0f3e1e..14fea891f7d 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -818,6 +818,9 @@ static int fecmxc_recv(struct udevice *dev, int flags, uchar **packetp) return -ENOMEM; }
+ if (!(readl(&fec->eth->ecntrl) & FEC_ECNTRL_ETHER_EN)) + return 0; + /* Check if any critical events have happened */ ievent = readl(&fec->eth->ievent); writel(ievent, &fec->eth->ievent);
participants (5)
-
Fabio Estevam
-
Peng Fan
-
Peng Fan (OSS)
-
Primoz Fiser
-
Ye Li