[U-Boot-Users] [PATCH] OMAP5912: fix FIFO handling in UART driver
According to the OMAP5912 Serial Interfaces Reference Guide (see http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the FIFO_EN enable bit in the FIFO Control Register (FCR) can only be changed when the baud clock is not running, i. e. when both DLL and DLH are set to 0.
Thus make sure that DLL and DLH are 0 when writing the FCR.
Signed-off-by: Wolfgang Denk wd@denx.de --- drivers/serial/ns16550.c | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-)
Unfortunately I can test this only on a limited number of boards with other NS16550 compatible UARTs (like TQM85xx, TQM83xx); the patch seems to cause no problems there.
Comments welcome...
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2429464..6b3f60e 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,11 +21,15 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif com_port->lcr = LCR_BKSE | LCRVAL; - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->dll = 0; + com_port->dlm = 0; com_port->lcr = LCRVAL; com_port->mcr = MCRVAL; com_port->fcr = FCRVAL; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = baud_divisor & 0xff; + com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->lcr = LCRVAL; #if defined(CONFIG_OMAP) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ @@ -38,12 +42,16 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) void NS16550_reinit (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = 0; + com_port->dlm = 0; + com_port->lcr = LCRVAL; + com_port->mcr = MCRVAL; + com_port->fcr = FCRVAL; com_port->lcr = LCR_BKSE; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; com_port->lcr = LCRVAL; - com_port->mcr = MCRVAL; - com_port->fcr = FCRVAL; }
void NS16550_putc (NS16550_t com_port, char c)
Wolfgang Denk wrote:
According to the OMAP5912 Serial Interfaces Reference Guide (see http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the FIFO_EN enable bit in the FIFO Control Register (FCR) can only be changed when the baud clock is not running, i. e. when both DLL and DLH are set to 0.
Thus make sure that DLL and DLH are 0 when writing the FCR.
Signed-off-by: Wolfgang Denk wd@denx.de
drivers/serial/ns16550.c | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-)
Unfortunately I can test this only on a limited number of boards with other NS16550 compatible UARTs (like TQM85xx, TQM83xx); the patch seems to cause no problems there.
How do you test this? Whats your test case? Then I will try to test it on a OMAP5912 OSK.
Thanks
Dirk
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2429464..6b3f60e 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,11 +21,15 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif com_port->lcr = LCR_BKSE | LCRVAL;
- com_port->dll = baud_divisor & 0xff;
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->dll = 0;
- com_port->dlm = 0; com_port->lcr = LCRVAL; com_port->mcr = MCRVAL; com_port->fcr = FCRVAL;
- com_port->lcr = LCR_BKSE | LCRVAL;
- com_port->dll = baud_divisor & 0xff;
- com_port->dlm = (baud_divisor >> 8) & 0xff;
- com_port->lcr = LCRVAL;
#if defined(CONFIG_OMAP) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ @@ -38,12 +42,16 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) void NS16550_reinit (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00;
- com_port->lcr = LCR_BKSE | LCRVAL;
- com_port->dll = 0;
- com_port->dlm = 0;
- com_port->lcr = LCRVAL;
- com_port->mcr = MCRVAL;
- com_port->fcr = FCRVAL; com_port->lcr = LCR_BKSE; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; com_port->lcr = LCRVAL;
- com_port->mcr = MCRVAL;
- com_port->fcr = FCRVAL;
}
void NS16550_putc (NS16550_t com_port, char c)
Hello Dirk,
in message 47740D48.1090803@googlemail.com you wrote:
drivers/serial/ns16550.c | 16 ++++++++++++---- 1 files changed, 12 insertions(+), 4 deletions(-)
Unfortunately I can test this only on a limited number of boards with other NS16550 compatible UARTs (like TQM85xx, TQM83xx); the patch seems to cause no problems there.
How do you test this? Whats your test case? Then I will try to test it on a OMAP5912 OSK.
Forgot to mention that it's been tested on the OMAP5912 devel kit and a custom board, too.
The real test is some custom application which is not available to the public.
For now, it would be helpful to receive confirmation that it does not break any existing board support.
Best regards,
Wolfgang Denk
In message 20071227095654.717B62405E@gemini.denx.de you wrote:
According to the OMAP5912 Serial Interfaces Reference Guide (see http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the FIFO_EN enable bit in the FIFO Control Register (FCR) can only be changed when the baud clock is not running, i. e. when both DLL and DLH are set to 0.
Thus make sure that DLL and DLH are 0 when writing the FCR.
Signed-off-by: Wolfgang Denk wd@denx.de
Applied.
Best regards,
Wolfgang Denk
participants (2)
-
Dirk Behme -
Wolfgang Denk