[U-Boot] [PATCH 1/6] ppc4xx: Abort autoboot only by space key on CPCI405 boards

matthias.fuchs＠esd.eu

20 Feb 2009 20 Feb '09

10:19 a.m.

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

Signed-off-by: Matthias Fuchs matthias.fuchs@esd-electronics.com --- include/configs/CPCI4052.h | 6 ++++++ include/configs/CPCI405AB.h | 6 ++++++ 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 2677cfb..daa3c19 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -154,6 +154,12 @@

#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */

+#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n", bootdelay +#undef CONFIG_AUTOBOOT_DELAY_STR +#define CONFIG_AUTOBOOT_STOP_STR " " + #define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */

/*----------------------------------------------------------------------- diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index aae0d73..41795a7 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -151,6 +151,12 @@

#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */

/*-----------------------------------------------------------------------

-- 1.6.1

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matthias.fuchs＠esd.eu

20 Feb 20 Feb

10:19 a.m.

New subject: [U-Boot] [PATCH 2/6] ppc4xx: DU405 maintenance fix

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

-strip unused features -fix resetting phy

Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/du405/du405.c | 10 ++++++++-- include/configs/DU405.h | 14 ++++++-------- 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c index 8a87d55..3bb34fd 100644 --- a/board/esd/du405/du405.c +++ b/board/esd/du405/du405.c @@ -191,10 +191,16 @@ int checkboard (void) *(volatile unsigned char *) FPGA_MODE_REG = 0xff; /* reset high active */ *(volatile unsigned char *) FPGA_MODE_REG = 0x00; /* low again */

+ return 0; +} + +void reset_phy(void) +{ +#if defined(CONFIG_LXT971_NO_SLEEP) + /* * Disable sleep mode in LXT971 */ lxt971_no_sleep(); - - return 0; +#endif } diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 1d20efe..d1edd24 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -32,8 +32,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_IDENT_STRING " $Name: $" - #define CONFIG_405GP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_DU405 1 /* ...on a DU405 board */ @@ -49,8 +47,6 @@ #undef CONFIG_BOOTARGS #define CONFIG_BOOTCOMMAND "bootm fff00000"

-#define CONFIG_PREBOOT /* enable preboot variable */ - #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */

@@ -58,7 +54,9 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ - +#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ +#define CONFIG_NET_MULTI 1 +#undef CONFIG_HAS_ETH1

/* * BOOTP options @@ -74,14 +72,13 @@ */ #include <config_cmd_default.h>

-#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ +#undef CONFIG_CMD_NFS #define CONFIG_CMD_IDE #define CONFIG_CMD_ELF #define CONFIG_CMD_MII #define CONFIG_CMD_DATE #define CONFIG_CMD_EEPROM - +#define CONFIG_CMD_I2C

#define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION @@ -214,6 +211,7 @@ /*----------------------------------------------------------------------- * I2C EEPROM (CAT24WC08) for environment */ +#define CONFIG_I2C_CMD_TREE 1 #define CONFIG_HARD_I2C /* I2c with hardware support */ #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F

-- 1.6.1

matthias.fuchs＠esd.eu

10:19 a.m.

New subject: [U-Boot] [PATCH 3/6] ppc4xx: Update TEXT_BASE for DASA_SIM boards

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

Fix building DASA_SIM boards by increasing U-Boot's size in flash.

Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/dasa_sim/config.mk | 11 +---------- include/configs/DASA_SIM.h | 4 ++-- 2 files changed, 3 insertions(+), 12 deletions(-)

diff --git a/board/esd/dasa_sim/config.mk b/board/esd/dasa_sim/config.mk index 747f29f..5d612d2 100644 --- a/board/esd/dasa_sim/config.mk +++ b/board/esd/dasa_sim/config.mk @@ -20,14 +20,5 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # +TEXT_BASE = 0xFFFC0000

-# -# esd ADCIOP boards -# - -# FLASH: -#TEXT_BASE = 0xFFFE0000 -TEXT_BASE = 0xFFFD0000 - -# SDRAM: -#TEXT_BASE = 0x00FE0000 diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h index 61704d0..21230e1 100644 --- a/include/configs/DASA_SIM.h +++ b/include/configs/DASA_SIM.h @@ -124,9 +124,9 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFD0000 +#define CONFIG_SYS_FLASH_BASE 0xFFFC0000 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 128 kB for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 128 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */

-- 1.6.1

matthias.fuchs＠esd.eu

10:19 a.m.

New subject: [U-Boot] [PATCH 4/6] ppc4xx: Cleanup linker scripts of esd 4xx boards

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/adciop/u-boot.lds | 4 ---- board/esd/apc405/u-boot.lds | 15 --------------- board/esd/ar405/u-boot.lds | 28 ---------------------------- board/esd/ash405/u-boot.lds | 15 --------------- board/esd/canbt/u-boot.lds | 26 -------------------------- board/esd/cms700/u-boot.lds | 15 --------------- board/esd/cpci2dp/u-boot.lds | 15 --------------- board/esd/cpciiser4/u-boot.lds | 15 --------------- board/esd/dasa_sim/u-boot.lds | 26 -------------------------- board/esd/dp405/u-boot.lds | 16 ---------------- board/esd/du405/u-boot.lds | 15 --------------- board/esd/du440/u-boot.lds | 3 --- board/esd/hh405/u-boot.lds | 15 --------------- board/esd/hub405/u-boot.lds | 16 ---------------- board/esd/pci405/u-boot.lds | 15 --------------- board/esd/plu405/u-boot.lds | 3 --- board/esd/pmc405/u-boot.lds | 15 --------------- board/esd/pmc440/u-boot.lds | 3 --- board/esd/voh405/u-boot.lds | 16 ---------------- board/esd/vom405/u-boot.lds | 3 --- board/esd/wuh405/u-boot.lds | 15 --------------- board/g2000/u-boot.lds | 16 ---------------- 22 files changed, 0 insertions(+), 310 deletions(-)

diff --git a/board/esd/adciop/u-boot.lds b/board/esd/adciop/u-boot.lds index e918163..992c4fa 100644 --- a/board/esd/adciop/u-boot.lds +++ b/board/esd/adciop/u-boot.lds @@ -57,11 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text)

*(.text) *(.fixup) diff --git a/board/esd/apc405/u-boot.lds b/board/esd/apc405/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/apc405/u-boot.lds +++ b/board/esd/apc405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/ar405/u-boot.lds b/board/esd/ar405/u-boot.lds index 2c1cf92..a5e2aa8 100644 --- a/board/esd/ar405/u-boot.lds +++ b/board/esd/ar405/u-boot.lds @@ -57,35 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - drivers/net/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_ppc/board.o (.text) - lib_generic/zlib.o (.text) - - common/cmd_boot.o (.text) - common/cmd_bootm.o (.text) - common/cmd_flash.o (.text) - common/cmd_mem.o (.text) - common/cmd_nvedit.o (.text) - common/console.o (.text) - common/main.o (.text) - -/* - . = DEFINED(env_offset) ? env_offset : .; - common/env_embedded.o (.ppcenv) -*/ - common/env_embedded.o (.text)

*(.text) *(.fixup) diff --git a/board/esd/ash405/u-boot.lds b/board/esd/ash405/u-boot.lds index e2e2512..9f5a46e 100644 --- a/board/esd/ash405/u-boot.lds +++ b/board/esd/ash405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/canbt/u-boot.lds b/board/esd/canbt/u-boot.lds index 74280e6..a5e2aa8 100644 --- a/board/esd/canbt/u-boot.lds +++ b/board/esd/canbt/u-boot.lds @@ -57,33 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_ppc/extable.o (.text) - lib_ppc/board.o (.text) - lib_generic/zlib.o (.text) - lib_generic/crc32.o (.text) - - common/cmd_boot.o (.text) - common/cmd_bootm.o (.text) - common/cmd_flash.o (.text) - common/cmd_mem.o (.text) - common/cmd_nvedit.o (.text) - common/console.o (.text) - common/main.o (.text) - net/net.o (.text) - -/* . = env_offset; - common/env_embedded.o (.text) -*/

*(.text) *(.fixup) diff --git a/board/esd/cms700/u-boot.lds b/board/esd/cms700/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/cms700/u-boot.lds +++ b/board/esd/cms700/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/cpci2dp/u-boot.lds b/board/esd/cpci2dp/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/cpci2dp/u-boot.lds +++ b/board/esd/cpci2dp/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/cpciiser4/u-boot.lds b/board/esd/cpciiser4/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/cpciiser4/u-boot.lds +++ b/board/esd/cpciiser4/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index 6acf7b8..be164fc 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -57,33 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/iop480_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_ppc/extable.o (.text) - lib_ppc/board.o (.text) - lib_generic/zlib.o (.text) - lib_generic/crc32.o (.text) - - common/cmd_boot.o (.text) - common/cmd_bootm.o (.text) - common/cmd_flash.o (.text) - common/cmd_mem.o (.text) - common/cmd_nvedit.o (.text) - common/console.o (.text) - common/main.o (.text) - - board/esd/dasa_sim/flash.o (.text) - common/cmd_nvedit.o (.text) - board/esd/dasa_sim/cmd_dasa_sim.o (.text) - net/bootp.o (.text)

. = env_offset; common/env_embedded.o(.text) diff --git a/board/esd/dp405/u-boot.lds b/board/esd/dp405/u-boot.lds index d8fbea3..5d59761 100644 --- a/board/esd/dp405/u-boot.lds +++ b/board/esd/dp405/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - drivers/net/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/du405/u-boot.lds b/board/esd/du405/u-boot.lds index 858ae61..4a79624 100644 --- a/board/esd/du405/u-boot.lds +++ b/board/esd/du405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/du440/u-boot.lds b/board/esd/du440/u-boot.lds index 05152b7..d95136c 100644 --- a/board/esd/du440/u-boot.lds +++ b/board/esd/du440/u-boot.lds @@ -62,9 +62,6 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text)

*(.text) diff --git a/board/esd/hh405/u-boot.lds b/board/esd/hh405/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/hh405/u-boot.lds +++ b/board/esd/hh405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/hub405/u-boot.lds b/board/esd/hub405/u-boot.lds index 6908106..9f5a46e 100644 --- a/board/esd/hub405/u-boot.lds +++ b/board/esd/hub405/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - drivers/net/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/pci405/u-boot.lds b/board/esd/pci405/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/pci405/u-boot.lds +++ b/board/esd/pci405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/plu405/u-boot.lds b/board/esd/plu405/u-boot.lds index fd5f3df..9f5a46e 100644 --- a/board/esd/plu405/u-boot.lds +++ b/board/esd/plu405/u-boot.lds @@ -57,9 +57,6 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text)

*(.text) diff --git a/board/esd/pmc405/u-boot.lds b/board/esd/pmc405/u-boot.lds index ca615f5..d078cb7 100644 --- a/board/esd/pmc405/u-boot.lds +++ b/board/esd/pmc405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/pmc440/u-boot.lds b/board/esd/pmc440/u-boot.lds index 05152b7..d95136c 100644 --- a/board/esd/pmc440/u-boot.lds +++ b/board/esd/pmc440/u-boot.lds @@ -62,9 +62,6 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text)

*(.text) diff --git a/board/esd/voh405/u-boot.lds b/board/esd/voh405/u-boot.lds index d8fbea3..5d59761 100644 --- a/board/esd/voh405/u-boot.lds +++ b/board/esd/voh405/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - drivers/net/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/esd/vom405/u-boot.lds b/board/esd/vom405/u-boot.lds index c9472f9..5d59761 100644 --- a/board/esd/vom405/u-boot.lds +++ b/board/esd/vom405/u-boot.lds @@ -57,9 +57,6 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text)

*(.text) diff --git a/board/esd/wuh405/u-boot.lds b/board/esd/wuh405/u-boot.lds index e2e2512..9f5a46e 100644 --- a/board/esd/wuh405/u-boot.lds +++ b/board/esd/wuh405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup) diff --git a/board/g2000/u-boot.lds b/board/g2000/u-boot.lds index d8fbea3..5d59761 100644 --- a/board/g2000/u-boot.lds +++ b/board/g2000/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - cpu/ppc4xx/start.o (.text) - cpu/ppc4xx/traps.o (.text) - cpu/ppc4xx/interrupts.o (.text) - cpu/ppc4xx/4xx_uart.o (.text) - cpu/ppc4xx/cpu_init.o (.text) - cpu/ppc4xx/speed.o (.text) - drivers/net/4xx_enet.o (.text) - common/dlmalloc.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/extable.o (.text) - lib_generic/zlib.o (.text) - -/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/

*(.text) *(.fixup)

-- 1.6.1

matthias.fuchs＠esd.eu

10:19 a.m.

New subject: [U-Boot] [PATCH 5/6] ppc4xx: Use correct io accessors for esd 405 boards

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32 macros. Also volatile pointer references are replaced by the new accessors.

Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu --- board/esd/apc405/apc405.c | 2 +- board/esd/ar405/ar405.c | 83 ++++++++++++++++++------------------- board/esd/ash405/ash405.c | 12 ++---- board/esd/canbt/canbt.c | 7 ++- board/esd/cms700/cms700.c | 13 +++--- board/esd/cpci2dp/cpci2dp.c | 18 +++++--- board/esd/cpci405/cpci405.c | 8 ++-- board/esd/cpciiser4/cpciiser4.c | 3 +- board/esd/dasa_sim/cmd_dasa_sim.c | 9 ++-- board/esd/dasa_sim/dasa_sim.c | 12 ++++-- board/esd/dasa_sim/eeprom.c | 18 ++++---- board/esd/vom405/vom405.c | 17 ++++--- board/esd/wuh405/wuh405.c | 18 ++++---- 13 files changed, 113 insertions(+), 107 deletions(-)

diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c index ac9bbb3..5a02155 100644 --- a/board/esd/apc405/apc405.c +++ b/board/esd/apc405/apc405.c @@ -93,7 +93,7 @@ int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0])); int board_revision(void) { unsigned long cntrl0Reg; - volatile unsigned long value; + unsigned long value;

/* * Get version of APC405 board from GPIO's diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c index c4b4b67..14520e1 100644 --- a/board/esd/ar405/ar405.c +++ b/board/esd/ar405/ar405.c @@ -24,6 +24,7 @@ #include <common.h> #include "ar405.h" #include <asm/processor.h> +#include <asm/io.h> #include <command.h>

DECLARE_GLOBAL_DATA_PTR; @@ -137,18 +138,14 @@ int board_early_init_f (void) mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */

- *(ushort *) 0xf03000ec = 0x0fff; /* enable all interrupts in fpga */ + out_be16((void *)0xf03000ec, 0x0fff); /* enable interrupts in fpga */

return 0; }

- -/* ------------------------------------------------------------------------- */ - /* * Check Board Identity: */ - int checkboard (void) { int index; @@ -192,14 +189,15 @@ int checkboard (void)

#if 1 /* test-only: some internal test routines... */ +#define DIGEN ((void *)0xf03000b4) /* u8 */ +#define DIGOUT ((void *)0xf03000b0) /* u16 */ +#define DIGIN ((void *)0xf03000a0) /* u16 */ + /* * Some test routines */ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - volatile uchar *digen = (volatile uchar *)0xf03000b4; - volatile ushort *digout = (volatile ushort *)0xf03000b0; - volatile ushort *digin = (volatile ushort *)0xf03000a0; int i; int k; int start; @@ -216,7 +214,7 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* * Enable digital outputs */ - *digen = 0x08; + out_8(DIGEN, 0x08);

printf("\nStarting digital In-/Out Test from I/O %d to %d (Cntrl-C to abort)...\n", start, end); @@ -226,12 +224,13 @@ int do_digtest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) */ for (;;) { for (i=start; i<=end; i++) { - *digout = 0x0001 << i; + out_be16(DIGOUT, 0x0001 << i); for (k=0; k<200; k++) udelay(1000);

- if (*digin != (0x0001 << i)) { - printf("ERROR: OUT=0x%04X, IN=0x%04X\n", 0x0001 << i, *digin); + if (in_be16(DIGIN) != (0x0001 << i)) { + printf("ERROR: OUT=0x%04X, IN=0x%04X\n", + 0x0001 << i, in_be16(DIGIN)); return 0; }

@@ -255,13 +254,13 @@ U_BOOT_CMD( #define ERROR_DELTA 256

struct io { - volatile short val; + short val; short dummy; };

int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - volatile short val; + short val; int i; int volt; struct io *out; @@ -274,9 +273,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

volt = 0; printf("Setting Channel %d to %dV...\n", i, volt); - out[i].val = (volt * 0x7fff) / 10; + out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10); udelay(10000); - val = in[i*2].val; + val = in_be16((void *)&(in[i*2].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -284,7 +283,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ((volt * 0x7fff) / 40) + ERROR_DELTA); return -1; } - val = in[i*2+1].val; + val = in_be16((void *)&(in[i*2+1].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -295,9 +294,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

volt = 5; printf("Setting Channel %d to %dV...\n", i, volt); - out[i].val = (volt * 0x7fff) / 10; + out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10); udelay(10000); - val = in[i*2].val; + val = in_be16((void *)&(in[i*2].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -305,7 +304,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ((volt * 0x7fff) / 40) + ERROR_DELTA); return -1; } - val = in[i*2+1].val; + val = in_be16((void *)&(in[i*2+1].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -316,9 +315,9 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

volt = 10; printf("Setting Channel %d to %dV...\n", i, volt); - out[i].val = (volt * 0x7fff) / 10; + out_be16((void *)&(out[i].val), (volt * 0x7fff) / 10); udelay(10000); - val = in[i*2].val; + val = in_be16((void *)&(in[i*2].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -326,7 +325,7 @@ int do_anatest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) ((volt * 0x7fff) / 40) + ERROR_DELTA); return -1; } - val = in[i*2+1].val; + val = in_be16((void *)&(in[i*2+1].val)); printf("-> InChannel %d: 0x%04x=%dV\n", i*2+1, val, (val * 4000) / 0x7fff); if ((val < ((volt * 0x7fff) / 40) - ERROR_DELTA) || (val > ((volt * 0x7fff) / 40) + ERROR_DELTA)) { @@ -350,28 +349,27 @@ int counter = 0;

void cyclicInt(void *ptr) { - *(ushort *)0xf03000e8 = 0x0800; /* ack int */ + out_be16((void *)0xf03000e8, 0x0800); /* ack int */ counter++; }

int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - volatile uchar *digout = (volatile uchar *)0xf03000b4; - volatile ulong *incin; + ulong *incin; int i;

- incin = (volatile ulong *)0xf0300040; + incin = (ulong *)0xf0300040;

/* * Clear inc counter */ - incin[0] = 0; - incin[1] = 0; - incin[2] = 0; - incin[3] = 0; + out_be32((void *)&incin[0], 0); + out_be32((void *)&incin[1], 0); + out_be32((void *)&incin[2], 0); + out_be32((void *)&incin[3], 0);

- incin = (volatile ulong *)0xf0300050; + incin = (ulong *)0xf0300050;

/* * Inc a little @@ -379,28 +377,29 @@ int do_inctest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) for (i=0; i<10000; i++) { switch (i & 0x03) { case 0: - *digout = 0x02; + out_8(DIGEN, 0x02); break; case 1: - *digout = 0x03; + out_8(DIGEN, 0x03); break; case 2: - *digout = 0x01; + out_8(DIGEN, 0x01); break; case 3: - *digout = 0x00; + out_8(DIGEN, 0x00); break; } udelay(10); }

- printf("Inc 0 = %ld\n", incin[0]); - printf("Inc 1 = %ld\n", incin[1]); - printf("Inc 2 = %ld\n", incin[2]); - printf("Inc 3 = %ld\n", incin[3]); + printf("Inc 0 = %d\n", in_be32((void *)&incin[0])); + printf("Inc 1 = %d\n", in_be32((void *)&incin[1])); + printf("Inc 2 = %d\n", in_be32((void *)&incin[2])); + printf("Inc 3 = %d\n", in_be32((void *)&incin[3]));

- *(ushort *)0xf03000e0 = 0x0c80-1; /* set counter */ - *(ushort *)0xf03000ec |= 0x0800; /* enable int */ + out_be16((void *)0xf03000e0, 0x0c80-1); /* set counter */ + out_be16((void *)0xf03000ec, + in_be16((void *)0xf03000ec) | 0x0800); /* enable int */ irq_install_handler (30, (interrupt_handler_t *) cyclicInt, NULL); printf("counter=%d\n", counter);

diff --git a/board/esd/ash405/ash405.c b/board/esd/ash405/ash405.c index dd1e2ec..074fe08 100644 --- a/board/esd/ash405/ash405.c +++ b/board/esd/ash405/ash405.c @@ -84,10 +84,6 @@ int board_early_init_f (void)

int misc_init_r (void) { - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); - volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); - volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); - volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); unsigned char *dst; ulong len = sizeof(fpgadata); int status; @@ -165,10 +161,10 @@ int misc_init_r (void) /* * Enable interrupts in exar duart mcr[3] */ - *duart0_mcr = 0x08; - *duart1_mcr = 0x08; - *duart2_mcr = 0x08; - *duart3_mcr = 0x08; + out_8((void *)(DUART0_BA + 4), 0x08); + out_8((void *)(DUART1_BA + 4), 0x08); + out_8((void *)(DUART2_BA + 4), 0x08); + out_8((void *)(DUART3_BA + 4), 0x08);

return (0); } diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c index 30fa605..2fe6b7b 100644 --- a/board/esd/canbt/canbt.c +++ b/board/esd/canbt/canbt.c @@ -24,6 +24,7 @@ #include <common.h> #include "canbt.h" #include <asm/processor.h> +#include <asm/io.h> #include <command.h>

DECLARE_GLOBAL_DATA_PTR; @@ -117,9 +118,9 @@ int board_early_init_f (void) /* * Setup port pins for normal operation */ - out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32 (GPIO0_TCR, 0x07038100); /* setup for output */ - out32 (GPIO0_OR, 0x07030100); /* set output pins to high (default) */ + out_be32 ((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */ + out_be32 ((void *)GPIO0_TCR, 0x07038100); /* setup for output */ + out_be32 ((void *)GPIO0_OR, 0x07030100); /* set output pins to high (default) */

/* * IRQ 0-15 405GP internally generated; active high; level sensitive diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c index d0ee193..9a522b2 100644 --- a/board/esd/cms700/cms700.c +++ b/board/esd/cms700/cms700.c @@ -95,14 +95,12 @@ int misc_init_r (void) /* * Check Board Identity: */ - +#define LED_REG (CONFIG_SYS_PLD_BASE + 0x1000) int checkboard (void) { char str[64]; int flashcnt; int delay; - volatile unsigned char *led_reg = (unsigned char *)((ulong)CONFIG_SYS_PLD_BASE + 0x1000); - volatile unsigned char *ver_reg = (unsigned char *)((ulong)CONFIG_SYS_PLD_BASE + 0x1001);

puts ("Board: ");

@@ -112,20 +110,21 @@ int checkboard (void) puts(str); }

- printf(" (PLD-Version=%02d)\n", *ver_reg); + printf(" (PLD-Version=%02d)\n", + in_8((void *)(CONFIG_SYS_PLD_BASE + 0x1001)));

/* * Flash LEDs */ for (flashcnt = 0; flashcnt < 3; flashcnt++) { - *led_reg = 0x00; /* LEDs off */ + out_8((void *)LED_REG, 0x00); /* LEDs off */ for (delay = 0; delay < 100; delay++) udelay(1000); - *led_reg = 0x0f; /* LEDs on */ + out_8((void *)LED_REG, 0x0f); /* LEDs on */ for (delay = 0; delay < 50; delay++) udelay(1000); } - *led_reg = 0x70; + out_8((void *)LED_REG, 0x70);

return 0; } diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index 517b174..aba240f 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -23,6 +23,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h> #include <malloc.h>

/* set output pins to high */ - out32(GPIO0_OR, CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, CONFIG_SYS_EEPROM_WP); /* setup for output (LED=off) */ - out32(GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED); + out_be32((void *)GPIO0_TCR, CONFIG_SYS_EEPROM_WP | CONFIG_SYS_PB_LED);

/* * IRQ 0-15 405GP internally generated; active high; level sensitive @@ -124,17 +127,20 @@ int eeprom_write_enable (unsigned dev_addr, int state) { switch (state) { case 1: /* Enable write access, clear bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); state = 0; break; case 0: /* Disable write access, set bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP); state = 0; break; default: /* Read current status back. */ - state = (0 == (in32(GPIO0_OR) & CONFIG_SYS_EEPROM_WP)); + state = (0 == (in_be32((void *)GPIO0_OR) & + CONFIG_SYS_EEPROM_WP)); break; } } diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 0aca825..ccbe245 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -111,10 +111,10 @@ int board_early_init_f(void) * First pull fpga-prg pin low, * to disable fpga logic (on version 2 board) */ - out32(GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32(GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */ - out32(GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */ - out32(GPIO0_OR, 0); /* pull prg low */ + out_be32((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */ + out_be32((void *)GPIO0_TCR, CONFIG_SYS_FPGA_PRG); /* setup for output */ + out_be32((void *)GPIO0_OR, CONFIG_SYS_FPGA_PRG); /* set output pins to high */ + out_be32((void *)GPIO0_OR, 0); /* pull prg low */

/* * Boot onboard FPGA diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c index b5d2543..6e97392 100644 --- a/board/esd/cpciiser4/cpciiser4.c +++ b/board/esd/cpciiser4/cpciiser4.c @@ -58,7 +58,6 @@ const unsigned char fpgadata[] = { int board_early_init_f (void) { int index, len, i; - volatile unsigned char dummy; int status;

#ifdef FPGA_DEBUG @@ -116,7 +115,7 @@ int board_early_init_f (void) /* * Init FPGA via RESET (read access on CS3) */ - dummy = *(unsigned char *) 0xf0200000; + in_8((void *)0xf0200000);

/* * IRQ 0-15 405GP internally generated; active high; level sensitive diff --git a/board/esd/dasa_sim/cmd_dasa_sim.c b/board/esd/dasa_sim/cmd_dasa_sim.c index f405be9..0310c47 100644 --- a/board/esd/dasa_sim/cmd_dasa_sim.c +++ b/board/esd/dasa_sim/cmd_dasa_sim.c @@ -25,6 +25,7 @@ #include <common.h> #include <command.h> #include <pci.h> +#include <asm/io.h>

#define OK 0 #define ERROR (-1) @@ -136,8 +137,8 @@ static void updatePci9054 (void) /* * Set EEPROM write-protect register to 0 */ - out32 (pci9054_iobase + 0x0c, - in32 (pci9054_iobase + 0x0c) & 0xffff00ff); + out_be32 ((void *)(pci9054_iobase + 0x0c), + in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff);

/* Long Serial EEPROM Load Registers... */ val = PciEepromWriteLongVPD (0x00, 0x905410b5); @@ -190,8 +191,8 @@ static void clearPci9054 (void) /* * Set EEPROM write-protect register to 0 */ - out32 (pci9054_iobase + 0x0c, - in32 (pci9054_iobase + 0x0c) & 0xffff00ff); + out_be32 ((void *)(pci9054_iobase + 0x0c), + in_be32 ((void *)(pci9054_iobase + 0x0c)) & 0xffff00ff);

/* Long Serial EEPROM Load Registers... */ val = PciEepromWriteLongVPD (0x00, 0xffffffff); diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c index 47d6bb3..127374b 100644 --- a/board/esd/dasa_sim/dasa_sim.c +++ b/board/esd/dasa_sim/dasa_sim.c @@ -74,7 +74,8 @@ static int fpgaBoot (void)

#ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif

/* init fpga by asserting and deasserting PROGRAM* (USER2)... */ @@ -86,7 +87,8 @@ static int fpgaBoot (void)

#ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif

/* cs1: disable burst, disable ready */ @@ -109,7 +111,8 @@ static int fpgaBoot (void)

#ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif

/* set cs1 to 32 bit data-width, disable burst, enable ready */ @@ -125,7 +128,8 @@ static int fpgaBoot (void)

#ifdef FPGA_DEBUG printf ("%s\n", - ((in32 (0x50000084) & 0x00010000) == 0) ? "NOT DONE" : "DONE"); + ((in_be32 ((void *)0x50000084) & 0x00010000) == 0) ? + "NOT DONE" : "DONE"); #endif

/* wait for 30 ms... */ diff --git a/board/esd/dasa_sim/eeprom.c b/board/esd/dasa_sim/eeprom.c index 1b4c7b3..aa6f52c 100644 --- a/board/esd/dasa_sim/eeprom.c +++ b/board/esd/dasa_sim/eeprom.c @@ -24,7 +24,7 @@

#include <common.h> #include <command.h> - +#include <asm/io.h>

#define EEPROM_CAP 0x50000358 #define EEPROM_DATA 0x5000035c @@ -33,23 +33,23 @@ unsigned int eepromReadLong(int offs) { unsigned int value; - volatile unsigned short ret; + unsigned short ret; int count;

- *(unsigned short *)EEPROM_CAP = offs; + out_be16((void *)EEPROM_CAP, offs);

count = 0;

for (;;) { count++; - ret = *(unsigned short *)EEPROM_CAP; + ret = in_be16((void *)EEPROM_CAP);

if ((ret & 0x8000) != 0) break; }

- value = *(unsigned long *)EEPROM_DATA; + value = in_be32((void *)EEPROM_DATA);

return value; } @@ -69,18 +69,18 @@ unsigned char eepromReadByte(int offs)

void eepromWriteLong(int offs, unsigned int value) { - volatile unsigned short ret; + unsigned short ret; int count;

count = 0;

- *(unsigned long *)EEPROM_DATA = value; - *(unsigned short *)EEPROM_CAP = 0x8000 + offs; + out_be32((void *)EEPROM_DATA, value); + out_be16((void *)EEPROM_CAP, 0x8000 + offs);

for (;;) { count++; - ret = *(unsigned short *)EEPROM_CAP; + ret = in_be16((void *)EEPROM_CAP);

if ((ret & 0x8000) == 0) break; diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c index 1b1479f..d67b23e 100644 --- a/board/esd/vom405/vom405.c +++ b/board/esd/vom405/vom405.c @@ -23,6 +23,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h> #include <malloc.h>

@@ -67,9 +68,11 @@ int board_early_init_f (void) /* * Reset CPLD via GPIO12 (CS3) pin */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 12)); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 12)); udelay(1000); /* wait 1ms */ - out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 12)); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | (0x80000000 >> 12)); udelay(1000); /* wait 1ms */

return 0; @@ -93,7 +96,7 @@ int checkboard (void) int i = getenv_r ("serial#", str, sizeof(str)); int flashcnt; int delay; - volatile unsigned char *led_reg = (unsigned char *)((ulong)CAN_BA + 0x1000); + u8 *led_reg = (u8 *)(CAN_BA + 0x1000);

puts ("Board: ");

@@ -103,20 +106,20 @@ int checkboard (void) puts(str); }

- printf(" (PLD-Version=%02d)\n", *led_reg); + printf(" (PLD-Version=%02d)\n", in_8(led_reg));

/* * Flash LEDs */ for (flashcnt = 0; flashcnt < 3; flashcnt++) { - *led_reg = 0x40; /* LED_B..D off */ + out_8(led_reg, 0x40); /* LED_B..D off */ for (delay = 0; delay < 100; delay++) udelay(1000); - *led_reg = 0x47; /* LED_B..D on */ + out_8(led_reg, 0x47); /* LED_B..D on */ for (delay = 0; delay < 50; delay++) udelay(1000); } - *led_reg = 0x40; + out_8(led_reg, 0x40);

return 0; } diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c index 5eca3bd..e330fff 100644 --- a/board/esd/wuh405/wuh405.c +++ b/board/esd/wuh405/wuh405.c @@ -82,10 +82,6 @@ int board_early_init_f (void)

int misc_init_r (void) { - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); - volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); - volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); - volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); unsigned char *dst; ulong len = sizeof(fpgadata); int status; @@ -155,18 +151,20 @@ int misc_init_r (void) /* * Reset external DUARTs */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST); udelay(10); /* wait 10us */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); udelay(1000); /* wait 1ms */

/* * Enable interrupts in exar duart mcr[3] */ - *duart0_mcr = 0x08; - *duart1_mcr = 0x08; - *duart2_mcr = 0x08; - *duart3_mcr = 0x08; + out_8((void *)(DUART0_BA + 4), 0x08); + out_8((void *)(DUART1_BA + 4), 0x08); + out_8((void *)(DUART2_BA + 4), 0x08); + out_8((void *)(DUART3_BA + 4), 0x08);

return (0); }

-- 1.6.1

matthias.fuchs＠esd.eu

10:19 a.m.

New subject: [U-Boot] [PATCH 6/6] ppc4xx: Use correct io accessors for esd 405/440 boards

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

This patch replaces in/out8/16/32 macros by in/out_8/_be16/_be32 macros. Also volatile pointer references are replaced by the new accessors.

diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c index 5232ddd..62c3243 100644 --- a/board/esd/common/fpga.c +++ b/board/esd/common/fpga.c @@ -24,6 +24,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h>

/* ------------------------------------------------------------------------- */ @@ -55,7 +56,7 @@ #define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */

#ifndef SET_FPGA -# define SET_FPGA(data) out32(GPIO0_OR, data) +# define SET_FPGA(data) out_be32((void *)GPIO0_OR, data) #endif

#ifdef FPGA_PROG_ACTIVE_HIGH @@ -85,10 +86,10 @@ SET_FPGA(FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH);} /* set data to 1 */

#ifndef FPGA_DONE_STATE -# define FPGA_DONE_STATE (in32(GPIO0_IR) & FPGA_DONE) +# define FPGA_DONE_STATE (in_be32((void *)GPIO0_IR) & FPGA_DONE) #endif #ifndef FPGA_INIT_STATE -# define FPGA_INIT_STATE (in32(GPIO0_IR) & FPGA_INIT) +# define FPGA_INIT_STATE (in_be32((void *)GPIO0_IR) & FPGA_INIT) #endif

@@ -139,8 +140,11 @@ static int fpga_boot (const unsigned char *fpgadata, int size) * Setup port pins for fpga programming */ #ifndef CONFIG_M5249 - out32 (GPIO0_ODR, 0x00000000); /* no open drain pins */ - out32 (GPIO0_TCR, in32 (GPIO0_TCR) | FPGA_PRG | FPGA_CLK | FPGA_DATA); /* setup for output */ + out_be32 ((void *)GPIO0_ODR, 0x00000000); /* no open drain pins */ + /* setup for output */ + out_be32 ((void *)GPIO0_TCR, + in_be32 ((void *)GPIO0_TCR) | + FPGA_PRG | FPGA_CLK | FPGA_DATA); #endif SET_FPGA (FPGA_PRG_HIGH | FPGA_CLK_HIGH | FPGA_DATA_HIGH); /* set pins to high */

diff --git a/board/esd/common/lcd.h b/board/esd/common/lcd.h index 3169e6b..01f6019 100644 --- a/board/esd/common/lcd.h +++ b/board/esd/common/lcd.h @@ -40,13 +40,13 @@ #define TRUE (!FALSE) #endif

-#define S1D_WRITE_PALETTE(p,i,r,g,b) \ - { \ - ((volatile uchar*)(p))[palette_index] = (uchar)(i); \ - ((volatile uchar*)(p))[palette_value] = (uchar)(r); \ - ((volatile uchar*)(p))[palette_value] = (uchar)(g); \ - ((volatile uchar*)(p))[palette_value] = (uchar)(b); \ - } +#define S1D_WRITE_PALETTE(p,i,r,g,b) \ + { \ + out_8(&((uchar*)(p))[palette_index], (uchar)(i)); \ + out_8(&((uchar*)(p))[palette_index], (uchar)(r)); \ + out_8(&((uchar*)(p))[palette_index], (uchar)(g)); \ + out_8(&((uchar*)(p))[palette_index], (uchar)(b)); \ + }

typedef struct { diff --git a/board/esd/common/xilinx_jtag/ports.c b/board/esd/common/xilinx_jtag/ports.c index 3ad94a5..ac0d7ac 100644 --- a/board/esd/common/xilinx_jtag/ports.c +++ b/board/esd/common/xilinx_jtag/ports.c @@ -32,6 +32,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h>

#include "ports.h"

@@ -68,7 +69,7 @@ void setPort(short p,short val) } else { output &= ~JTAG_TCK; } - out32(GPIO0_OR, output); + out_be32((void *)GPIO0_OR, output); } }

@@ -98,7 +99,7 @@ unsigned char readTDOBit(void) { unsigned long inputs;

- inputs = in32(GPIO0_IR); + inputs = in_be32((void *)GPIO0_IR); if (inputs & JTAG_TDO) return 1; else diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c index eb001da..c32c7c7 100644 --- a/board/esd/dp405/dp405.c +++ b/board/esd/dp405/dp405.c @@ -23,6 +23,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h> #include <malloc.h>

@@ -66,9 +67,11 @@ int board_early_init_f (void) /* * Reset CPLD via GPIO13 (CS4) pin */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~(0x80000000 >> 13)); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 13)); udelay(1000); /* wait 1ms */ - out32(GPIO0_OR, in32(GPIO0_OR) | (0x80000000 >> 13)); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | (0x80000000 >> 13)); udelay(1000); /* wait 1ms */

return 0; @@ -104,9 +107,10 @@ int checkboard (void) puts(str); }

- id1 = trans[(~(in32(GPIO0_IR) >> 5)) & 0x0000000f]; - id2 = trans[(~(in32(GPIO0_IR) >> 9)) & 0x0000000f]; - printf(" (ID=0x%1X%1X, PLD=0x%02X)\n", id2, id1, in8(0xf0001000)); + id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f]; + id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f]; + printf(" (ID=0x%1X%1X, PLD=0x%02X)\n", + id2, id1, in_8((void *)0xf0001000));

return 0; } diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c index 3bb34fd..8e9ac28 100644 --- a/board/esd/du405/du405.c +++ b/board/esd/du405/du405.c @@ -188,8 +188,8 @@ int checkboard (void) /* * Reset external DUART via FPGA */ - *(volatile unsigned char *) FPGA_MODE_REG = 0xff; /* reset high active */ - *(volatile unsigned char *) FPGA_MODE_REG = 0x00; /* low again */ + out_8((void *)FPGA_MODE_REG, 0xff); /* reset high active */ + out_8((void *)FPGA_MODE_REG, 0x00); /* low again */

return 0; } diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c index f9b91b5..45dfa6f 100644 --- a/board/esd/du440/du440.c +++ b/board/esd/du440/du440.c @@ -310,8 +310,8 @@ int misc_init_r(void)

int pld_revision(void) { - out8(CONFIG_SYS_CPLD_BASE, 0x00); - return (int)(in8(CONFIG_SYS_CPLD_BASE) & CPLD_VERSION_MASK); + out_8((void *)CONFIG_SYS_CPLD_BASE, 0x00); + return (int)(in_8((void *)CONFIG_SYS_CPLD_BASE) & CPLD_VERSION_MASK); }

int board_revision(void) @@ -872,12 +872,12 @@ static int got_pldirq; static int pld_interrupt(u32 arg) { int rc = -1; /* not for us */ - u8 status = in8(CONFIG_SYS_CPLD_BASE); + u8 status = in_8((void *)CONFIG_SYS_CPLD_BASE);

/* check for PLD interrupt */ if (status & PWR_INT_FLAG) { /* reset this int */ - out8(CONFIG_SYS_CPLD_BASE, 0); + out_8((void *)CONFIG_SYS_CPLD_BASE, 0); rc = 0; got_pldirq = 1; /* trigger backend */ } @@ -890,7 +890,7 @@ int do_waitpwrirq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) got_pldirq = 0;

/* clear any pending interrupt */ - out8(CONFIG_SYS_CPLD_BASE, 0); + out_8((void *)CONFIG_SYS_CPLD_BASE, 0);

irq_install_handler(CPLD_IRQ, (interrupt_handler_t *)pld_interrupt, 0); @@ -906,7 +906,8 @@ int do_waitpwrirq(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if (got_pldirq) { printf("Got interrupt!\n"); printf("Power %sready!\n", - in8(CONFIG_SYS_CPLD_BASE) & PWR_RDY ? "":"NOT "); + in_8((void *)CONFIG_SYS_CPLD_BASE) & + PWR_RDY ? "":"NOT "); }

irq_free_handler(CPLD_IRQ); diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c index ae3bc80..eab952c 100644 --- a/board/esd/hh405/hh405.c +++ b/board/esd/hh405/hh405.c @@ -29,6 +29,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h> #include <malloc.h> #include <pci.h> @@ -36,6 +37,26 @@

DECLARE_GLOBAL_DATA_PTR;

+/* FPGA internal regs */ +#define FPGA_CTRL ((u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + 0x000)) +#define FPGA_STATUS ((u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + 0x002)) +#define FPGA_CTR ((u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + 0x004)) +#define FPGA_BL ((u16 *)(CONFIG_SYS_FPGA_BASE_ADDR + 0x006)) + +/* FPGA Control Reg */ +#define FPGA_CTRL_REV0 0x0001 +#define FPGA_CTRL_REV1 0x0002 +#define FPGA_CTRL_VGA0_BL 0x0004 +#define FPGA_CTRL_VGA0_BL_MODE 0x0008 +#define FPGA_CTRL_CF_RESET 0x0040 +#define FPGA_CTRL_PS2_PWR 0x0080 +#define FPGA_CTRL_CF_PWRN 0x0100 /* low active */ +#define FPGA_CTRL_CF_BUS_EN 0x0200 +#define FPGA_CTRL_LCD_CLK 0x7000 /* mask for lcd clock */ +#define FPGA_CTRL_OW_ENABLE 0x8000 + +#define FPGA_STATUS_CF_DETECT 0x8000 + #ifdef CONFIG_VIDEO_SM501

#define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\ @@ -297,22 +318,22 @@ int board_revision(void) /* * Setup GPIO pins (BLAST/GPIO0 and GPIO9 as GPIO) */ - osrh_reg = in32(GPIO0_OSRH); - isr1h_reg = in32(GPIO0_ISR1H); - tcr_reg = in32(GPIO0_TCR); - out32(GPIO0_OSRH, osrh_reg & ~0xC0003000); /* output select */ - out32(GPIO0_ISR1H, isr1h_reg | 0xC0003000); /* input select */ - out32(GPIO0_TCR, tcr_reg & ~0x80400000); /* select input */ + osrh_reg = in_be32((void *)GPIO0_OSRH); + isr1h_reg = in_be32((void *)GPIO0_ISR1H); + tcr_reg = in_be32((void *)GPIO0_TCR); + out_be32((void *)GPIO0_OSRH, osrh_reg & ~0xC0003000); /* output select */ + out_be32((void *)GPIO0_ISR1H, isr1h_reg | 0xC0003000); /* input select */ + out_be32((void *)GPIO0_TCR, tcr_reg & ~0x80400000); /* select input */

udelay(1000); /* wait some time before reading input */ - value = in32(GPIO0_IR) & 0x80400000; /* get config bits */ + value = in_be32((void *)GPIO0_IR) & 0x80400000; /* get config bits */

/* * Restore GPIO settings */ - out32(GPIO0_OSRH, osrh_reg); /* output select */ - out32(GPIO0_ISR1H, isr1h_reg); /* input select */ - out32(GPIO0_TCR, tcr_reg); /* enable output driver for outputs */ + out_be32((void *)GPIO0_OSRH, osrh_reg); /* output select */ + out_be32((void *)GPIO0_ISR1H, isr1h_reg); /* input select */ + out_be32((void *)GPIO0_TCR, tcr_reg); /* enable output driver for outputs */

if (value & 0x80000000) { /* Revision 1.0 or 1.1 detected */ @@ -353,7 +374,7 @@ int board_early_init_f (void) /* * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us */ - mtebc (epcr, 0xa8400000); /* ebc always driven */ + mtebc(epcr, 0xa8400000); /* ebc always driven */

return 0; } @@ -362,27 +383,26 @@ int cf_enable(void) { int i;

- volatile unsigned short *fpga_ctrl = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL); - volatile unsigned short *fpga_status = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL + 2); - if (gd->board_type >= 2) { - if (*fpga_status & CONFIG_SYS_FPGA_STATUS_CF_DETECT) { - if (!(*fpga_ctrl & CONFIG_SYS_FPGA_CTRL_CF_BUS_EN)) { - *fpga_ctrl &= ~CONFIG_SYS_FPGA_CTRL_CF_PWRN; + if (in_be16(FPGA_STATUS) & FPGA_STATUS_CF_DETECT) { + if (!(in_be16(FPGA_CTRL) & FPGA_CTRL_CF_BUS_EN)) { + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) & ~FPGA_CTRL_CF_PWRN);

for (i=0; i<300; i++) udelay(1000);

- *fpga_ctrl |= CONFIG_SYS_FPGA_CTRL_CF_BUS_EN; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | FPGA_CTRL_CF_BUS_EN);

for (i=0; i<20; i++) udelay(1000); } } else { - *fpga_ctrl &= ~CONFIG_SYS_FPGA_CTRL_CF_BUS_EN; - *fpga_ctrl |= CONFIG_SYS_FPGA_CTRL_CF_PWRN; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) & ~FPGA_CTRL_CF_BUS_EN); + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | FPGA_CTRL_CF_PWRN); } }

@@ -391,12 +411,6 @@ int cf_enable(void)

int misc_init_r (void) { - volatile unsigned short *fpga_ctrl = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL); - volatile unsigned short *lcd_contrast = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL + 4); - volatile unsigned short *lcd_backlight = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL + 6); unsigned char *dst; ulong len = sizeof(fpgadata); int status; @@ -460,36 +474,43 @@ int misc_init_r (void) /* * Reset FPGA via FPGA_INIT pin */ - out32(GPIO0_TCR, in32(GPIO0_TCR) | FPGA_INIT); /* setup FPGA_INIT as output */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~FPGA_INIT); /* reset low */ + /* setup FPGA_INIT as output */ + out_be32((void *)GPIO0_TCR, + in_be32((void *)GPIO0_TCR) | FPGA_INIT); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~FPGA_INIT); /* reset low */ udelay(1000); /* wait 1ms */ - out32(GPIO0_OR, in32(GPIO0_OR) | FPGA_INIT); /* reset high */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | FPGA_INIT); /* reset high */ udelay(1000); /* wait 1ms */

/* * Write Board revision into FPGA */ - *fpga_ctrl |= gd->board_type & 0x0003; + out_be16(FPGA_CTRL, in_be16(FPGA_CTRL) | (gd->board_type & 0x0003));

/* * Setup and enable EEPROM write protection */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP);

/* * Reset touch-screen controller */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_TOUCH_RST); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_TOUCH_RST); udelay(1000); - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_TOUCH_RST); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_TOUCH_RST);

/* * Enable power on PS/2 interface (with reset) */ - *fpga_ctrl &= ~(CONFIG_SYS_FPGA_CTRL_PS2_PWR); + out_be16(FPGA_CTRL, in_be16(FPGA_CTRL) & ~FPGA_CTRL_PS2_PWR); for (i=0;i<500;i++) udelay(1000); - *fpga_ctrl |= (CONFIG_SYS_FPGA_CTRL_PS2_PWR); + out_be16(FPGA_CTRL, in_be16(FPGA_CTRL) | FPGA_CTRL_PS2_PWR);

/* * Get contrast value from environment variable @@ -498,7 +519,8 @@ int misc_init_r (void) if (str) { contrast0 = simple_strtol(str, NULL, 16); if (contrast0 > 255) { - printf("ERROR: contrast0 value too high (0x%lx)!\n", contrast0); + printf("ERROR: contrast0 value too high (0x%lx)!\n", + contrast0); contrast0 = 0xffffffff; } } @@ -512,8 +534,9 @@ int misc_init_r (void) /* * Switch backlight on */ - *fpga_ctrl |= CONFIG_SYS_FPGA_CTRL_VGA0_BL; - *lcd_backlight = 0x0000; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | FPGA_CTRL_VGA0_BL); + out_be16(FPGA_BL, 0x0000);

lcd_setup(1, 0); lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG, (uchar *)CONFIG_SYS_LCD_BIG_MEM, @@ -524,8 +547,9 @@ int misc_init_r (void) /* * Switch backlight on */ - *fpga_ctrl &= ~CONFIG_SYS_FPGA_CTRL_VGA0_BL; - *lcd_backlight = 0x0000; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) & ~FPGA_CTRL_VGA0_BL); + out_be16(FPGA_BL, 0x0000);

lcd_setup(1, 0); lcd_init((uchar *)CONFIG_SYS_LCD_BIG_REG, (uchar *)CONFIG_SYS_LCD_BIG_MEM, @@ -537,19 +561,22 @@ int misc_init_r (void) * Set default display contrast voltage */ if (contrast0 == 0xffffffff) { - *lcd_contrast = 0x0082; + out_be16(FPGA_CTR, 0x0082); } else { - *lcd_contrast = contrast0; + out_be16(FPGA_CTR, contrast0); } - *lcd_backlight = 0xffff; + out_be16(FPGA_BL, 0xffff); /* * Switch backlight on */ - *fpga_ctrl |= CONFIG_SYS_FPGA_CTRL_VGA0_BL | CONFIG_SYS_FPGA_CTRL_VGA0_BL_MODE; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | + FPGA_CTRL_VGA0_BL | + FPGA_CTRL_VGA0_BL_MODE); /* * Set lcd clock (small epson) */ - *fpga_ctrl |= LCD_CLK_06250; + out_be16(FPGA_CTRL, in_be16(FPGA_CTRL) | LCD_CLK_06250); udelay(100); /* wait for 100 us */

lcd_setup(0, 1); @@ -562,19 +589,25 @@ int misc_init_r (void) * Set default display contrast voltage */ if (contrast0 == 0xffffffff) { - *lcd_contrast = 0x0060; + out_be16(FPGA_CTR, 0x0060); } else { - *lcd_contrast = contrast0; + out_be16(FPGA_CTR, contrast0); } - *lcd_backlight = 0xffff; + out_be16(FPGA_BL, 0xffff); /* * Switch backlight on */ - *fpga_ctrl |= CONFIG_SYS_FPGA_CTRL_VGA0_BL | CONFIG_SYS_FPGA_CTRL_VGA0_BL_MODE; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | + FPGA_CTRL_VGA0_BL | + FPGA_CTRL_VGA0_BL_MODE); /* * Set lcd clock (small epson), enable 1-wire interface */ - *fpga_ctrl |= LCD_CLK_08330 | CONFIG_SYS_FPGA_CTRL_OW_ENABLE; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | + LCD_CLK_08330 | + FPGA_CTRL_OW_ENABLE);

lcd_setup(0, 1); lcd_init((uchar *)CONFIG_SYS_LCD_SMALL_REG, (uchar *)CONFIG_SYS_LCD_SMALL_MEM, @@ -593,10 +626,10 @@ int misc_init_r (void) puts("VGA: SM501 with 8 MB "); if (strcmp(str, "ppc221") == 0) { printf("(800*600, %dbpp)\n", BPP); - *lcd_backlight = 0x002d; /* max. allowed brightness */ + out_be16(FPGA_BL, 0x002d); /* max. allowed brightness */ } else if (strcmp(str, "ppc231") == 0) { printf("(1024*768, %dbpp)\n", BPP); - *lcd_backlight = 0x0000; + out_be16(FPGA_BL, 0x0000); } else { printf("Unsupported bd_type defined (%s) -> No display configured!\n", str); return 0; @@ -646,21 +679,21 @@ int checkboard (void) #ifdef CONFIG_IDE_RESET void ide_set_reset(int on) { - volatile unsigned short *fpga_mode = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL); - volatile unsigned short *fpga_status = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL + 2); - - if (((gd->board_type >= 2) && (*fpga_status & CONFIG_SYS_FPGA_STATUS_CF_DETECT)) || + if (((gd->board_type >= 2) && + (in_be16(FPGA_STATUS) & FPGA_STATUS_CF_DETECT)) || (gd->board_type < 2)) { /* * Assert or deassert CompactFlash Reset Pin */ if (on) { /* assert RESET */ cf_enable(); - *fpga_mode &= ~(CONFIG_SYS_FPGA_CTRL_CF_RESET); + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) & + ~FPGA_CTRL_CF_RESET); } else { /* release RESET */ - *fpga_mode |= CONFIG_SYS_FPGA_CTRL_CF_RESET; + out_be16(FPGA_CTRL, + in_be16(FPGA_CTRL) | + FPGA_CTRL_CF_RESET); } } } @@ -684,17 +717,20 @@ int eeprom_write_enable (unsigned dev_addr, int state) switch (state) { case 1: /* Enable write access, clear bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP); state = 0; break; case 0: /* Disable write access, set bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_EEPROM_WP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP); state = 0; break; default: /* Read current status back. */ - state = (0 == (in32(GPIO0_OR) & CONFIG_SYS_EEPROM_WP)); + state = (0 == (in_be32((void *)GPIO0_OR) & + CONFIG_SYS_EEPROM_WP)); break; } } diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c index 8785e6c..03e5ad7 100644 --- a/board/esd/hub405/hub405.c +++ b/board/esd/hub405/hub405.c @@ -23,6 +23,7 @@

#include <common.h> #include <asm/processor.h> +#include <asm/io.h> #include <command.h> #include <malloc.h>

@@ -44,22 +45,22 @@ int board_revision(void) /* * Setup GPIO pin(s) (IRQ6/GPIO23) */ - osrl_reg = in32(GPIO0_OSRH); - isr1l_reg = in32(GPIO0_ISR1H); - tcr_reg = in32(GPIO0_TCR); - out32(GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */ - out32(GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */ - out32(GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */ + osrl_reg = in_be32((void *)GPIO0_OSRH); + isr1l_reg = in_be32((void *)GPIO0_ISR1H); + tcr_reg = in_be32((void *)GPIO0_TCR); + out_be32((void *)GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */ + out_be32((void *)GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */ + out_be32((void *)GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */

udelay(1000); /* wait some time before reading input */ - value = in32(GPIO0_IR) & 0x00000100; /* get config bits */ + value = in_be32((void *)GPIO0_IR) & 0x00000100; /* get config bits */

/* * Restore GPIO settings */ - out32(GPIO0_OSRH, osrl_reg); /* output select */ - out32(GPIO0_ISR1H, isr1l_reg); /* input select */ - out32(GPIO0_TCR, tcr_reg); /* enable output driver for outputs */ + out_be32((void *)GPIO0_OSRH, osrl_reg); /* output select */ + out_be32((void *)GPIO0_ISR1H, isr1l_reg); /* input select */ + out_be32((void *)GPIO0_TCR, tcr_reg); /* enable output driver for outputs */

if (value & 0x00000100) { /* Revision 1.1 or 1.2 detected */ @@ -101,13 +102,9 @@ int board_early_init_f (void) return 0; }

+#define LED_REG (DUART0_BA + 0x20) int misc_init_r (void) { - volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4); - volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4); - volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4); - volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4); - volatile unsigned char *led_reg = (unsigned char *)((ulong)DUART0_BA + 0x20); unsigned long val; int delay, flashcnt; char *str; @@ -116,16 +113,17 @@ int misc_init_r (void) /* * Enable interrupts in exar duart mcr[3] */ - *duart0_mcr = 0x08; - *duart1_mcr = 0x08; - *duart2_mcr = 0x08; - *duart3_mcr = 0x08; + out_8((void *)(DUART0_BA + 4), 0x08); + out_8((void *)(DUART1_BA + 4), 0x08); + out_8((void *)(DUART2_BA + 4), 0x08); + out_8((void *)(DUART3_BA + 4), 0x08);

/* * Set RS232/RS422 control (RS232 = high on GPIO) */ - val = in32(GPIO0_OR); - val &= ~(CONFIG_SYS_UART2_RS232 | CONFIG_SYS_UART3_RS232 | CONFIG_SYS_UART4_RS232 | CONFIG_SYS_UART5_RS232); + val = in_be32((void *)GPIO0_OR); + val &= ~(CONFIG_SYS_UART2_RS232 | CONFIG_SYS_UART3_RS232 | + CONFIG_SYS_UART4_RS232 | CONFIG_SYS_UART5_RS232);

str = getenv("phys0"); if (!str || (str && (str[0] == '0'))) @@ -143,7 +141,7 @@ int misc_init_r (void) if (!str || (str && (str[0] == '0'))) val |= CONFIG_SYS_UART5_RS232;

- out32(GPIO0_OR, val); + out_be32((void *)GPIO0_OR, val);

/* * check board type and setup AP power @@ -160,23 +158,27 @@ int misc_init_r (void) * Flash LEDs */ for (flashcnt = 0; flashcnt < 3; flashcnt++) { - *led_reg = led_reg_default; /* LED_A..D off */ + /* LED_A..D off */ + out_8((void *)LED_REG, led_reg_default); for (delay = 0; delay < 100; delay++) udelay(1000); - *led_reg = led_reg_default | 0xf0; /* LED_A..D on */ + /* LED_A..D on */ + out_8((void *)LED_REG, led_reg_default | 0xf0); for (delay = 0; delay < 50; delay++) udelay(1000); } - *led_reg = led_reg_default; + out_8((void *)LED_REG, led_reg_default); } }

/* * Reset external DUARTs */ - out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ udelay(10); /* wait 10us */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ udelay(1000); /* wait 1ms */

/* diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c index 0602abf..8973f97 100644 --- a/board/esd/pci405/pci405.c +++ b/board/esd/pci405/pci405.c @@ -338,17 +338,17 @@ int checkboard (void) }

/* ------------------------------------------------------------------------- */ +#define UART1_MCR 0xef600404 int wpeeprom(int wp) { int wp_state = wp; - volatile unsigned char *uart1_mcr = (volatile unsigned char *)0xef600404;

if (wp == 1) { - *uart1_mcr &= ~0x02; + out_8((void *)UART1_MCR, in_8((void *)UART1_MCR) & ~0x02); } else if (wp == 0) { - *uart1_mcr |= 0x02; + out_8((void *)UART1_MCR, in_8((void *)UART1_MCR) | 0x02); } else { - if (*uart1_mcr & 0x02) { + if (in_8((void *)UART1_MCR) & 0x02) { wp_state = 0; } else { wp_state = 1; diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c index 7c0aaa2..a94604a 100644 --- a/board/esd/plu405/plu405.c +++ b/board/esd/plu405/plu405.c @@ -237,18 +237,18 @@ int checkboard (void) }

#ifdef CONFIG_IDE_RESET +#define FPGA_CTRL (CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL) void ide_set_reset(int on) { - volatile unsigned short *fpga_mode = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL); - /* * Assert or deassert CompactFlash Reset Pin */ if (on) { /* assert RESET */ - *fpga_mode &= ~(CONFIG_SYS_FPGA_CTRL_CF_RESET); + out_be16((void *)FPGA_CTRL, + in_be16((void *)FPGA_CTRL) & ~CONFIG_SYS_FPGA_CTRL_CF_RESET); } else { /* release RESET */ - *fpga_mode |= CONFIG_SYS_FPGA_CTRL_CF_RESET; + out_be16((void *)FPGA_CTRL, + in_be16((void *)FPGA_CTRL) | CONFIG_SYS_FPGA_CTRL_CF_RESET); } } #endif /* CONFIG_IDE_RESET */ diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index 7808d4d..0fbc3dc 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -242,7 +242,7 @@ int do_fifo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) "address %08x\n", n, data, f); for (i=0; i<n; i++) - out32(f, data); + out_be32((void *)f, data); } } else { printf("Usage:\nfifo %s\n", cmdtp->help); diff --git a/board/esd/pmc440/pmc440.c b/board/esd/pmc440/pmc440.c index 3824105..2ab944d 100644 --- a/board/esd/pmc440/pmc440.c +++ b/board/esd/pmc440/pmc440.c @@ -107,31 +107,31 @@ int board_early_init_f(void) * Setup the GPIO pins * TODO: setup GPIOs via CONFIG_SYS_4xx_GPIO_TABLE in board's config file */ - out32(GPIO0_OR, 0x40000102); - out32(GPIO0_TCR, 0x4c90011f); - out32(GPIO0_OSRL, 0x28051400); - out32(GPIO0_OSRH, 0x55005000); - out32(GPIO0_TSRL, 0x08051400); - out32(GPIO0_TSRH, 0x55005000); - out32(GPIO0_ISR1L, 0x54000000); - out32(GPIO0_ISR1H, 0x00000000); - out32(GPIO0_ISR2L, 0x44000000); - out32(GPIO0_ISR2H, 0x00000100); - out32(GPIO0_ISR3L, 0x00000000); - out32(GPIO0_ISR3H, 0x00000000); - - out32(GPIO1_OR, 0x80002408); - out32(GPIO1_TCR, 0xd6003c08); - out32(GPIO1_OSRL, 0x0a5a0000); - out32(GPIO1_OSRH, 0x00000000); - out32(GPIO1_TSRL, 0x00000000); - out32(GPIO1_TSRH, 0x00000000); - out32(GPIO1_ISR1L, 0x00005555); - out32(GPIO1_ISR1H, 0x40000000); - out32(GPIO1_ISR2L, 0x04010000); - out32(GPIO1_ISR2H, 0x00000000); - out32(GPIO1_ISR3L, 0x01400000); - out32(GPIO1_ISR3H, 0x00000000); + out_be32((void *)GPIO0_OR, 0x40000102); + out_be32((void *)GPIO0_TCR, 0x4c90011f); + out_be32((void *)GPIO0_OSRL, 0x28051400); + out_be32((void *)GPIO0_OSRH, 0x55005000); + out_be32((void *)GPIO0_TSRL, 0x08051400); + out_be32((void *)GPIO0_TSRH, 0x55005000); + out_be32((void *)GPIO0_ISR1L, 0x54000000); + out_be32((void *)GPIO0_ISR1H, 0x00000000); + out_be32((void *)GPIO0_ISR2L, 0x44000000); + out_be32((void *)GPIO0_ISR2H, 0x00000100); + out_be32((void *)GPIO0_ISR3L, 0x00000000); + out_be32((void *)GPIO0_ISR3H, 0x00000000); + + out_be32((void *)GPIO1_OR, 0x80002408); + out_be32((void *)GPIO1_TCR, 0xd6003c08); + out_be32((void *)GPIO1_OSRL, 0x0a5a0000); + out_be32((void *)GPIO1_OSRH, 0x00000000); + out_be32((void *)GPIO1_TSRL, 0x00000000); + out_be32((void *)GPIO1_TSRH, 0x00000000); + out_be32((void *)GPIO1_ISR1L, 0x00005555); + out_be32((void *)GPIO1_ISR1H, 0x40000000); + out_be32((void *)GPIO1_ISR2L, 0x04010000); + out_be32((void *)GPIO1_ISR2H, 0x00000000); + out_be32((void *)GPIO1_ISR3L, 0x01400000); + out_be32((void *)GPIO1_ISR3H, 0x00000000);

/* patch PLB:PCI divider for 66MHz PCI */ mfcpr(clk_spcid, reg); @@ -804,17 +804,20 @@ int eeprom_write_enable(unsigned dev_addr, int state) switch (state) { case 1: /* Enable write access, clear bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) & ~GPIO0_EP_EEP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) & ~GPIO0_EP_EEP); state = 0; break; case 0: /* Disable write access, set bit GPIO_SINT2. */ - out32(GPIO0_OR, in32(GPIO0_OR) | GPIO0_EP_EEP); + out_be32((void *)GPIO0_OR, + in_be32((void *)GPIO0_OR) | GPIO0_EP_EEP); state = 0; break; default: /* Read current status back. */ - state = (0 == (in32(GPIO0_OR) & GPIO0_EP_EEP)); + state = (0 == (in_be32((void *)GPIO0_OR) + & GPIO0_EP_EEP)); break; } } diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c index 80ff237..760c71d 100644 --- a/board/esd/tasreg/tasreg.c +++ b/board/esd/tasreg/tasreg.c @@ -25,6 +25,7 @@ #include <command.h> #include <malloc.h> #include <asm/m5249.h> +#include <asm/io.h>

/* Prototypes */ @@ -118,7 +119,7 @@ phys_size_t initdram (int board_type) {

/** Precharge sequence **/ mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */ - *((volatile unsigned long *) 0x00) = junk; /* write to a memory location to init. precharge */ + out_be32((void *)0, junk); /* write to a memory location to init. precharge */ udelay(0x10); /* Allow several Precharge cycles */

/** Refresh Sequence **/ @@ -127,7 +128,7 @@ phys_size_t initdram (int board_type) {

/** Mode Register initialization **/ mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */ - *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */ + out_be32((void *)0x800, junk); /* Access RAM to initialize the mode register */

return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; }; @@ -258,7 +259,7 @@ int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { uchar buf[8];

- *(volatile ushort *)0xe0000000 = 0x4000; + out_be16((void *)0xe0000000, 0x4000);

udelay(5000); /* wait for 5ms */

diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c index 5480105..96a04b3 100644 --- a/board/esd/voh405/voh405.c +++ b/board/esd/voh405/voh405.c @@ -297,18 +297,18 @@ int checkboard (void) }

#ifdef CONFIG_IDE_RESET +#define FPGA_MODE (CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL) void ide_set_reset(int on) { - volatile unsigned short *fpga_mode = - (unsigned short *)((ulong)CONFIG_SYS_FPGA_BASE_ADDR + CONFIG_SYS_FPGA_CTRL); - /* * Assert or deassert CompactFlash Reset Pin */ if (on) { /* assert RESET */ - *fpga_mode &= ~(CONFIG_SYS_FPGA_CTRL_CF_RESET); + out_be16((void *)FPGA_MODE, + in_be16((void *)FPGA_MODE) & ~CONFIG_SYS_FPGA_CTRL_CF_RESET); } else { /* release RESET */ - *fpga_mode |= CONFIG_SYS_FPGA_CTRL_CF_RESET; + out_be16((void *)FPGA_MODE, + in_be16((void *)FPGA_MODE) | CONFIG_SYS_FPGA_CTRL_CF_RESET); } } #endif /* CONFIG_IDE_RESET */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index ed9a235..9233523 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -413,23 +413,6 @@

#define CONFIG_SYS_FPGA_BASE_ADDR 0xF0100100 /* FPGA internal Base Address */

-/* FPGA internal regs */ -#define CONFIG_SYS_FPGA_CTRL 0x000 - -/* FPGA Control Reg */ -#define CONFIG_SYS_FPGA_CTRL_REV0 0x0001 -#define CONFIG_SYS_FPGA_CTRL_REV1 0x0002 -#define CONFIG_SYS_FPGA_CTRL_VGA0_BL 0x0004 -#define CONFIG_SYS_FPGA_CTRL_VGA0_BL_MODE 0x0008 -#define CONFIG_SYS_FPGA_CTRL_CF_RESET 0x0040 -#define CONFIG_SYS_FPGA_CTRL_PS2_PWR 0x0080 -#define CONFIG_SYS_FPGA_CTRL_CF_PWRN 0x0100 /* low active */ -#define CONFIG_SYS_FPGA_CTRL_CF_BUS_EN 0x0200 -#define CONFIG_SYS_FPGA_CTRL_LCD_CLK 0x7000 /* Mask for lcd clock */ -#define CONFIG_SYS_FPGA_CTRL_OW_ENABLE 0x8000 - -#define CONFIG_SYS_FPGA_STATUS_CF_DETECT 0x8000 - #define LCD_CLK_OFF 0x0000 /* Off */ #define LCD_CLK_02083 0x1000 /* 2.083 MHz */ #define LCD_CLK_03135 0x2000 /* 3.135 MHz */

-- 1.6.1

Matthias Fuchs

5:17 p.m.

New subject: [U-Boot] [PATCH 4/6] ppc4xx: Cleanup linker scripts of esd 4xx boards

This might be a candidate for the next branch. It applies cleanly to that one.

Matthias

On Friday 20 February 2009 10:19, matthias.fuchs@esd.eu wrote:

...

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

Signed-off-by: Matthias Fuchs matthias.fuchs@esd.eu

board/esd/adciop/u-boot.lds | 4 ---- board/esd/apc405/u-boot.lds | 15 --------------- board/esd/ar405/u-boot.lds | 28 ---------------------------- board/esd/ash405/u-boot.lds | 15 --------------- board/esd/canbt/u-boot.lds | 26 -------------------------- board/esd/cms700/u-boot.lds | 15 --------------- board/esd/cpci2dp/u-boot.lds | 15 --------------- board/esd/cpciiser4/u-boot.lds | 15 --------------- board/esd/dasa_sim/u-boot.lds | 26 -------------------------- board/esd/dp405/u-boot.lds | 16 ---------------- board/esd/du405/u-boot.lds | 15 --------------- board/esd/du440/u-boot.lds | 3 --- board/esd/hh405/u-boot.lds | 15 --------------- board/esd/hub405/u-boot.lds | 16 ---------------- board/esd/pci405/u-boot.lds | 15 --------------- board/esd/plu405/u-boot.lds | 3 --- board/esd/pmc405/u-boot.lds | 15 --------------- board/esd/pmc440/u-boot.lds | 3 --- board/esd/voh405/u-boot.lds | 16 ---------------- board/esd/vom405/u-boot.lds | 3 --- board/esd/wuh405/u-boot.lds | 15 --------------- board/g2000/u-boot.lds | 16 ---------------- 22 files changed, 0 insertions(+), 310 deletions(-)

diff --git a/board/esd/adciop/u-boot.lds b/board/esd/adciop/u-boot.lds index e918163..992c4fa 100644 --- a/board/esd/adciop/u-boot.lds +++ b/board/esd/adciop/u-boot.lds @@ -57,11 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

*(.text) *(.fixup)

diff --git a/board/esd/apc405/u-boot.lds b/board/esd/apc405/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/apc405/u-boot.lds +++ b/board/esd/apc405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/ar405/u-boot.lds b/board/esd/ar405/u-boot.lds index 2c1cf92..a5e2aa8 100644 --- a/board/esd/ar405/u-boot.lds +++ b/board/esd/ar405/u-boot.lds @@ -57,35 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

drivers/net/4xx_enet.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_ppc/board.o (.text)

lib_generic/zlib.o (.text)

common/cmd_boot.o (.text)

common/cmd_bootm.o (.text)

common/cmd_flash.o (.text)

common/cmd_mem.o (.text)

common/cmd_nvedit.o (.text)

common/console.o (.text)

common/main.o (.text)

-/*

. = DEFINED(env_offset) ? env_offset : .;

common/env_embedded.o (.ppcenv)

-*/

common/env_embedded.o (.text)

*(.text) *(.fixup)

diff --git a/board/esd/ash405/u-boot.lds b/board/esd/ash405/u-boot.lds index e2e2512..9f5a46e 100644 --- a/board/esd/ash405/u-boot.lds +++ b/board/esd/ash405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/canbt/u-boot.lds b/board/esd/canbt/u-boot.lds index 74280e6..a5e2aa8 100644 --- a/board/esd/canbt/u-boot.lds +++ b/board/esd/canbt/u-boot.lds @@ -57,33 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_ppc/extable.o (.text)

lib_ppc/board.o (.text)

lib_generic/zlib.o (.text)

lib_generic/crc32.o (.text)

common/cmd_boot.o (.text)

common/cmd_bootm.o (.text)

common/cmd_flash.o (.text)

common/cmd_mem.o (.text)

common/cmd_nvedit.o (.text)

common/console.o (.text)

common/main.o (.text)

net/net.o (.text)

-/* . = env_offset;

common/env_embedded.o (.text)

-*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/cms700/u-boot.lds b/board/esd/cms700/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/cms700/u-boot.lds +++ b/board/esd/cms700/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/cpci2dp/u-boot.lds b/board/esd/cpci2dp/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/cpci2dp/u-boot.lds +++ b/board/esd/cpci2dp/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/cpciiser4/u-boot.lds b/board/esd/cpciiser4/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/cpciiser4/u-boot.lds +++ b/board/esd/cpciiser4/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index 6acf7b8..be164fc 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -57,33 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/iop480_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_ppc/extable.o (.text)

lib_ppc/board.o (.text)

lib_generic/zlib.o (.text)

lib_generic/crc32.o (.text)

common/cmd_boot.o (.text)

common/cmd_bootm.o (.text)

common/cmd_flash.o (.text)

common/cmd_mem.o (.text)

common/cmd_nvedit.o (.text)

common/console.o (.text)

common/main.o (.text)

board/esd/dasa_sim/flash.o (.text)

common/cmd_nvedit.o (.text)

board/esd/dasa_sim/cmd_dasa_sim.o (.text)

net/bootp.o (.text)

. = env_offset; common/env_embedded.o(.text)

diff --git a/board/esd/dp405/u-boot.lds b/board/esd/dp405/u-boot.lds index d8fbea3..5d59761 100644 --- a/board/esd/dp405/u-boot.lds +++ b/board/esd/dp405/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

drivers/net/4xx_enet.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/du405/u-boot.lds b/board/esd/du405/u-boot.lds index 858ae61..4a79624 100644 --- a/board/esd/du405/u-boot.lds +++ b/board/esd/du405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/du440/u-boot.lds b/board/esd/du440/u-boot.lds index 05152b7..d95136c 100644 --- a/board/esd/du440/u-boot.lds +++ b/board/esd/du440/u-boot.lds @@ -62,9 +62,6 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

*(.text)

diff --git a/board/esd/hh405/u-boot.lds b/board/esd/hh405/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/hh405/u-boot.lds +++ b/board/esd/hh405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/hub405/u-boot.lds b/board/esd/hub405/u-boot.lds index 6908106..9f5a46e 100644 --- a/board/esd/hub405/u-boot.lds +++ b/board/esd/hub405/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

drivers/net/4xx_enet.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/pci405/u-boot.lds b/board/esd/pci405/u-boot.lds index 9697cc6..5d59761 100644 --- a/board/esd/pci405/u-boot.lds +++ b/board/esd/pci405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/plu405/u-boot.lds b/board/esd/plu405/u-boot.lds index fd5f3df..9f5a46e 100644 --- a/board/esd/plu405/u-boot.lds +++ b/board/esd/plu405/u-boot.lds @@ -57,9 +57,6 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

*(.text)

diff --git a/board/esd/pmc405/u-boot.lds b/board/esd/pmc405/u-boot.lds index ca615f5..d078cb7 100644 --- a/board/esd/pmc405/u-boot.lds +++ b/board/esd/pmc405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/pmc440/u-boot.lds b/board/esd/pmc440/u-boot.lds index 05152b7..d95136c 100644 --- a/board/esd/pmc440/u-boot.lds +++ b/board/esd/pmc440/u-boot.lds @@ -62,9 +62,6 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

*(.text)

diff --git a/board/esd/voh405/u-boot.lds b/board/esd/voh405/u-boot.lds index d8fbea3..5d59761 100644 --- a/board/esd/voh405/u-boot.lds +++ b/board/esd/voh405/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

drivers/net/4xx_enet.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/esd/vom405/u-boot.lds b/board/esd/vom405/u-boot.lds index c9472f9..5d59761 100644 --- a/board/esd/vom405/u-boot.lds +++ b/board/esd/vom405/u-boot.lds @@ -57,9 +57,6 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

*(.text)

diff --git a/board/esd/wuh405/u-boot.lds b/board/esd/wuh405/u-boot.lds index e2e2512..9f5a46e 100644 --- a/board/esd/wuh405/u-boot.lds +++ b/board/esd/wuh405/u-boot.lds @@ -57,22 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)
diff --git a/board/g2000/u-boot.lds b/board/g2000/u-boot.lds index d8fbea3..5d59761 100644 --- a/board/g2000/u-boot.lds +++ b/board/g2000/u-boot.lds @@ -57,23 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : {

/* WARNING - the following is hand-optimized to fit within */

/* the sector layout of our flash chips! XXX FIXME XXX */

cpu/ppc4xx/start.o (.text)

cpu/ppc4xx/traps.o (.text)

cpu/ppc4xx/interrupts.o (.text)

cpu/ppc4xx/4xx_uart.o (.text)

cpu/ppc4xx/cpu_init.o (.text)

cpu/ppc4xx/speed.o (.text)

drivers/net/4xx_enet.o (.text)

common/dlmalloc.o (.text)

lib_generic/crc32.o (.text)

lib_ppc/extable.o (.text)

lib_generic/zlib.o (.text)

-/* . = env_offset;*/ -/* common/env_embedded.o(.text)*/
 *(.text)
 *(.fixup)

-- ------------------------------------------------------------------------- Dipl.-Ing. Matthias Fuchs Head of System Design esd electronic system design gmbh Vahrenwalder Str. 207 - 30165 Hannover - GERMANY Phone: +49-511-37298-0 - Fax: +49-511-37298-68 Please visit our homepage http://www.esd.eu Quality Products - Made in Germany ------------------------------------------------------------------------- Geschäftsführer: Klaus Detering, Dr. Werner Schulze Amtsgericht Hannover HRB 51373 - VAT-ID DE 115672832 -------------------------------------------------------------------------

Stefan Roese

23 Feb 23 Feb

4:53 p.m.

New subject: [U-Boot] [PATCH 1/6] ppc4xx: Abort autoboot only by space key on CPCI405 boards

On Friday 20 February 2009, matthias.fuchs@esd.eu wrote:

...

From: Matthias Fuchs matthias.fuchs@esd-electronics.com

Signed-off-by: Matthias Fuchs matthias.fuchs@esd-electronics.com

All patches applied to ppc4xx/next. Thanks.

Best regards, Stefan

===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================

Wolfgang Denk

10:44 p.m.

New subject: [U-Boot] [PATCH 1/6] ppc4xx: Abort autoboot only by space key on CPCI405 boards

Dear Stefan Roese,

In message 200902231653.23766.sr@denx.de you wrote:

...

On Friday 20 February 2009, matthias.fuchs@esd.eu wrote:

...
From: Matthias Fuchs matthias.fuchs@esd-electronics.com

Signed-off-by: Matthias Fuchs matthias.fuchs@esd-electronics.com

All patches applied to ppc4xx/next. Thanks.

Feel free to send a pull request for the next branch, so they don;t get out of sync...

Best regards,

Wolfgang Denk

-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de Ill-chosen abstraction is particularly evident in the design of the ADA runtime system. The interface to the ADA runtime system is so opaque that it is impossible to model or predict its performance, making it effectively useless for real-time systems. - Marc D. Donner and David H. Jameson.

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Matthias Fuchs
matthias.fuchs＠esd.eu
Stefan Roese
Wolfgang Denk