[U-Boot] 2010.09-rc1 SD/MMC tested on Atmel AT91SAM9G45EKES - works
Reinhard - FYI, your 2010.09-rc1 SD/MMC patches work on an Atmel 9G45 evaluation kit. I customized the board and configuration files following the directions in README.atmel_mci and everything works as expected. I included the console output from a test boot below in case there is some information in the debugging messages that is of interest.
Thanks, Bill Landolina.
--------------------------------------------- U-Boot 2010.09-rc1 (Sep 11 2010 - 22:43:16) DRAM: 128 MiB ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB Flash: 0 Bytes NAND: 256 MiB In: serial Out: serial Err: serial MMC: WCL MCI Init at91sam9m10g45_devices.c:192 mci: 0 Net: macb0 Hit any key to stop autoboot: 0 UB-X1> mmcinfo mci: setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Failed mci: setting clock 260416 Hz, block size 512 mci: setting clock 22222222 Hz, block size 512 Device: mci Manufacturer ID: 1b OEM: 534d Name: SMI Tran Speed: 25000000 Rd Block Len: 512 SD version 1.10 High Capacity: No Capacity: 1017643008 Bus Width: 4-bit UB-X1> fatls mmc 0 5805 test.c 2160828 uimage.bin
2 file(s), 0 dir(s)
UB-X1> fatload mmc 0 22000000 uimage.bin reading uimage.bin
2160828 bytes read UB-X1> bootm ## Booting kernel from Legacy Image at 22000000 ... Image Name: Linux-2.6.30-ts-armv5l Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 2160764 Bytes = 2.1 MiB Load Address: 70008000 Entry Point: 70008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK
Starting kernel ...
Uncompressing Linux......................................................................................................................................... done, booting the kernel. Linux version 2.6.30-ts-armv5l (root@localhost.localdomain) (gcc version 4.4.4 (GCC) ) #1 PREEMPT Sat Aug 28 14:24:26 EDT 2010
Dear William C. Landolina,
Reinhard - FYI, your 2010.09-rc1 SD/MMC patches work on an Atmel 9G45 evaluation kit. I customized the board and configuration files following the directions in README.atmel_mci and everything works as expected. I included the console output from a test boot below in case there is some information in the debugging messages that is of interest.
Thank you!
UB-X1> mmcinfo
mci: setting clock 260416 Hz, block size 512
mci: setting clock 260416 Hz, block size 512
mci: setting clock 260416 Hz, block size 512
gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Failed
Seems the card does not understand the CMD8 (Voltage supplied)
mci: setting clock 260416 Hz, block size 512
mci: setting clock 22222222 Hz, block size 512
The function that sets clock and blocksize is repeatedly called by the common MMC framework, one might want to make that output debug only. Fot the time being, however, its good to see that the calculated clock is less than what the card can handle. What clocks does you system use? Xtal/PLL/PBI?
Reinhard
Dear William C. Landolina,
<snip>
UB-X1> mmcinfo mci: setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 mci: setting clock 260416 Hz, block size 512 gen_atmel_mci: CMDR 00001048 ( 8) ARGR 000001aa (SR: 0c100025) Command Failed
Seems the card does not understand the CMD8 (Voltage supplied)
Mmcinfo lists this card as conforming to the SDCard 1.10 specification, but the voltage configuration command wasn't defined until version 2.0. The SDCard I'm testing with is definitely an old generic card.
The text I found describing CMD8: "After the card enters idle state with a CMD0, send a CMD8 with argument of 0x000001AA and correct CRC prior to initialization process. When the CMD8 is rejected with an illigal command error (0x05), the card is SDC V1 or MMC. When the CMD8 is accepted, R7 response (R1(0x01) and trailing 32 bit data) will be returned. The lower 12 bits in the return value 0x1AA means that the card is SDC V2 and it can work at voltage range of 2.7 to 3.6 volts. If not the case, the card must be rejected. And then initiate initialization with ACMD41 with HCS (bit 30). After the initialization completed, read OCR and check CCS (bit 30) in the OCR. When it is set, subsequent data read/write operations that described below are commanded in block address insted of byte address. The block size is always fixed to 512 bytes."
The web page with the CMD8 description came out of Google's cache [http://webcache.googleusercontent.com/search?q=cache:5IE3l8XsBq0J:elm-chan.o...]. There is also a document from Samsung that list CMD8 as a difference between MMC and SDCard 2.0: http://www.samsung.com/global/business/semiconductor/products/flash/download...
mci: setting clock 260416 Hz, block size 512 mci: setting clock 22222222 Hz, block size 512 The function that sets clock and blocksize is repeatedly called by the common MMC framework, one might want to make that output debug only. Fot the time being, however, its good to see that the calculated clock is less than what the card can handle. What clocks does you system use? Xtal/PLL/PBI?
The Atmel 9G45 evaluation board uses a 12MHz crystal and internal PLLs. CPU clock is 400MHz. I'm using the stock 9G45EKES configuration and haven't looked at what other frequencies the other system clocks are running.
The "setting clock" message is a straight up printf() in drivers/mmc/gen_atmel_mci.c rather than a debug() message. This seems to be the only printf that isn't conditioned on DEBUG so it is probably an oversight that should be corrected.
I am working on a 9G45 product that will be released early next year and I expect to post board support patches for that with MMC support, but before that I don't plan to post my hacks to Atmel's evaluation board BSP - I'll freely share my code as-is with anyone who wants to make patches for the Atmel distribution, but my main goal is to learn what I need to know to make a clean BSP for my product.
Thanks, Bill.
participants (2)
-
Reinhard Meyer -
William C. Landolina