In message BAY2-F10Hzo79WlPqLo0001ba66@hotmail.com you wrote:

...

I check the structure before I posted this question. I also tried to

include

...

u-boot.h. But still no luck. The kernel is always stuck at the first C function call.

Let's go back a few steps.

How do you know that? And what exactly means "stuck" in this context?

I put the following piece of code in head_4xx.S:

lis r17, UART1_BASE@h addi r17, r17, UART1_BASE@l li r18, '1' stb r18, 0(r17) sync

bl early_init /* We have to do this with MMU on */

lis r17, UART1_BASE@h addi r17, r17, UART1_BASE@l li r18, '2' stb r18, 0(r17) sync

early_init is the c functional. From the console I can see '1' but no '2', which is expected after early_init is done.

I also put the UART code to the setup.c/early_init() right after it is called. No output either. So I guess the C function call got some problem.

I remember I had somewhat similiar when I touched u-boot at the very beginning. At that time I put u-boot code in flash starting from FF800000 but forgot to change the TEXT_BASE in board/walnut405/config.mk. The u-boot did run at that time but I couldn't call C function. Fortunately I found this mistake right away. But this time it doesn't seem like the same solution. The kernel was relocated by the u-boot to 0x0 and the TLB did set map 0xC0000000 to 0x0. This makes me doubt the setting of sdram is not correct.

BTW, could anybody tell me how to calcuate the value of SDRAM0_RTR? For example, I have a SDRAM with 100MHz and I want to get 15.2us interval, thus the value should be 15.2us / 10ns = 1520 = 0x5F0, the register value should be 0x2F800000. But on my hardware spec the value is 0x0FD00000, which doesn't look correct to me. If I use 100MHz and want to get 7.6us interval, the value should be 0x2F8, then the register value should be 0x17C00000, is it right?

Frank

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