Currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.

For PowerPC mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the entry offset of the first entry. It can be 0xeff40000 or 0xfff40000 for nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start" should be set to CONFIG_SYS_TEXT_BASE.

'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + Image size != 4gb.

Add new property 'skip-at-start' in Section class so that '_skip_at_start' can be calculated either based on 'end-at-4gb' or based on "skip-at-start".

Add a test case to check that 'skip-at-start' and 'end-at-4gb' property can't be used together.

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com Reviewed-by: Bin Meng bmeng.cn@gmail.com --- Changes for v2: - Renamed 'start-pos' property to 'skip-at-start' - Updated README

Changes for v3: - Modification as per Simon Glass's comments - Added test case for 'skip-at-start' property

tools/binman/README | 9 +++++++++ tools/binman/bsection.py | 15 +++++++++++---- tools/binman/ftest.py | 8 ++++++++ .../test/80_4gb_and_skip_at_start_together.dts | 21 +++++++++++++++++++++ 4 files changed, 49 insertions(+), 4 deletions(-) create mode 100644 tools/binman/test/80_4gb_and_skip_at_start_together.dts

diff --git a/tools/binman/README b/tools/binman/README index cb34171..7cd33d4 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -397,6 +397,15 @@ end-at-4gb: 8MB ROM, the offset of the first entry would be 0xfff80000 with this option, instead of 0 without this option.

+skip-at-start: + This property specifies the entry offset of the first entry. + + For PowerPC mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the entry + offset of the first entry. It can be 0xeff40000 or 0xfff40000 for + nor flash boot, 0x201000 for sd boot etc. + + 'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + + Image size != 4gb.

Examples of the above options can be found in the tests. See the tools/binman/test directory. diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..5910092 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -59,7 +59,7 @@ class Section(object): self._pad_after = 0 self._pad_byte = 0 self._sort = False - self._skip_at_start = 0 + self._skip_at_start = None self._end_4gb = False self._name_prefix = '' self._entries = OrderedDict() @@ -79,10 +79,17 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') - if self._end_4gb and not self._size: - self._Raise("Section size must be provided when using end-at-4gb") + self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start') if self._end_4gb: - self._skip_at_start = 0x100000000 - self._size + if not self._size: + self._Raise("Section size must be provided when using end-at-4gb") + if self._skip_at_start is not None: + self._Raise("Provide either 'end-at-4gb' or 'skip-at-start'") + else: + self._skip_at_start = 0x100000000 - self._size + else: + if self._skip_at_start is None: + self._skip_at_start = 0 self._name_prefix = fdt_util.GetString(self._node, 'name-prefix')

def _ReadEntries(self): diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index a8456c2..36519a2 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -711,6 +711,14 @@ class TestFunctional(unittest.TestCase): self.assertIn("Section '/binman': Section size must be provided when " "using end-at-4gb", str(e.exception))

+ def test4gbAndSkipAtStartTogether(self): + """Test that the end-at-4gb and skip-at-size property can't be used + together""" + with self.assertRaises(ValueError) as e: + self._DoTestFile('80_4gb_and_skip_at_start_together.dts') + self.assertIn("Section '/binman': Provide either 'end-at-4gb' or " + "'skip-at-start'", str(e.exception)) + def testPackX86RomOutside(self): """Test that the end-at-4gb property checks for offset boundaries""" with self.assertRaises(ValueError) as e: diff --git a/tools/binman/test/80_4gb_and_skip_at_start_together.dts b/tools/binman/test/80_4gb_and_skip_at_start_together.dts new file mode 100644 index 0000000..90c467d --- /dev/null +++ b/tools/binman/test/80_4gb_and_skip_at_start_together.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + size = <32>; + sort-by-offset; + end-at-4gb; + skip-at-start = <0xffffffe0>; + u-boot { + offset = <0xffffffe0>; + }; + }; +};

This entry contains the PowerPC mpc85xx boot page and resetvec sections.

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Updated README for new binman entry - Added test

Changes for v3: - Changed text from 'Powerpc' to 'PowerPC'

tools/binman/README.entries | 14 +++++++++++- .../etype/powerpc_mpc85xx_bootpg_resetvec.py | 25 ++++++++++++++++++++++ tools/binman/ftest.py | 8 +++++++ .../test/81_powerpc_mpc85xx_bootpg_resetvec.dts | 16 ++++++++++++++ 4 files changed, 62 insertions(+), 1 deletion(-) create mode 100644 tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py create mode 100644 tools/binman/test/81_powerpc_mpc85xx_bootpg_resetvec.dts

diff --git a/tools/binman/README.entries b/tools/binman/README.entries index c6e7b22..6c78fb3 100644 --- a/tools/binman/README.entries +++ b/tools/binman/README.entries @@ -221,6 +221,18 @@ See README.x86 for information about Intel binary blobs.

+Entry: powerpc-mpc85xx-bootpg-resetvec: PowerPC mpc85xx bootpg + resetvec code for U-Boot +----------------------------------------------------------------------------------------- + +Properties / Entry arguments: + - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') + +This enrty is valid for PowerPC mpc85xx cpus. This entry holds +'bootpg + resetvec' code for PowerPC mpc85xx CPUs which needs to be +placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. + + + Entry: section: Entry that contains other entries -------------------------------------------------

@@ -543,7 +555,7 @@ Properties / Entry arguments: - kernelkey: Name of the kernel key to use (inside keydir) - preamble-flags: Value of the vboot preamble flags (typically 0)

-Chromium OS signs the read-write firmware and kernel, writing the signature +Chromium OS signs the read-write firmware and kernel, writing the signature in this block. This allows U-Boot to verify that the next firmware stage and kernel are genuine.

diff --git a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py new file mode 100644 index 0000000..59fedd2 --- /dev/null +++ b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2018 NXP +# +# Entry-type module for the PowerPC mpc85xx bootpg and resetvec code for U-Boot +# + +from entry import Entry +from blob import Entry_blob + +class Entry_powerpc_mpc85xx_bootpg_resetvec(Entry_blob): + """PowerPC mpc85xx bootpg + resetvec code for U-Boot + + Properties / Entry arguments: + - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') + + This enrty is valid for PowerPC mpc85xx cpus. This entry holds + 'bootpg + resetvec' code for PowerPC mpc85xx CPUs which needs to be + placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. + """ + + def __init__(self, section, etype, node): + Entry_blob.__init__(self, section, etype, node) + + def GetDefaultFilename(self): + return 'u-boot-br.bin' diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 36519a2..924701a 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -39,6 +39,7 @@ U_BOOT_SPL_DTB_DATA = 'spldtb' U_BOOT_TPL_DTB_DATA = 'tpldtb' X86_START16_DATA = 'start16' X86_START16_SPL_DATA = 'start16spl' +PPC_MPC85XX_BR_DATA = 'ppcmpc85xxbr' U_BOOT_NODTB_DATA = 'nodtb with microcode pointer somewhere in here' U_BOOT_SPL_NODTB_DATA = 'splnodtb with microcode pointer somewhere in here' FSP_DATA = 'fsp' @@ -90,6 +91,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('vga.bin', VGA_DATA) self._ResetDtbs() TestFunctional._MakeInputFile('u-boot-x86-16bit.bin', X86_START16_DATA) + TestFunctional._MakeInputFile('u-boot-br.bin', PPC_MPC85XX_BR_DATA) TestFunctional._MakeInputFile('spl/u-boot-x86-16bit-spl.bin', X86_START16_SPL_DATA) TestFunctional._MakeInputFile('u-boot-nodtb.bin', U_BOOT_NODTB_DATA) @@ -764,6 +766,12 @@ class TestFunctional(unittest.TestCase): data = self._DoReadFile('33_x86-start16.dts') self.assertEqual(X86_START16_DATA, data[:len(X86_START16_DATA)])

+ def testPackPowerpcMpc85xxBootpgResetvec(self): + """Test that an image with powerpc-mpc85xx-bootpg-resetvec can be + created""" + data = self._DoReadFile('81_powerpc_mpc85xx_bootpg_resetvec.dts') + self.assertEqual(PPC_MPC85XX_BR_DATA, data[:len(PPC_MPC85XX_BR_DATA)]) + def _RunMicrocodeTest(self, dts_fname, nodtb_data, ucode_second=False): """Handle running a test for insertion of microcode

diff --git a/tools/binman/test/81_powerpc_mpc85xx_bootpg_resetvec.dts b/tools/binman/test/81_powerpc_mpc85xx_bootpg_resetvec.dts new file mode 100644 index 0000000..8f4b16c --- /dev/null +++ b/tools/binman/test/81_powerpc_mpc85xx_bootpg_resetvec.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + powerpc-mpc85xx-bootpg-resetvec { + }; + }; +};

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com Reviewed-by: Bin Meng bmeng.cn@gmail.com --- Changes for v2: - Remove mpc85xx-u-boot.dtsi - Update u-boot.dtsi to use CONFIG_MPC85XX_HAVE_RESET_VECTOR

Changes for v3: - Use 'sort-by-offset' property instead of 'sort-by-pos'

arch/powerpc/dts/u-boot.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/powerpc/dts/u-boot.dtsi

diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi new file mode 100644 index 0000000..213d543 --- /dev/null +++ b/arch/powerpc/dts/u-boot.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <config.h> + +/ { + binman { + filename = "u-boot-with-dtb.bin"; + skip-at-start = <CONFIG_SYS_TEXT_BASE>; + sort-by-offset; + pad-byte = <0xff>; + size = <CONFIG_SYS_MONITOR_LEN>; + + u-boot-with-ucode-ptr { + offset = <CONFIG_SYS_TEXT_BASE>; + optional-ucode; + }; + + u-boot-dtb-with-ucode { +#ifdef CONFIG_MPC85xx + align = <256>; +#endif + }; +#ifdef CONFIG_MPC85XX_HAVE_RESET_VECTOR + powerpc-mpc85xx-bootpg-resetvec { + offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>; + }; +#endif + }; +};

Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled.

Update board README for device tree usage.

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com Reviewed-by: Bin Meng bmeng.cn@gmail.com --- Changes for v2: - Enable CONFIG_MPC85XX_HAVE_RESET_VECTOR in T2080QDS_defconfig - README and commit message changes as per Bin Meng's comments

No changes for v3.

arch/powerpc/dts/Makefile | 2 ++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 ++++++++++++++++++++++ arch/powerpc/dts/t2080.dtsi | 62 +++++++++++++++++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++++++ board/freescale/t208xqds/README | 19 +++++++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 4 ++- 9 files changed, 148 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts

diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index de14e7b..a19aa56 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+

+dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb + targets += $(dtb-y)

# Add any required device tree compiler flags here diff --git a/arch/powerpc/dts/e6500_power_isa.dtsi b/arch/powerpc/dts/e6500_power_isa.dtsi new file mode 100644 index 0000000..1b06170 --- /dev/null +++ b/arch/powerpc/dts/e6500_power_isa.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * e6500 Power ISA Device Tree Source (include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/ { + cpus { + power-isa-version = "2.06"; + power-isa-b; // Base + power-isa-e; // Embedded + power-isa-atb; // Alternate Time Base + power-isa-cs; // Cache Specification + power-isa-ds; // Decorated Storage + power-isa-e.ed; // Embedded.Enhanced Debug + power-isa-e.pd; // Embedded.External PID + power-isa-e.hv; // Embedded.Hypervisor + power-isa-e.le; // Embedded.Little-Endian + power-isa-e.pm; // Embedded.Performance Monitor + power-isa-e.pc; // Embedded.Processor Control + power-isa-ecl; // Embedded Cache Locking + power-isa-exp; // External Proxy + power-isa-fp; // Floating Point + power-isa-fp.r; // Floating Point.Record + power-isa-mmc; // Memory Coherence + power-isa-scpm; // Store Conditional Page Mobility + power-isa-wt; // Wait + power-isa-64; // 64-bit + power-isa-e.pt; // Embedded.Page Table + power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT + power-isa-e.em; // Embedded Multi-Threading + power-isa-v; // Vector (AltiVec) + fsl,eref-er; // Enhanced Reservations + fsl,eref-deo; // Data Cache Extended Operations + mmu-type = "power-embedded"; + }; +}; diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi new file mode 100644 index 0000000..db65ea5 --- /dev/null +++ b/arch/powerpc/dts/t2080.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * T2080/T2081 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/dts-v1/; + +/include/ "e6500_power_isa.dtsi" + +/ { + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e6500@0 { + device_type = "cpu"; + reg = <0 1>; + fsl,portid-mapping = <0x80000000>; + }; + cpu1: PowerPC,e6500@2 { + device_type = "cpu"; + reg = <2 3>; + fsl,portid-mapping = <0x80000000>; + }; + cpu2: PowerPC,e6500@4 { + device_type = "cpu"; + reg = <4 5>; + fsl,portid-mapping = <0x80000000>; + }; + cpu3: PowerPC,e6500@6 { + device_type = "cpu"; + reg = <6 7>; + fsl,portid-mapping = <0x80000000>; + }; + }; + + soc: soc@ffe000000 { + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + clock-frequency = <0x0>; + }; + }; +}; diff --git a/arch/powerpc/dts/t2080qds.dts b/arch/powerpc/dts/t2080qds.dts new file mode 100644 index 0000000..1819a08 --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * T2080QDS Device Tree Source + * + * Copyright 2013 - 2015 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/include/ "t2080.dtsi" + +/ { + model = "fsl,T2080QDS"; + compatible = "fsl,T2080QDS"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; +}; diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 2a2a0e5..d690857 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -272,3 +272,22 @@ How to update the ucode of Freescale FMAN

For more details, please refer to T2080QDS User Guide and access website www.freescale.com and Freescale QorIQ SDK Infocenter document. + +Device tree support and how to enable it for different configs +-------------------------------------------------------------- +Device tree support is available for t2080qds for below mentioned boot, +1. NOR Boot +2. NAND Boot +3. SD Boot +4. SPIFLASH Boot + +To enable device tree support for other boot, below configs need to be +enabled in relative defconfig file, +1. CONFIG_DEFAULT_DEVICE_TREE="t2080qds" (Change default device tree name if required) +2. CONFIG_OF_CONTROL +3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at + CONFIG_RESET_VECTOR_ADDRESS - 0xffc + +If device tree support is enabled in defconfig, +1. use 'u-boot-with-dtb.bin' for NOR boot. +2. use 'u-boot-with-spl-pbl.bin' for other boot. diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6b5de4d..4a39cd2 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index a203582..c89c63d 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -53,4 +55,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 6528eea..b5f960f 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 4a5cbb2..b34a0f5 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -24,6 +25,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -42,4 +45,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y