On 2024/4/22 04:09, Jonas Karlman wrote:

Sort imply statements under ROCKCHIP_RK3328 alphabetically and remove ENABLE_ARM_SOC_BOOT0_HOOK, DEBUG_UART_BOARD_INIT and SYS_NS16550, they are already implyed or selected by ARCH_ROCKCHIP.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2: No change, rebase on latest master bransh

arch/arm/mach-rockchip/Kconfig | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 4f22d9bde9f9..ee0f338995b9 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -180,19 +180,16 @@ config ROCKCHIP_RK3328 select SUPPORT_TPL select TPL select TPL_NEEDS_SEPARATE_STACK if TPL

• imply MISC
• imply MISC_INIT_R imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD
• imply ROCKCHIP_EFUSE imply ROCKCHIP_SDRAM_COMMON imply SPL_ROCKCHIP_COMMON_BOARD
• imply SPL_SEPARATE_BSS imply SPL_SERIAL imply TPL_SERIAL

• imply SPL_SEPARATE_BSS
• select ENABLE_ARM_SOC_BOOT0_HOOK
• select DEBUG_UART_BOARD_INIT
• select SYS_NS16550
• imply MISC
• imply ROCKCHIP_EFUSE
• imply MISC_INIT_R help The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53. including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two

On 2024/4/22 04:09, Jonas Karlman wrote:

The RK3328 SoC support ARMv8 Cryptography Extensions and use of the ARMv8 crypto extensions help speed up FIT checksum validation in SPL.

Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto extensions for SHA256 when validating checksum of FIT images.

Also imply OF_LIVE to help speed up init of U-Boot proper.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2: No change, rebase on latest master bransh

arch/arm/mach-rockchip/Kconfig | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ee0f338995b9..651ecfe9b8fd 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -180,8 +180,11 @@ config ROCKCHIP_RK3328 select SUPPORT_TPL select TPL select TPL_NEEDS_SEPARATE_STACK if TPL

• imply ARMV8_CRYPTO
• imply ARMV8_SET_SMPEN imply MISC imply MISC_INIT_R
• imply OF_LIVE imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_EFUSE

Hi Jagan,

On 2024-06-18 21:18, Jagan Teki wrote:

On Mon, 22 Apr 2024 at 01:40, Jonas Karlman jonas@kwiboo.se wrote:

...

The RK3328 SoC support ARMv8 Cryptography Extensions and use of the ARMv8 crypto extensions help speed up FIT checksum validation in SPL.

Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto extensions for SHA256 when validating checksum of FIT images.

Also imply OF_LIVE to help speed up init of U-Boot proper.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

v2: No change, rebase on latest master bransh

arch/arm/mach-rockchip/Kconfig | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ee0f338995b9..651ecfe9b8fd 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -180,8 +180,11 @@ config ROCKCHIP_RK3328 select SUPPORT_TPL select TPL select TPL_NEEDS_SEPARATE_STACK if TPL

•   imply ARMV8_CRYPTO
  

•   imply ARMV8_SET_SMPEN
  

This blocks the access of PLL registers.

U-Boot 2024.07-rc4-00052-gfe2ce09a07-dirty (Jun 19 2024 - 00:43:40 +0530)

Model: Firefly roc-rk3328-cc DRAM: 1 GiB (effective 1022 MiB) PMIC: RK8050 (on=0x40, off=0x00) Core: 241 devices, 29 uclasses, devicetree: separate MMC: mmc@ff500000: 1, mmc@ff520000: 0 Loading Environment from MMC... Reading from MMC(1)... *** Warning - bad CRC, using default environment

inno_hdmi_phy phy@ff430000: Pre-PLL locking failed inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110. failed to power on phy (ret=-110) inno_hdmi_phy phy@ff430000: Pre-PLL locking failed inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110. failed to power on phy (ret=-110) In: serial,usbkbd Out: serial,vidconsole Err: serial,vidconsole Model: Firefly roc-rk3328-cc Net: eth0: ethernet@ff540000

I could reproduce this issue on my Rock64, and it looks like there is a bug in inno phy driver at inno_poll, it currently readl at wrong addr:

--- diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c index 3bb1a254ffb5..7459779dffed 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c @@ -432,8 +432,8 @@ static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg, inno_write(inno, reg, tmp); }

-#define inno_poll(reg, val, cond, sleep_us, timeout_us) \ - readl_poll_sleep_timeout((reg) * 4, val, cond, sleep_us, timeout_us) +#define inno_poll(inno, reg, val, cond, sleep_us, timeout_us) \ + readl_poll_sleep_timeout((inno)->regs + ((reg) * 4), val, cond, sleep_us, timeout_us)

static unsigned long inno_hdmi_phy_get_tmdsclk(struct inno_hdmi_phy *inno, unsigned long rate) @@ -575,7 +575,7 @@ inno_hdmi_phy_rk3328_clk_set_rate(struct phy *phy, inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0);

/* Wait for Pre-PLL lock */ - ret = inno_poll(0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS, + ret = inno_poll(inno, 0xa9, val, val & RK3328_PRE_PLL_LOCK_STATUS, 1000, 10000); if (ret) { dev_err(phy->dev, "Pre-PLL locking failed\n"); @@ -674,7 +674,7 @@ inno_hdmi_phy_rk3328_power_on(struct phy *phy, RK3328_TMDS_DRIVER_ENABLE);

/* Wait for post PLL lock */ - ret = inno_poll(0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, + ret = inno_poll(inno, 0xaf, v, v & RK3328_POST_PLL_LOCK_STATUS, 1000, 10000); if (ret) { dev_err(phy->dev, "Post-PLL locking failed\n"); ---

Please send a proper patch to fix inno_poll :-)

Regards, Jonas

Jagan.

On 2024/4/22 04:09, Jonas Karlman wrote:

Port the RK3328 part of the Rockchip IO-domain driver from linux.

This differs from linux version in that pmu io iodomain bit is enabled in the write ops instead of in an init ops as in linux, this way we can avoid keeping a full state of all supply that have been configured.

Enable by default on all RK3328 boards, skip rk3328-evb because this target is typically also used on miscellaneous boards and boxes not fully supported by U-Boot.

Signed-off-by: Jonas Karlman jonas@kwiboo.se

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

v2: No change

arch/arm/mach-rockchip/rk3328/syscon_rk3328.c | 3 ++ configs/evb-rk3328_defconfig | 1 + drivers/misc/Kconfig | 2 +- drivers/misc/rockchip-io-domain.c | 38 +++++++++++++++++++ 4 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c index daf74a0e2d37..d2f267e63534 100644 --- a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c @@ -17,4 +17,7 @@ U_BOOT_DRIVER(rockchip_rk3328_grf) = { .name = "rockchip_rk3328_grf", .id = UCLASS_SYSCON, .of_match = rk3328_syscon_ids, +#if CONFIG_IS_ENABLED(OF_REAL)

• .bind = dm_scan_fdt_dev,

+#endif }; diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 75a0e0f286bd..53ad6777ec50 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -57,6 +57,7 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +# CONFIG_ROCKCHIP_IODOMAIN is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_MOTORCOMM=y diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 6b06888454f4..6009d55f400e 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -104,7 +104,7 @@ config ROCKCHIP_OTP config ROCKCHIP_IODOMAIN bool "Rockchip IO-domain driver support" depends on DM_REGULATOR && ARCH_ROCKCHIP

• default y if ROCKCHIP_RK3568

• default y if ROCKCHIP_RK3328 || ROCKCHIP_RK3568 help Enable support for IO-domains in Rockchip SoCs. It is necessary for the IO-domain setting of the SoC to match the voltage supplied

diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c index 0ffea32ef07f..04d4d07c4127 100644 --- a/drivers/misc/rockchip-io-domain.c +++ b/drivers/misc/rockchip-io-domain.c @@ -27,6 +27,10 @@ #define MAX_VOLTAGE_1_8 1980000 #define MAX_VOLTAGE_3_3 3600000

+#define RK3328_SOC_CON4 0x410 +#define RK3328_SOC_CON4_VCCIO2 BIT(7) +#define RK3328_SOC_VCCIO2_SUPPLY_NUM 1

• #define RK3399_PMUGRF_CON0 0x180 #define RK3399_PMUGRF_CON0_VSEL BIT(8) #define RK3399_PMUGRF_VSEL_SUPPLY_NUM 9

@@ -95,6 +99,22 @@ static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int return regmap_write(grf, offset, val); }

+static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) +{

• int ret = rockchip_iodomain_write(grf, offset, idx, uV);
• if (!ret && idx == RK3328_SOC_VCCIO2_SUPPLY_NUM) {

• /*
  

•  * set vccio2 iodomain to also use this framework
  

•  * instead of a special gpio.
  

•  */
  

• u32 val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16);
  

• ret = regmap_write(grf, RK3328_SOC_CON4, val);
  

• }
• return ret;

+}

• static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, int uV) { int ret = rockchip_iodomain_write(grf, offset, idx, uV);

@@ -111,6 +131,20 @@ static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, i return ret; }

+static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {

• .grf_offset = 0x410,
• .supply_names = {

• "vccio1-supply",
  

• "vccio2-supply",
  

• "vccio3-supply",
  

• "vccio4-supply",
  

• "vccio5-supply",
  

• "vccio6-supply",
  

• "pmuio-supply",
  

• },
• .write = rk3328_iodomain_write,

+};

• static const struct rockchip_iodomain_soc_data soc_data_rk3399 = { .grf_offset = 0xe640, .supply_names = {

@@ -156,6 +190,10 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = { };

static const struct udevice_id rockchip_iodomain_ids[] = {

• {

• .compatible = "rockchip,rk3328-io-voltage-domain",
  

• .data = (ulong)&soc_data_rk3328,
  

• }, { .compatible = "rockchip,rk3399-io-voltage-domain", .data = (ulong)&soc_data_rk3399,