[U-Boot] [PATCH 1/2] armv8: layerscape: spl: Initialize QSPI AHB for QSPI boot
To get full access of QSPI space, initialize AHB interface.
Signed-off-by: York Sun york.sun@nxp.com --- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 4 ++++ arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 +++ 2 files changed, 7 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index f1d6fd6..3bb6e5b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -11,6 +11,7 @@ #include <fsl_csu.h> #include <asm/arch/fdt.h> #include <asm/arch/ppa.h> +#include <asm/arch/soc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -102,6 +103,9 @@ void board_init_f(ulong dummy) gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1); gd->arch.tlb_allocated = gd->arch.tlb_addr; #endif /* CONFIG_SPL_FSL_LS_PPA */ +#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT) + qspi_ahb_init(); +#endif }
#ifdef CONFIG_SPL_OS_BOOT diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 9a219a6..8b51bc5 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -130,6 +130,9 @@ int board_setup_core_volt(u32 vdd); void init_pfe_scfg_dcfg_regs(void); #endif #endif +#ifdef CONFIG_QSPI_AHB_INIT +int qspi_ahb_init(void); +#endif
void cpu_name(char *name); #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
A new defconfig is introduced to support SPL boot from QSPI NOR flash. This is to support falcon mode for faster booting into Linux.
Signed-off-by: York Sun york.sun@nxp.com --- .../arm/cpu/armv8/fsl-layerscape/doc/README.falcon | 10 ++++ arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 + board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg | 26 +++++++++ board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg | 7 +++ configs/ls1046ardb_qspi_spl_defconfig | 64 ++++++++++++++++++++++ include/configs/ls1046a_common.h | 19 ++++++- include/configs/ls1046ardb.h | 12 ++-- 7 files changed, 135 insertions(+), 6 deletions(-) create mode 100644 board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg create mode 100644 board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg create mode 100644 configs/ls1046ardb_qspi_spl_defconfig
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon index a00b5bc..7dae9f0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.falcon @@ -129,6 +129,16 @@ Example:
The "loadables" is not optional. It tells SPL which images to load into memory.
+Falcon mode with QSPI boot +-------------------------- +To use falcon mode with QSPI boot, SPL needs to be enabled. Similar to SD or +NAND boot, a RAM version full feature U-Boot is needed. Unlike SD or NAND boot, +SPL with QSPI doesn't need to combine SPL image with RAM version image. Two +separated images are used, u-boot-spl.pbl and u-boot.img. The former is SPL +image with RCW and PBI commands to load the SPL payload into On-Chip RAM. The +latter is RAM version U-Boot in FIT format (or legacy format if FIT is not +used). + Other things to consider ----------------------- Falcon boot skips a lot of initialization in U-Boot. If Linux expects the diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 3bb6e5b..3e53084 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -23,6 +23,9 @@ u32 spl_boot_device(void) #ifdef CONFIG_SPL_NAND_SUPPORT return BOOT_DEVICE_NAND; #endif +#ifdef CONFIG_QSPI_BOOT + return BOOT_DEVICE_NOR; +#endif return 0; }
diff --git a/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg new file mode 100644 index 0000000..735d46c --- /dev/null +++ b/board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg @@ -0,0 +1,26 @@ +#QSPI clk +0957015c 40100000 +#Configure Scratch register +09570600 00000000 +09570604 10000000 +#Disable CCI barrier tranaction +09570178 0000e010 +09180000 00000008 +#USB PHY frequency sel +09570418 0000009e +0957041c 0000009e +09570420 0000009e +#Serdes SATA +09eb1300 80104e20 +09eb08dc 00502880 +#PEX gen3 link +09570158 00000300 +89400890 01048000 +89500890 01048000 +89600890 01048000 +#Alt base register +09570158 00001000 +#flush PBI data +096100c0 000fffff +#Change endianness +09550000 000f400c diff --git a/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg new file mode 100644 index 0000000..7b9be0a --- /dev/null +++ b/board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 01ee0100 +# RCW +0c150010 0e000000 00000000 00000000 +11335559 40005012 40025000 c1000000 +00000000 00000000 00000000 00238800 +20124000 00003101 00000096 00000001 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig new file mode 100644 index 0000000..57e8a6b --- /dev/null +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -0,0 +1,64 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046ARDB=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_FSL_LS_PPA=y +CONFIG_SPL_FSL_LS_PPA=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_OS_BASE=0x40980000 +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_SPL=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPL_ENV_IS_NOWHERE=y +CONFIG_DM=y +CONFIG_FSL_CAAM=y +CONFIG_FSL_ESDHC=y +CONFIG_SPI_FLASH=y +CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_PHY_GIGE=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_SPL_GZIP=y diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index ac47ba6..14d8c92 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -16,11 +16,11 @@ #define SPL_NO_USB #define SPL_NO_SATA #endif -#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) +#if (defined(CONFIG_SPL_BUILD) && \ + defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT)) #define SPL_NO_MMC #endif #if defined(CONFIG_SPL_BUILD) && \ - defined(CONFIG_SD_BOOT) && \ !defined(CONFIG_SPL_FSL_LS_PPA) #define SPL_NO_IFC #endif @@ -85,6 +85,21 @@ #endif /* ifdef CONFIG_SECURE_BOOT */ #endif
+#if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) +#define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" +#define CONFIG_SPL_TEXT_BASE 0x10000000 +#define CONFIG_SPL_MAX_SIZE 0x1f000 +#define CONFIG_SPL_STACK 0x10020000 +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_BSS_START_ADDR 0x8f000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#define CONFIG_SYS_MONITOR_LEN 0x100000 +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#endif + /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 2d45bbc..87d8cf5 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -31,17 +31,21 @@ #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #endif
-#ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg -#endif - #ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg #ifdef CONFIG_EMMC_BOOT #define CONFIG_SYS_FSL_PBL_RCW \ board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg #else #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg #endif +#elif defined(CONFIG_QSPI_BOOT) +#define CONFIG_SYS_FSL_PBL_RCW \ + board/freescale/ls1046ardb/ls1046ardb_rcw_qspi.cfg +#define CONFIG_SYS_FSL_PBL_PBI \ + board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg +#define CONFIG_SYS_UBOOT_BASE 0x40100000 +#define CONFIG_SYS_SPL_ARGS_ADDR 0x90000000 #endif
#ifndef SPL_NO_IFC
On 06/26/2018 02:49 PM, York Sun wrote:
A new defconfig is introduced to support SPL boot from QSPI NOR flash. This is to support falcon mode for faster booting into Linux.
Signed-off-by: York Sun york.sun@nxp.com
Applied to fsl-qoriq, awaiting upstream.
York
On 06/26/2018 02:49 PM, York Sun wrote:
To get full access of QSPI space, initialize AHB interface.
Signed-off-by: York Sun york.sun@nxp.com
Applied to fsl-qoriq, awaiting upstream.
York
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York Sun