[U-Boot] [PATCH v3] OMAP3: Fix timer handling to 1ms and CONFIG_SYS_HZ to 1000

From: Manikandan Pillai mani.pillai@ti.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com --- Changes in v3 which replaces previous version [3]:
* Fix udelay(), too * Fix and use TIMER_LOAD_VAL macro * Rebase against mainline 7ee38c044ca5041d3378d6507580ea4ec344af96 'fix DaVinci NS16550_REG_SIZE regression'
Changes from Dirk's patch which is replaced by this [2]:
* Fix conflicts after commit 81472d893fa565c9d300928a40e504a689bde131
Changes from Mani's original patch which is replaced by this [1]:
* Don't remove overflow handling in get_timer_masked() * Update omap3_zoom1.h, too. * Clean up timer related comments and macros in config files * Don't touch reset_timer_masked() * Switch divider clock divider from 256 to 8 to be able to get 1000Hz * Remove unused udelay_masked() * Minor clean up of get_tbclk()
[1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html [2] http://lists.denx.de/pipermail/u-boot/2009-March/049146.html [3] http://lists.denx.de/pipermail/u-boot/2009-April/050170.html --- cpu/arm_cortexa8/omap3/interrupts.c | 85 +++++++++++------------------------- include/configs/omap3_beagle.h | 9 ++- include/configs/omap3_evm.h | 9 ++- include/configs/omap3_overo.h | 12 ++--- include/configs/omap3_pandora.h | 11 ++-- include/configs/omap3_zoom1.h | 11 ++-- 6 files changed, 55 insertions(+), 82 deletions(-)
Index: u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c =================================================================== --- u-boot-main.orig/cpu/arm_cortexa8/omap3/interrupts.c +++ u-boot-main/cpu/arm_cortexa8/omap3/interrupts.c @@ -36,8 +36,6 @@ #include <asm/io.h> #include <asm/proc-armv/ptrace.h>
-#define TIMER_LOAD_VAL 0 - #ifdef CONFIG_USE_IRQ /* enable IRQ interrupts */ void enable_interrupts(void) @@ -169,7 +167,17 @@ static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
-/* nothing really to do with interrupts, just starts up a counter. */ +/* + * Nothing really to do with interrupts, just starts up a counter. + * We run the counter with 13MHz, divided by 8, resulting in timer + * frequency of 1.625MHz. With 32bit counter register, counter + * overflows in ~44min + */ + +/* 13MHz / 8 = 1.625MHz */ +#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) +#define TIMER_LOAD_VAL 0xffffffff + int interrupt_init(void) { /* start the counter ticking up, reload value on overflow */ @@ -201,81 +209,44 @@ void set_timer(ulong t) timestamp = t; }
-/* delay x useconds AND perserve advance timstamp value */ +/* delay x useconds */ void udelay(unsigned long usec) { - ulong tmo, tmp; + long tmo = usec * (TIMER_CLOCK / 1000) / 1000; + unsigned long now, last = readl(&timer_base->tcrr);
- /* if "big" number, spread normalization to seconds */ - if (usec >= 1000) { - /* if "big" number, spread normalization to seconds */ - tmo = usec / 1000; - /* find number of "ticks" to wait to achieve target */ - tmo *= CONFIG_SYS_HZ; - tmo /= 1000; /* finish normalize. */ - } else {/* else small number, don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000 * 1000); + while (tmo > 0) { + now = readl(&timer_base->tcrr); + if (last > now) /* count up timer overflow */ + tmo -= TIMER_LOAD_VAL - last + now; + else + tmo -= now - last; + last = now; } - - tmp = get_timer(0); /* get current timestamp */ - /* if setting this forward will roll time stamp */ - if ((tmo + tmp + 1) < tmp) - /* reset "advancing" timestamp to 0, set lastinc value */ - reset_timer_masked(); - else - tmo += tmp; /* else, set advancing stamp wake up time */ - while (get_timer_masked() < tmo) /* loop till event */ - /*NOP*/; }
void reset_timer_masked(void) { /* reset time, capture current incrementer value time */ - lastinc = readl(&timer_base->tcrr); + lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ); timestamp = 0; /* start "advancing" time stamp from 0 */ }
ulong get_timer_masked(void) { - ulong now = readl(&timer_base->tcrr); /* current tick value */ + /* current tick value */ + ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
if (now >= lastinc) /* normal mode (non roll) */ /* move stamp fordward with absoulte diff ticks */ timestamp += (now - lastinc); else /* we have rollover of incrementer */ - timestamp += (0xFFFFFFFF - lastinc) + now; + timestamp += ((TIMER_LOAD_VAL / (TIMER_CLOCK / CONFIG_SYS_HZ)) + - lastinc) + now; lastinc = now; return timestamp; }
-/* waits specified delay value and resets timestamp */ -void udelay_masked(unsigned long usec) -{ - ulong tmo; - ulong endtime; - signed long diff; - - /* if "big" number, spread normalization to seconds */ - if (usec >= 1000) { - /* start to normalize for usec to ticks per sec */ - tmo = usec / 1000; - /* find number of "ticks" to wait to achieve target */ - tmo *= CONFIG_SYS_HZ; - tmo /= 1000; /* finish normalize. */ - } else { /* else small number, */ - /* don't kill it prior to HZ multiply */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000 * 1000); - } - endtime = get_timer_masked() + tmo; - - do { - ulong now = get_timer_masked(); - diff = endtime - now; - } while (diff >= 0); -} - /* * This function is derived from PowerPC code (read timebase as long long). * On ARM it just returns the timer value. @@ -291,7 +262,5 @@ unsigned long long get_ticks(void) */ ulong get_tbclk(void) { - ulong tbclk; - tbclk = CONFIG_SYS_HZ; - return tbclk; + return CONFIG_SYS_HZ; } Index: u-boot-main/include/configs/omap3_beagle.h =================================================================== --- u-boot-main.orig/include/configs/omap3_beagle.h +++ u-boot-main/include/configs/omap3_beagle.h @@ -223,12 +223,13 @@ /* load address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_evm.h =================================================================== --- u-boot-main.orig/include/configs/omap3_evm.h +++ u-boot-main/include/configs/omap3_evm.h @@ -216,12 +216,13 @@ /* address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_overo.h =================================================================== --- u-boot-main.orig/include/configs/omap3_overo.h +++ u-boot-main/include/configs/omap3_overo.h @@ -208,14 +208,14 @@
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ - /* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_pandora.h =================================================================== --- u-boot-main.orig/include/configs/omap3_pandora.h +++ u-boot-main/include/configs/omap3_pandora.h @@ -212,12 +212,13 @@ /* address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes Index: u-boot-main/include/configs/omap3_zoom1.h =================================================================== --- u-boot-main.orig/include/configs/omap3_zoom1.h +++ u-boot-main/include/configs/omap3_zoom1.h @@ -220,12 +220,13 @@ /* load address */
/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000
/*----------------------------------------------------------------------- * Stack sizes

On 17:29 Tue 21 Apr , Dirk Behme wrote:
From: Manikandan Pillai mani.pillai@ti.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
as Request precedently switch to 12Mhz source clock or please specify the timer resolution & precision of your implementation and put in the commit message & code and please specify on which board you test it in the commit message
Best Regards, J.

Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 17:29 Tue 21 Apr , Dirk Behme wrote:
From: Manikandan Pillai mani.pillai@ti.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
as Request precedently switch to 12Mhz source clock or
As answered already in (unanswered)
http://lists.denx.de/pipermail/u-boot/2009-April/050078.html
switch to 12MHz will have a larger code and implementation impact while we won't win anything compared to well tested 13MHz usage
http://lists.denx.de/pipermail/u-boot/2009-April/051258.html
please specify the timer resolution & precision of your implementation and put in the commit message & code
It seems to me that you mix here OMAP1 and OMAP3 patches?
I remember about
http://lists.denx.de/pipermail/u-boot/2009-April/051271.html
which is regarding arm925/OMAP1 changes, not OMAP3 patch. I can't remember anything similar regarding OMAP3 patch. And similar comment for OMAP3 patch wouldn't make sense as
http://lists.denx.de/pipermail/u-boot/2009-April/051178.html
has clear info
+ * We run the counter with 13MHz, divided by 8, resulting in timer + * frequency of 1.625MHz. With 32bit counter register, counter + * overflows in ~44min
Dirk

Dear Dirk Behme,
In message 1240327745-8917-1-git-send-email-dirk.behme@googlemail.com you wrote:
From: Manikandan Pillai mani.pillai@ti.com Signed-off-by: Dirk Behme dirk.behme@googlemail.com Signed-off-by: Manikandan Pillai mani.pillai@ti.com
Changes in v3 which replaces previous version [3]:
- Fix udelay(), too
- Fix and use TIMER_LOAD_VAL macro
- Rebase against mainline 7ee38c044ca5041d3378d6507580ea4ec344af96 'fix DaVinci NS16550_REG_SIZE regression'
Changes from Dirk's patch which is replaced by this [2]:
- Fix conflicts after commit 81472d893fa565c9d300928a40e504a689bde131
Changes from Mani's original patch which is replaced by this [1]:
- Don't remove overflow handling in get_timer_masked()
- Update omap3_zoom1.h, too.
- Clean up timer related comments and macros in config files
- Don't touch reset_timer_masked()
- Switch divider clock divider from 256 to 8 to be able to get 1000Hz
- Remove unused udelay_masked()
- Minor clean up of get_tbclk()
[1] http://lists.denx.de/pipermail/u-boot/2009-March/049012.html [2] http://lists.denx.de/pipermail/u-boot/2009-March/049146.html [3] http://lists.denx.de/pipermail/u-boot/2009-April/050170.html
cpu/arm_cortexa8/omap3/interrupts.c | 85 +++++++++++------------------------- include/configs/omap3_beagle.h | 9 ++- include/configs/omap3_evm.h | 9 ++- include/configs/omap3_overo.h | 12 ++--- include/configs/omap3_pandora.h | 11 ++-- include/configs/omap3_zoom1.h | 11 ++-- 6 files changed, 55 insertions(+), 82 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
participants (3)
-
Dirk Behme
-
Jean-Christophe PLAGNIOL-VILLARD
-
Wolfgang Denk