[U-Boot] [PATCH] power: pmic: tps65218: Fix tps65218_voltage_update function
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy j-keerthy@ti.com Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC") --- drivers/power/pmic/pmic_tps65218.c | 2 +- include/power/tps65218.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c index f32fa40..c5e768a 100644 --- a/drivers/power/pmic/pmic_tps65218.c +++ b/drivers/power/pmic/pmic_tps65218.c @@ -101,7 +101,7 @@ int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
/* set voltage level */ if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, dc_cntrl_reg, volt_sel, - TPS65218_MASK_ALL_BITS)) + TPS65218_DCDC_VSEL_MASK)) return 1;
/* set GO bit to initiate voltage transition */ diff --git a/include/power/tps65218.h b/include/power/tps65218.h index 4d68faa..e3538e2 100644 --- a/include/power/tps65218.h +++ b/include/power/tps65218.h @@ -56,6 +56,8 @@ enum {
#define TPS65218_MASK_ALL_BITS 0xFF
+#define TPS65218_DCDC_VSEL_MASK 0x3F + #define TPS65218_DCDC_VOLT_SEL_0950MV 0x0a #define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23
On 05/24/2017 01:49 PM, Keerthy wrote:
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy j-keerthy@ti.com Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
If delegate to me..i will pick this.
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
drivers/power/pmic/pmic_tps65218.c | 2 +- include/power/tps65218.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c index f32fa40..c5e768a 100644 --- a/drivers/power/pmic/pmic_tps65218.c +++ b/drivers/power/pmic/pmic_tps65218.c @@ -101,7 +101,7 @@ int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
/* set voltage level */ if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, dc_cntrl_reg, volt_sel,
TPS65218_MASK_ALL_BITS))
TPS65218_DCDC_VSEL_MASK))return 1;
/* set GO bit to initiate voltage transition */
diff --git a/include/power/tps65218.h b/include/power/tps65218.h index 4d68faa..e3538e2 100644 --- a/include/power/tps65218.h +++ b/include/power/tps65218.h @@ -56,6 +56,8 @@ enum {
#define TPS65218_MASK_ALL_BITS 0xFF
+#define TPS65218_DCDC_VSEL_MASK 0x3F
#define TPS65218_DCDC_VOLT_SEL_0950MV 0x0a #define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23
On Thursday 25 May 2017 07:18 PM, Jaehoon Chung wrote:
On 05/24/2017 01:49 PM, Keerthy wrote:
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy j-keerthy@ti.com Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
If delegate to me..i will pick this.
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Thanks Jaehoon Chung.
drivers/power/pmic/pmic_tps65218.c | 2 +- include/power/tps65218.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c index f32fa40..c5e768a 100644 --- a/drivers/power/pmic/pmic_tps65218.c +++ b/drivers/power/pmic/pmic_tps65218.c @@ -101,7 +101,7 @@ int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
/* set voltage level */ if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, dc_cntrl_reg, volt_sel,
TPS65218_MASK_ALL_BITS))
TPS65218_DCDC_VSEL_MASK))return 1;
/* set GO bit to initiate voltage transition */
diff --git a/include/power/tps65218.h b/include/power/tps65218.h index 4d68faa..e3538e2 100644 --- a/include/power/tps65218.h +++ b/include/power/tps65218.h @@ -56,6 +56,8 @@ enum {
#define TPS65218_MASK_ALL_BITS 0xFF
+#define TPS65218_DCDC_VSEL_MASK 0x3F
#define TPS65218_DCDC_VOLT_SEL_0950MV 0x0a #define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23
On 05/25/2017 10:52 PM, Keerthy wrote:
On Thursday 25 May 2017 07:18 PM, Jaehoon Chung wrote:
On 05/24/2017 01:49 PM, Keerthy wrote:
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy j-keerthy@ti.com Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
If delegate to me..i will pick this.
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Thanks Jaehoon Chung.
Applied to u-boot-mmc. Thanks
Jaehoon Chung
drivers/power/pmic/pmic_tps65218.c | 2 +- include/power/tps65218.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/power/pmic/pmic_tps65218.c b/drivers/power/pmic/pmic_tps65218.c index f32fa40..c5e768a 100644 --- a/drivers/power/pmic/pmic_tps65218.c +++ b/drivers/power/pmic/pmic_tps65218.c @@ -101,7 +101,7 @@ int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel)
/* set voltage level */ if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, dc_cntrl_reg, volt_sel,
TPS65218_MASK_ALL_BITS))
TPS65218_DCDC_VSEL_MASK))return 1;
/* set GO bit to initiate voltage transition */
diff --git a/include/power/tps65218.h b/include/power/tps65218.h index 4d68faa..e3538e2 100644 --- a/include/power/tps65218.h +++ b/include/power/tps65218.h @@ -56,6 +56,8 @@ enum {
#define TPS65218_MASK_ALL_BITS 0xFF
+#define TPS65218_DCDC_VSEL_MASK 0x3F
#define TPS65218_DCDC_VOLT_SEL_0950MV 0x0a #define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 #define TPS65218_DCDC_VOLT_SEL_1200MV 0x23
On Thu, May 25, 2017 at 10:48:55PM +0900, Jaehoon Chung wrote:
On 05/24/2017 01:49 PM, Keerthy wrote:
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy j-keerthy@ti.com Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
If delegate to me..i will pick this.
Feel free (always!) to grab things in patchwork that are in your areas, thanks!
On 05/25/2017 11:34 PM, Tom Rini wrote:
On Thu, May 25, 2017 at 10:48:55PM +0900, Jaehoon Chung wrote:
On 05/24/2017 01:49 PM, Keerthy wrote:
Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy j-keerthy@ti.com Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC")
If delegate to me..i will pick this.
Feel free (always!) to grab things in patchwork that are in your areas, thanks!
Thanks!
participants (3)
-
Jaehoon Chung -
Keerthy -
Tom Rini