[U-Boot-Users] [PATCH] PPC440: Add flow control for serial port
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com --- board/netstal/hcu5/init.S | 63 ++++++++++++++++++++++++++++++++------------- 1 files changed, 45 insertions(+), 18 deletions(-)
diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S index 5ab6cd2..2b2dc52 100644 --- a/board/netstal/hcu5/init.S +++ b/board/netstal/hcu5/init.S @@ -39,41 +39,68 @@ tlbtab: tlbtab_start
- /* vxWorks needs this entry for the Machine Check interrupt, */ - /* tlbentry( 0x40000000, SZ_256M, 0, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) */ +#ifdef CFG_TLB_FOR_BOOT_FLASH + /* TLB#0: vxWorks needs this entry for the Machine Check interrupt, */ + tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + /* TLB#1: TLB-entry for DDR SDRAM (Up to 2GB) */ + tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + + /* TLB#2: TLB-entry for EBC */ + tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
/* - * BOOT_CS (FLASH) must be second. Before relocation SA_I can be off to use the + * TLB#3: BOOT_CS (FLASH) must be forth. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ tlbentry( CFG_BOOT_BASE_ADDR, SZ_1M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
- /* TLB-entry for PCI Memory */ - tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I ) +#else + tlbentry( CFG_BOOT_BASE_ADDR, SZ_1M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G ) +#endif + + /* + * TLB entries for SDRAM are not needed on this platform. + * They are dynamically generated in the SPD DDR(2) detection + * routine. + */ + + /* TLB#4: */ tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I ) + /* TLB#5: */ tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I ) + /* TLB#6: */ tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I )
- /* TLB-entry for EBC (CFG_CPLD) */ - /* tlbentry( CFG_CPLD, SZ_1K, CFG_CPLD, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) */ - /* CAN */ - tlbentry( CFG_CS_1, SZ_16M, CFG_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - /* IMC + CPLD */ - tlbentry( CFG_CS_2, SZ_16M, CFG_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_CS_2 + 0x1000000, SZ_16M, CFG_CS_2 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - /* IMC-Fast */ - tlbentry( CFG_CS_3, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - /* TLB-entry for Internal Registers & OCM */ - tlbentry( CFG_PCI_BASE, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I ) + /* TLB#7: */ + tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
/*TLB-entry PCI registers*/ + /* TLB#8: */ tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
/* TLB-entry for peripherals */ + /* TLB#9: */ tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
- /* TLB for SDRAM will be added by initdram (sdram.c) */ + /* CAN */ + /* TLB#10: */ + tlbentry( CFG_CS_1, SZ_1K, CFG_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + + /* TLB#11: CPLD and IMC-Standard 32 MB */ + tlbentry( CFG_CS_2, SZ_16M, CFG_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + + /* TLB#12: */ + tlbentry( CFG_CS_2 + 0x1000000, SZ_16M, CFG_CS_2 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+ /* IMC-Fast 32 MB */ + /* TLB#13: */ + tlbentry( CFG_CS_3, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + /* TLB#14: */ + tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + +#ifndef CFG_TLB_FOR_BOOT_FLASH + /* TLB#15: */ + tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) +#endif tlbtab_end
On Friday 30 November 2007, Niklaus Giger wrote:
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com
board/netstal/hcu5/init.S | 63 ++++++++++++++++++++++++++++++++------------- 1 files changed, 45 insertions(+), 18 deletions(-)
diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S index 5ab6cd2..2b2dc52 100644 --- a/board/netstal/hcu5/init.S +++ b/board/netstal/hcu5/init.S
Hmmm. This patch doesn't seem to match the mail subject. Please resubmit with correct patch.
Thanks.
Best regards, Stefan
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
Sorry for my mistake in my first submission..
This has been tested on our HCU5 PPC440EPx based board, where we have only one serial port.
Signed-off-by: Niklaus Giger niklaus.giger@netstal.com --- cpu/ppc4xx/serial.c | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c index 60712b1..4cba836 100644 --- a/cpu/ppc4xx/serial.c +++ b/cpu/ppc4xx/serial.c @@ -490,6 +490,21 @@ static void serial_divs (int baudrate, unsigned long *pudiv, } #endif /* defined(CONFIG_440) && !defined(CFG_EXT_SERIAL_CLK) */
+#if defined(CONFIG_CMD_HWFLOW) && defined(CONFIG_440) && !defined(CONFIG_SERIAL_MULTI) +int hwflow_onoff(int flow_on) +{ + if (flow_on == 1) { + out8(UART_BASE + UART_MCR, 0x0b); /* The OUT2 bit may be written and read + but it provides no function */ + } + else + { + out8(UART_BASE + UART_MCR, 0x00); /* no modem control DTR RTS */ + } + return 0; +} +#endif + /* * Minimal serial functions needed to use one of the SMC ports * as serial console interface. @@ -548,7 +563,12 @@ int serial_init(void) out8(UART_BASE + UART_DLM, bdiv >> 8); /* set baudrate divisor */ out8(UART_BASE + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */ out8(UART_BASE + UART_FCR, 0x00); /* disable FIFO */ +#ifdef CONFIG_CMD_HWFLOW + out8(UART_BASE + UART_MCR, 0x0b); /* The OUT2 bit may be written and read + but it provides no function */ +#else out8(UART_BASE + UART_MCR, 0x00); /* no modem control DTR RTS */ +#endif val = in8(UART_BASE + UART_LSR); /* clear line status */ val = in8(UART_BASE + UART_RBR); /* read receive buffer */ out8(UART_BASE + UART_SCR, 0x00); /* set scratchpad */
In message 200712031048.54727.niklausgiger@gmx.ch you wrote:
Sorry for my mistake in my first submission..
This has been tested on our HCU5 PPC440EPx based board, where we have only one serial port.
I object against applying such a patch.
Using hardware flow-control on the only available serial port (= con- sole port) is fundamentally broken. It is not acceptable that a board does not come up just because no console terminal is attached or because the console is in the wrong state.
Best regards,
Wolfgang Denk
On Monday 03 December 2007, Wolfgang Denk wrote:
In message 200712031048.54727.niklausgiger@gmx.ch you wrote:
Sorry for my mistake in my first submission..
This has been tested on our HCU5 PPC440EPx based board, where we have only one serial port.
I object against applying such a patch.
Using hardware flow-control on the only available serial port (= con- sole port) is fundamentally broken. It is not acceptable that a board does not come up just because no console terminal is attached or because the console is in the wrong state.
This patch "only" enables the 4xx UART driver for hardware flow control and doesn't configure it for the HCU5 board. So that should not be a problem.
But this patch unfortunately has coding style issues:
+#if defined(CONFIG_CMD_HWFLOW) && defined(CONFIG_440) && !defined(CONFIG_SERIAL_MULTI) +int hwflow_onoff(int flow_on) +{ + if (flow_on == 1) { + out8(UART_BASE + UART_MCR, 0x0b); /* The OUT2 bit may be written and read + but it provides no function */ + } + else + { + out8(UART_BASE + UART_MCR, 0x00); /* no modem control DTR RTS */ + } + return 0; +} +#endif
Please use something like this:
if defined(CONFIG_CMD_HWFLOW) && defined(CONFIG_440) && \ !defined(CONFIG_SERIAL_MULTI) int hwflow_onoff(int flow_on) { if (flow_on == 1) { /* * The OUT2 bit may be written and read * but it provides no function */ out8(UART_BASE + UART_MCR, 0x0b); } else { /* No modem control DTR RTS */ out8(UART_BASE + UART_MCR, 0x00); }
return 0; } #endif
Best regards, Stefan
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de =====================================================================
participants (3)
-
Niklaus Giger -
Stefan Roese -
Wolfgang Denk