[U-Boot] [PATCH v1 1/3] x86: Introduce INTEL_MID quirk option
Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example, Intel Edison.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com --- arch/x86/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5f9597b230..ba57bcfca4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -80,6 +80,10 @@ config VENDOR_INTEL
endchoice
+# subarchitectures-specific options below +config INTEL_MID + bool + # board-specific options below source "board/advantech/Kconfig" source "board/congatec/Kconfig"
From: Vincent Tinelli vincent.tinelli@intel.com
Intel MID platform boards have special treatment, such as boot parameter setting.
Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
Signed-off-by: Vincent Tinelli vincent.tinelli@intel.com Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com --- arch/x86/lib/zimage.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index b6b0f2beb3..aafbeb01f9 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -246,6 +246,10 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, hdr->setup_move_size = 0x9100; }
+#if defined(CONFIG_INTEL_MID) + hdr->hardware_subarch = X86_SUBARCH_INTEL_MID; +#endif + /* build command line at COMMAND_LINE_OFFSET */ build_command_line(cmd_line, auto_boot); }
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
From: Vincent Tinelli vincent.tinelli@intel.com
Intel MID platform boards have special treatment, such as boot parameter setting.
Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
Signed-off-by: Vincent Tinelli vincent.tinelli@intel.com Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/lib/zimage.c | 4 ++++ 1 file changed, 4 insertions(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
On 14 February 2017 at 20:08, Bin Meng bmeng.cn@gmail.com wrote:
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
From: Vincent Tinelli vincent.tinelli@intel.com
Intel MID platform boards have special treatment, such as boot parameter setting.
Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
Signed-off-by: Vincent Tinelli vincent.tinelli@intel.com Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/lib/zimage.c | 4 ++++ 1 file changed, 4 insertions(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Reviewed-by: Simon Glass sjg@chromium.org
There is no microcode update available for SoCs used on Intel MID platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com --- arch/x86/cpu/mp_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index 988073cc79..4e2f000f75 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) if (!stack) return -ENOMEM; params->stack_top = (u32)(stack + size); -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && !defined(CONFIG_INTEL_MID) params->microcode_ptr = ucode_base; debug("Microcode at %x\n", params->microcode_ptr); #endif
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
There is no microcode update available for SoCs used on Intel MID platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/cpu/mp_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index 988073cc79..4e2f000f75 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) if (!stack) return -ENOMEM; params->stack_top = (u32)(stack + size); -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && !defined(CONFIG_INTEL_MID) params->microcode_ptr = ucode_base; debug("Microcode at %x\n", params->microcode_ptr); #endif
Is this patch necessary? If Intel MID does not define CONFIG_QEMU or CONFIG_HAVE_FSP, current logic should work.
Regards, Bin
On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
There is no microcode update available for SoCs used on Intel MID platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/cpu/mp_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index 988073cc79..4e2f000f75 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) if (!stack) return -ENOMEM; params->stack_top = (u32)(stack + size); -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && !defined(CONFIG_INTEL_MID) params->microcode_ptr = ucode_base; debug("Microcode at %x\n", params->microcode_ptr); #endif
Is this patch necessary? If Intel MID does not define CONFIG_QEMU or CONFIG_HAVE_FSP, current logic should work.
This code is executed when neither of option is defined. For Intel MID we do *not* need to have this code executed.
I dunno how it possible can work otherwise (ucode_base is not defined).
Hi Andy,
On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
There is no microcode update available for SoCs used on Intel MID platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/cpu/mp_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index 988073cc79..4e2f000f75 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus) if (!stack) return -ENOMEM; params->stack_top = (u32)(stack + size); -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) && !defined(CONFIG_INTEL_MID) params->microcode_ptr = ucode_base; debug("Microcode at %x\n", params->microcode_ptr); #endif
Is this patch necessary? If Intel MID does not define CONFIG_QEMU or CONFIG_HAVE_FSP, current logic should work.
This code is executed when neither of option is defined. For Intel MID we do *not* need to have this code executed.
I dunno how it possible can work otherwise (ucode_base is not defined).
OK, is this common feature for all Intel MID device? This mp_init.c is conditionally built by CONFIG_SMP. So I believe this Tangier SoC is a multi-core processor, but does not have any microcode.
Regards, Bin
On Fri, Feb 17, 2017 at 3:22 AM, Bin Meng bmeng.cn@gmail.com wrote:
On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
This code is executed when neither of option is defined. For Intel MID we do *not* need to have this code executed.
I dunno how it possible can work otherwise (ucode_base is not defined).
OK, is this common feature for all Intel MID device? This mp_init.c is conditionally built by CONFIG_SMP. So I believe this Tangier SoC is a multi-core processor, but does not have any microcode.
Correct. I will leave this patch as is in v3 which I'm about to submit.
On 14 February 2017 at 07:47, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
There is no microcode update available for SoCs used on Intel MID platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/cpu/mp_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass sjg@chromium.org
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example, Intel Edison.
Does this mean you have plan to upstream the Intel Edison support?
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5f9597b230..ba57bcfca4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -80,6 +80,10 @@ config VENDOR_INTEL
endchoice
+# subarchitectures-specific options below +config INTEL_MID
bool
What's the architecture of Intel Edison? Normally such platform Kconfig option should go to arch/x86/cpu/<platform>/Kconfig
Regards, Bin
On Wed, 2017-02-15 at 11:00 +0800, Bin Meng wrote:
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example, Intel Edison.
Does this mean you have plan to upstream the Intel Edison support?
Yes.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5f9597b230..ba57bcfca4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -80,6 +80,10 @@ config VENDOR_INTEL
endchoice
+# subarchitectures-specific options below +config INTEL_MID + bool
What's the architecture of Intel Edison? Normally such platform Kconfig option should go to arch/x86/cpu/<platform>/Kconfig
What do you mean? x86_64.
Hi Andy,
On Wed, Feb 15, 2017 at 5:50 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
On Wed, 2017-02-15 at 11:00 +0800, Bin Meng wrote:
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example, Intel Edison.
Does this mean you have plan to upstream the Intel Edison support?
Yes.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 5f9597b230..ba57bcfca4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -80,6 +80,10 @@ config VENDOR_INTEL
endchoice
+# subarchitectures-specific options below +config INTEL_MID
boolWhat's the architecture of Intel Edison? Normally such platform Kconfig option should go to arch/x86/cpu/<platform>/Kconfig
What do you mean? x86_64.
Sorry I should say what the platform is, like Ivybridge, Baytrail, Quark that U-Boot currently supports. If this is a new platform, we should probably move it to arch/x86/cpu/<platform>/Kconfig.
Regards, Bin
On Wed, 2017-02-15 at 18:09 +0800, Bin Meng wrote:
Hi Andy,
On Wed, Feb 15, 2017 at 5:50 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
On Wed, 2017-02-15 at 11:00 +0800, Bin Meng wrote:
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
What's the architecture of Intel Edison? Normally such platform Kconfig option should go to arch/x86/cpu/<platform>/Kconfig
What do you mean? x86_64.
Sorry I should say what the platform is, like Ivybridge, Baytrail, Quark that U-Boot currently supports.
It's misunderstanding here. arch/x86/cpu/<SoC/CPU/platform>/ So, all of above either SoC or platform. A little mess.
So, we will put the code to tangier folder because Intel Tangier is SoC. Platform is Intel Merrifield.
If this is a new platform,
Yes.
we should probably move it to arch/x86/cpu/<platform>/Kconfig.
Probably not. Intel MID covers more than one SoC/platform. This option is x86 scope.
I dunno that U-Boot will run on the rest MID devices, but for sake of logic and consistency it is not about Edison or Merrifield or Tangier.
Hi Andy,
On Wed, Feb 15, 2017 at 6:15 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
On Wed, 2017-02-15 at 18:09 +0800, Bin Meng wrote:
Hi Andy,
On Wed, Feb 15, 2017 at 5:50 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
On Wed, 2017-02-15 at 11:00 +0800, Bin Meng wrote:
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
What's the architecture of Intel Edison? Normally such platform Kconfig option should go to arch/x86/cpu/<platform>/Kconfig
What do you mean? x86_64.
Sorry I should say what the platform is, like Ivybridge, Baytrail, Quark that U-Boot currently supports.
It's misunderstanding here. arch/x86/cpu/<SoC/CPU/platform>/ So, all of above either SoC or platform. A little mess.
Yes, it's either SoC (single chipset), or platform (CPU plus platform controller).
So, we will put the code to tangier folder because Intel Tangier is SoC. Platform is Intel Merrifield.
If this is a new platform,
Yes.
we should probably move it to arch/x86/cpu/<platform>/Kconfig.
Probably not. Intel MID covers more than one SoC/platform. This option is x86 scope.
OK, so can you please add a help text for the new config to describe what MID is and its features? I assume it has some difference that worth introducing such a sub-arch option.
I dunno that U-Boot will run on the rest MID devices, but for sake of logic and consistency it is not about Edison or Merrifield or Tangier.
Regards, Bin
On 14 February 2017 at 07:47, Andy Shevchenko andriy.shevchenko@linux.intel.com wrote:
Intel Mobile Internet Device (MID) platforms have special treatment in some cases, such as CPU enumeration or boot parameters configuration.
Here we introduce specific quirk option for such cases.
It is supposed to be selected by Intel MID platform boards, for example, Intel Edison.
Signed-off-by: Andy Shevchenko andriy.shevchenko@linux.intel.com
arch/x86/Kconfig | 4 ++++ 1 file changed, 4 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
participants (4)
-
Andy Shevchenko -
Andy Shevchenko -
Bin Meng -
Simon Glass