[PATCH v2 0/3] rockchip: Fix SPI boot on Pinebook Pro, Puma and RK3399-ROC-PC
Commit c4cea2bbf995 ("rockchip: Enable building a SPI ROM image on bob") added an alias spi1 referring to spi@ff1d0000, however in several boards there was already an alias spi0 referring to the same node, and having both aliases present broke booting U-Boot from SPI flash.
This series removes the spi0 alias from the Pinebook Pro, RK3399-ROC-PC and Puma dts and sets the default bus for SPI flash to 1, so that the correct device is used. The Rockpro64 board, which was also affected, has already had the same type of fix applied.
This has only been compile-tested - testing by folks who have the affected boards would be welcome.
Changes in v2: Also make this change to the Puma-Haikou board as suggested by Kever.
Hugh Cole-Baker (3): rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash rockchip: rk3399-roc-pc: default to SPI bus 1 for SPI-flash rockchip: puma-haikou: default to SPI bus 1 for SPI-flash
arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 3 +-- arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 4 ---- configs/pinebook-pro-rk3399_defconfig | 2 ++ configs/puma-rk3399_defconfig | 2 ++ configs/roc-pc-mezzanine-rk3399_defconfig | 1 + configs/roc-pc-rk3399_defconfig | 1 + 7 files changed, 7 insertions(+), 10 deletions(-)
SPI flash on this machine is located on bus 1, default to using bus 1 for SPI flash and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker sigmaris@gmail.com Suggested-by: Simon Glass sjg@chromium.org Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") ---
(no changes since v1)
arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- configs/pinebook-pro-rk3399_defconfig | 2 ++ 2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi index ded7db0aeff..ee3b98698e6 100644 --- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi @@ -7,10 +7,6 @@ #include "rk3399-sdram-lpddr4-100.dtsi"
/ { - aliases { - spi0 = &spi1; - }; - chosen { u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; }; diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 1ed54ad0eda..ef00ad92c45 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_DM_KEYBOARD=y @@ -49,6 +50,7 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y
On Sun, Nov 22, 2020 at 01:03:44PM +0000, Hugh Cole-Baker wrote:
SPI flash on this machine is located on bus 1, default to using bus 1 for SPI flash and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker sigmaris@gmail.com Suggested-by: Simon Glass sjg@chromium.org Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
Applied to u-boot/master, thanks!
SPI flash on this board is located on bus 1, default to using bus 1 for SPI flash on both rk3399-roc-pc and -mezzanine, and stop aliasing it to bus 0.
Signed-off-by: Hugh Cole-Baker sigmaris@gmail.com Suggested-by: Simon Glass sjg@chromium.org Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") ---
(no changes since v1)
arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 4 ---- configs/roc-pc-mezzanine-rk3399_defconfig | 1 + configs/roc-pc-rk3399_defconfig | 1 + 3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index fc155e69036..e3c9364e359 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -7,10 +7,6 @@ #include "rk3399-sdram-lpddr4-100.dtsi"
/ { - aliases { - spi0 = &spi1; - }; - chosen { u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc; }; diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index ae16f3558a3..8aa5a155180 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -42,6 +42,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 774707b115b..927b57685d9 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -41,6 +41,7 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y
SPI flash on this machine is located on bus 1, default to using bus 1 for SPI flash and stop aliasing it to bus 0. Formerly the alias spi1 pointed to &spi5, use an alias spi5 for this instead.
Signed-off-by: Hugh Cole-Baker sigmaris@gmail.com Suggested-by: Kever Yang kever.yang@rock-chips.com
---
Changes in v2: New patch.
arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 3 +-- configs/puma-rk3399_defconfig | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi index 29846c4b001..e7a1aea3a56 100644 --- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi @@ -28,8 +28,7 @@ };
aliases { - spi0 = &spi1; - spi1 = &spi5; + spi5 = &spi5; };
/* diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 60178e3754c..0f15936c2d6 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -44,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -53,6 +54,7 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y
participants (2)
-
Hugh Cole-Baker -
Tom Rini