[U-Boot] [PATCH] gpio: mvmfp: support newer MFP bit definitions
From: Xiang Wang wangx@marvell.com
1. The bits 11..10 for mfp driver strength is only valid for aspen and old xscale family, for newer Marvell chip, this range has been moved to 12..11. 2. add sleep bit support
Signed-off-by: Xiang Wang wangx@marvell.com [robh: rebase to current mainline] Signed-off-by: Rob Herring robh@kernel.org --- drivers/gpio/mvmfp.c | 14 ++------ include/mvmfp.h | 90 +++++++++++++++++++++++++++++++--------------------- 2 files changed, 55 insertions(+), 49 deletions(-)
diff --git a/drivers/gpio/mvmfp.c b/drivers/gpio/mvmfp.c index 97bbe99..43ecf66 100644 --- a/drivers/gpio/mvmfp.c +++ b/drivers/gpio/mvmfp.c @@ -43,18 +43,8 @@ void mfp_config(u32 *mfp_cfgs)
/* Write a mfg register as per configuration */ val = 0; - if (cfg_val & MFP_AF_FLAG) - /* Abstract and program Afternate-Func Selection */ - val |= cfg_val & MFP_AF_MASK; - if (cfg_val & MFP_EDGE_FLAG) - /* Abstract and program Edge configuration */ - val |= cfg_val & MFP_LPM_EDGE_MASK; - if (cfg_val & MFP_DRIVE_FLAG) - /* Abstract and program Drive configuration */ - val |= cfg_val & MFP_DRIVE_MASK; - if (cfg_val & MFP_PULL_FLAG) - /* Abstract and program Pullup/down configuration */ - val |= cfg_val & MFP_PULL_MASK; + if (cfg_val & MFP_VALUE_MASK) + val |= cfg_val & MFP_VALUE_MASK;
writel(val, p_mfpr); } while (1); diff --git a/include/mvmfp.h b/include/mvmfp.h index 961d799..e61e92d 100644 --- a/include/mvmfp.h +++ b/include/mvmfp.h @@ -21,61 +21,77 @@ /* * MFP configuration is represented by a 32-bit unsigned integer */ -#define MFP(_off, _pull, _pF, _drv, _dF, _edge, _eF, _afn, _aF) ( \ +#ifdef CONFIG_MVMFP_V2 +#define MFP(_off, _pull, _drv, _slp, _edge, _sleep, _afn) ( \ + /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \ + /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \ + /* bit 12..11 - Driver Strength */ (((_drv) & 0x3) << 11) | \ + /* bits 10 - pad driver */ (((_slp) & 0x1) << 10) | \ + /* bit 09..07 - sleep mode */ (((_sleep) & 0xe) << 6) | \ + /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \ + /* bits 03 - sleep mode */ (((_sleep) & 0x1) << 3) | \ + /* bits 02..00 - Alt-fun select */ ((_afn) & 0x7)) +#else +#define MFP(_off, _pull, _drv, _slp, _edge, _sleep, _afn) ( \ /* bits 31..16 - MFP Register Offset */ (((_off) & 0xffff) << 16) | \ /* bits 15..13 - Run Mode Pull State */ (((_pull) & 0x7) << 13) | \ /* bit 12 - Unused */ \ /* bits 11..10 - Driver Strength */ (((_drv) & 0x3) << 10) | \ - /* bit 09 - Pull State flag */ (((_pF) & 0x1) << 9) | \ - /* bit 08 - Drv-strength flag */ (((_dF) & 0x1) << 8) | \ - /* bit 07 - Edge-det flag */ (((_eF) & 0x1) << 7) | \ + /* bit 09..07 - sleep mode */ (((_sleep) & 0xe) << 6) | \ /* bits 06..04 - Edge Detection */ (((_edge) & 0x7) << 4) | \ - /* bits 03..00 - Alt-fun flag */ (((_aF) & 0x1) << 3) | \ - /* bits Alternate-fun select */ ((_afn) & 0x7)) + /* bits 03 - sleep mode */ (((_sleep) & 0x1) << 3) | \ + /* bits 02..00 - Alt-fun select */ ((_afn) & 0x7)) +#endif
/* * to facilitate the definition, the following macros are provided * * offset, pull,pF, drv,dF, edge,eF ,afn,aF */ -#define MFP_OFFSET_MASK MFP(0xffff, 0,0, 0,0, 0,0, 0,0) -#define MFP_REG(x) MFP(x, 0,0, 0,0, 0,0, 0,0) +#define MFP_OFFSET_MASK MFP(0xffff, 0, 0, 0, 0, 0, 0) +#define MFP_REG(x) MFP(x, 0, 0, 0, 0, 0, 0) #define MFP_REG_GET_OFFSET(x) ((x & MFP_OFFSET_MASK) >> 16)
-#define MFP_AF_FLAG MFP(0x0000, 0,0, 0,0, 0,0, 0,1) -#define MFP_DRIVE_FLAG MFP(0x0000, 0,0, 0,1, 0,0, 0,0) -#define MFP_EDGE_FLAG MFP(0x0000, 0,0, 0,0, 0,1, 0,0) -#define MFP_PULL_FLAG MFP(0x0000, 0,1, 0,0, 0,0, 0,0) +#define MFP_AF0 MFP(0x0000, 0, 0, 0, 0, 0, 0) +#define MFP_AF1 MFP(0x0000, 0, 0, 0, 0, 0, 1) +#define MFP_AF2 MFP(0x0000, 0, 0, 0, 0, 0, 2) +#define MFP_AF3 MFP(0x0000, 0, 0, 0, 0, 0, 3) +#define MFP_AF4 MFP(0x0000, 0, 0, 0, 0, 0, 4) +#define MFP_AF5 MFP(0x0000, 0, 0, 0, 0, 0, 5) +#define MFP_AF6 MFP(0x0000, 0, 0, 0, 0, 0, 6) +#define MFP_AF7 MFP(0x0000, 0, 0, 0, 0, 0, 7) +#define MFP_AF_MASK MFP(0x0000, 0, 0, 0, 0, 0, 7) + +#define MFP_SLEEP_CTRL2 MFP(0x0000, 0, 0, 0, 0, 1, 0) +#define MFP_SLEEP_DIR MFP(0x0000, 0, 0, 0, 0, 2, 0) +#define MFP_SLEEP_DATA MFP(0x0000, 0, 0, 0, 0, 4, 0) +#define MFP_SLEEP_CTRL MFP(0x0000, 0, 0, 0, 0, 8, 0) +#define MFP_SLEEP_MASK MFP(0x0000, 0, 0, 0, 0, 0xf, 0)
-#define MFP_AF0 MFP(0x0000, 0,0, 0,0, 0,0, 0,1) -#define MFP_AF1 MFP(0x0000, 0,0, 0,0, 0,0, 1,1) -#define MFP_AF2 MFP(0x0000, 0,0, 0,0, 0,0, 2,1) -#define MFP_AF3 MFP(0x0000, 0,0, 0,0, 0,0, 3,1) -#define MFP_AF4 MFP(0x0000, 0,0, 0,0, 0,0, 4,1) -#define MFP_AF5 MFP(0x0000, 0,0, 0,0, 0,0, 5,1) -#define MFP_AF6 MFP(0x0000, 0,0, 0,0, 0,0, 6,1) -#define MFP_AF7 MFP(0x0000, 0,0, 0,0, 0,0, 7,1) -#define MFP_AF_MASK MFP(0x0000, 0,0, 0,0, 0,0, 7,0) +#define MFP_LPM_EDGE_NONE MFP(0x0000, 0, 0, 0, 4, 0, 0) +#define MFP_LPM_EDGE_RISE MFP(0x0000, 0, 0, 0, 1, 0, 0) +#define MFP_LPM_EDGE_FALL MFP(0x0000, 0, 0, 0, 2, 0, 0) +#define MFP_LPM_EDGE_BOTH MFP(0x0000, 0, 0, 0, 3, 0, 0) +#define MFP_LPM_EDGE_MASK MFP(0x0000, 0, 0, 0, 7, 0, 0)
-#define MFP_LPM_EDGE_NONE MFP(0x0000, 0,0, 0,0, 0,1, 0,0) -#define MFP_LPM_EDGE_RISE MFP(0x0000, 0,0, 0,0, 1,1, 0,0) -#define MFP_LPM_EDGE_FALL MFP(0x0000, 0,0, 0,0, 2,1, 0,0) -#define MFP_LPM_EDGE_BOTH MFP(0x0000, 0,0, 0,0, 3,1, 0,0) -#define MFP_LPM_EDGE_MASK MFP(0x0000, 0,0, 0,0, 3,0, 0,0) +#define MFP_SLP_DI MFP(0x0000, 0, 0, 1, 0, 0, 0)
-#define MFP_DRIVE_VERY_SLOW MFP(0x0000, 0,0, 0,1, 0,0, 0,0) -#define MFP_DRIVE_SLOW MFP(0x0000, 0,0, 1,1, 0,0, 0,0) -#define MFP_DRIVE_MEDIUM MFP(0x0000, 0,0, 2,1, 0,0, 0,0) -#define MFP_DRIVE_FAST MFP(0x0000, 0,0, 3,1, 0,0, 0,0) -#define MFP_DRIVE_MASK MFP(0x0000, 0,0, 3,0, 0,0, 0,0) +#define MFP_DRIVE_VERY_SLOW MFP(0x0000, 0, 0, 0, 0, 0, 0) +#define MFP_DRIVE_SLOW MFP(0x0000, 0, 1, 0, 0, 0, 0) +#define MFP_DRIVE_MEDIUM MFP(0x0000, 0, 2, 0, 0, 0, 0) +#define MFP_DRIVE_FAST MFP(0x0000, 0, 3, 0, 0, 0, 0) +#define MFP_DRIVE_MASK MFP(0x0000, 0, 3, 0, 0, 0, 0)
-#define MFP_PULL_NONE MFP(0x0000, 0,1, 0,0, 0,0, 0,0) -#define MFP_PULL_LOW MFP(0x0000, 1,1, 0,0, 0,0, 0,0) -#define MFP_PULL_HIGH MFP(0x0000, 2,1, 0,0, 0,0, 0,0) -#define MFP_PULL_BOTH MFP(0x0000, 3,1, 0,0, 0,0, 0,0) -#define MFP_PULL_FLOAT MFP(0x0000, 4,1, 0,0, 0,0, 0,0) -#define MFP_PULL_MASK MFP(0x0000, 7,0, 0,0, 0,0, 0,0) +#define MFP_PULL_NONE MFP(0x0000, 0, 0, 0, 0, 0, 0) +#define MFP_PULL_LOW MFP(0x0000, 5, 0, 0, 0, 0, 0) +#define MFP_PULL_HIGH MFP(0x0000, 6, 0, 0, 0, 0, 0) +#define MFP_PULL_BOTH MFP(0x0000, 7, 0, 0, 0, 0, 0) +#define MFP_PULL_FLOAT MFP(0x0000, 4, 0, 0, 0, 0, 0) +#define MFP_PULL_MASK MFP(0x0000, 7, 0, 0, 0, 0, 0)
+#define MFP_VALUE_MASK (MFP_PULL_MASK | MFP_DRIVE_MASK | MFP_SLP_DI \ + | MFP_LPM_EDGE_MASK | MFP_SLEEP_MASK \ + | MFP_AF_MASK) #define MFP_EOC 0xffffffff /* indicates end-of-conf */
/* Functions */
High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation.
Signed-off-by: Rob Herring robh@kernel.org Cc: Pantelis Antoniou panto@antoniou-consulting.com --- drivers/mmc/dw_mmc.c | 2 +- drivers/mmc/fsl_esdhc.c | 2 +- drivers/mmc/kona_sdhci.c | 1 - drivers/mmc/mmc.c | 7 ++----- drivers/mmc/mvebu_mmc.c | 2 +- drivers/mmc/mxsmmc.c | 3 +-- drivers/mmc/omap_hsmmc.c | 3 +-- drivers/mmc/s3c_sdi.c | 2 +- drivers/mmc/s5p_sdhci.c | 1 - drivers/mmc/sh_mmcif.c | 2 +- drivers/mmc/sunxi_mmc.c | 2 +- drivers/mmc/tegra_mmc.c | 2 +- drivers/mmc/zynq_sdhci.c | 2 -- include/mmc.h | 1 - 14 files changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 76fa0b0..53a8aca 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -388,7 +388,7 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) host->cfg.host_caps |= MMC_MODE_4BIT; host->cfg.host_caps &= ~MMC_MODE_8BIT; } - host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC; + host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index db4d251..f99ad47 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -620,7 +620,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) return -1; }
- cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC; + cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; #ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz; #endif diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c index f804f4c..3653d00 100644 --- a/drivers/mmc/kona_sdhci.c +++ b/drivers/mmc/kona_sdhci.c @@ -121,7 +121,6 @@ int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) host->name = "kona-sdhci"; host->ioaddr = reg_base; host->quirks = quirks; - host->host_caps = MMC_MODE_HC;
if (init_kona_mmc_core(host)) { free(host); diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index a13769e..ea00753 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -359,15 +359,12 @@ static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, cmd->cmdidx = MMC_CMD_SEND_OP_COND; cmd->resp_type = MMC_RSP_R3; cmd->cmdarg = 0; - if (use_arg && !mmc_host_is_spi(mmc)) { - cmd->cmdarg = + if (use_arg && !mmc_host_is_spi(mmc)) + cmd->cmdarg = OCR_HCS | (mmc->cfg->voltages & (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | (mmc->op_cond_response & OCR_ACCESS_MODE);
- if (mmc->cfg->host_caps & MMC_MODE_HC) - cmd->cmdarg |= OCR_HCS; - } err = mmc_send_cmd(mmc, cmd, NULL); if (err) return err; diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c index 8ca0904..056aef5 100644 --- a/drivers/mmc/mvebu_mmc.c +++ b/drivers/mmc/mvebu_mmc.c @@ -418,7 +418,7 @@ static struct mmc_config mvebu_mmc_cfg = { .f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX, .f_max = MVEBU_MMC_CLOCKRATE_MAX, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HC | + .host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz, .part_type = PART_TYPE_DOS, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 2fa4eee..31fb3ab 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -405,8 +405,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | - MMC_MODE_HS_52MHz | MMC_MODE_HS | - MMC_MODE_HC; + MMC_MODE_HS_52MHz | MMC_MODE_HS;
/* * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index dc725cb..8238a7e 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -651,8 +651,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, if (priv_data == NULL) return -1;
- host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | - MMC_MODE_HC; + host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS;
switch (dev_index) { case 0: diff --git a/drivers/mmc/s3c_sdi.c b/drivers/mmc/s3c_sdi.c index 1b5b705..02d1138 100644 --- a/drivers/mmc/s3c_sdi.c +++ b/drivers/mmc/s3c_sdi.c @@ -298,7 +298,7 @@ int s3cmmc_initialize(bd_t *bis, int (*getcd)(struct mmc *), cfg->name = "S3C MMC"; cfg->ops = &s3cmmc_ops; cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HC | MMC_MODE_HS; + cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HS; cfg->f_min = 400000; cfg->f_max = get_PCLK() / 2; cfg->b_max = 0x80; diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 0eec731..8e1968a 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -76,7 +76,6 @@ static int s5p_sdhci_core_init(struct sdhci_host *host) host->set_control_reg = &s5p_sdhci_set_control_reg; host->set_clock = set_mmc_clk;
- host->host_caps = MMC_MODE_HC; if (host->bus_width == 8) host->host_caps |= MMC_MODE_8BIT;
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 76ba93b..f92cf00 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -577,7 +577,7 @@ static struct mmc_config sh_mmcif_cfg = { .name = DRIVER_NAME, .ops = &sh_mmcif_ops, .host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT | - MMC_MODE_8BIT | MMC_MODE_HC, + MMC_MODE_8BIT, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, }; diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 2233545..0b7eb12 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -449,7 +449,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT; - cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; + cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
cfg->f_min = 400000; diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 2cd8cf1..ca41b4d 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -559,7 +559,7 @@ static int do_mmc_init(int dev_index) host->cfg.host_caps |= MMC_MODE_8BIT; if (host->width >= 4) host->cfg.host_caps |= MMC_MODE_4BIT; - host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; + host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
/* * min freq is for card identification, and is the highest diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 7887f11..a92f12d 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -29,8 +29,6 @@ int zynq_sdhci_init(phys_addr_t regbase) SDHCI_QUIRK_BROKEN_R1B; host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
- host->host_caps = MMC_MODE_HC; - add_sdhci(host, 52000000, 52000000 >> 9); return 0; } diff --git a/include/mmc.h b/include/mmc.h index 2ad0f19..bdb003c 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -55,7 +55,6 @@ #define MMC_MODE_4BIT (1 << 2) #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) -#define MMC_MODE_HC (1 << 5) #define MMC_MODE_DDR_52MHz (1 << 6)
#define SD_DATA_4BIT 0x00040000
Hi Rob,
On Mar 24, 2015, at 00:56 , Rob Herring robh@kernel.org wrote:
High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation.
Signed-off-by: Rob Herring robh@kernel.org Cc: Pantelis Antoniou panto@antoniou-consulting.com
drivers/mmc/dw_mmc.c | 2 +- drivers/mmc/fsl_esdhc.c | 2 +- drivers/mmc/kona_sdhci.c | 1 - drivers/mmc/mmc.c | 7 ++----- drivers/mmc/mvebu_mmc.c | 2 +- drivers/mmc/mxsmmc.c | 3 +-- drivers/mmc/omap_hsmmc.c | 3 +-- drivers/mmc/s3c_sdi.c | 2 +- drivers/mmc/s5p_sdhci.c | 1 - drivers/mmc/sh_mmcif.c | 2 +- drivers/mmc/sunxi_mmc.c | 2 +- drivers/mmc/tegra_mmc.c | 2 +- drivers/mmc/zynq_sdhci.c | 2 -- include/mmc.h | 1 - 14 files changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 76fa0b0..53a8aca 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -388,7 +388,7 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) host->cfg.host_caps |= MMC_MODE_4BIT; host->cfg.host_caps &= ~MMC_MODE_8BIT; }
- host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC;
host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index db4d251..f99ad47 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -620,7 +620,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) return -1; }
- cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
- cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
#ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz; #endif diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c index f804f4c..3653d00 100644 --- a/drivers/mmc/kona_sdhci.c +++ b/drivers/mmc/kona_sdhci.c @@ -121,7 +121,6 @@ int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) host->name = "kona-sdhci"; host->ioaddr = reg_base; host->quirks = quirks;
host->host_caps = MMC_MODE_HC;
if (init_kona_mmc_core(host)) { free(host);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index a13769e..ea00753 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -359,15 +359,12 @@ static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, cmd->cmdidx = MMC_CMD_SEND_OP_COND; cmd->resp_type = MMC_RSP_R3; cmd->cmdarg = 0;
- if (use_arg && !mmc_host_is_spi(mmc)) {
cmd->cmdarg =
- if (use_arg && !mmc_host_is_spi(mmc))
cmd->cmdarg = OCR_HCS | (mmc->cfg->voltages & (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | (mmc->op_cond_response & OCR_ACCESS_MODE);
if (mmc->cfg->host_caps & MMC_MODE_HC)cmd->cmdarg |= OCR_HCS;- } err = mmc_send_cmd(mmc, cmd, NULL); if (err) return err;
diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c index 8ca0904..056aef5 100644 --- a/drivers/mmc/mvebu_mmc.c +++ b/drivers/mmc/mvebu_mmc.c @@ -418,7 +418,7 @@ static struct mmc_config mvebu_mmc_cfg = { .f_min = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX, .f_max = MVEBU_MMC_CLOCKRATE_MAX, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
- .host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HC |
- .host_caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz, .part_type = PART_TYPE_DOS, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 2fa4eee..31fb3ab 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -405,8 +405,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT |
MMC_MODE_HS_52MHz | MMC_MODE_HS |MMC_MODE_HC;
MMC_MODE_HS_52MHz | MMC_MODE_HS;/*
- SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index dc725cb..8238a7e 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -651,8 +651,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, if (priv_data == NULL) return -1;
- host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
MMC_MODE_HC;
host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS;
switch (dev_index) { case 0:
diff --git a/drivers/mmc/s3c_sdi.c b/drivers/mmc/s3c_sdi.c index 1b5b705..02d1138 100644 --- a/drivers/mmc/s3c_sdi.c +++ b/drivers/mmc/s3c_sdi.c @@ -298,7 +298,7 @@ int s3cmmc_initialize(bd_t *bis, int (*getcd)(struct mmc *), cfg->name = "S3C MMC"; cfg->ops = &s3cmmc_ops; cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
- cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HC | MMC_MODE_HS;
- cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HS; cfg->f_min = 400000; cfg->f_max = get_PCLK() / 2; cfg->b_max = 0x80;
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 0eec731..8e1968a 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -76,7 +76,6 @@ static int s5p_sdhci_core_init(struct sdhci_host *host) host->set_control_reg = &s5p_sdhci_set_control_reg; host->set_clock = set_mmc_clk;
- host->host_caps = MMC_MODE_HC; if (host->bus_width == 8) host->host_caps |= MMC_MODE_8BIT;
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 76ba93b..f92cf00 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -577,7 +577,7 @@ static struct mmc_config sh_mmcif_cfg = { .name = DRIVER_NAME, .ops = &sh_mmcif_ops, .host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT |
MMC_MODE_8BIT | MMC_MODE_HC,
MMC_MODE_8BIT,}; diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 2233545..0b7eb12 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -449,7 +449,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT;
- cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
cfg->f_min = 400000;
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 2cd8cf1..ca41b4d 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -559,7 +559,7 @@ static int do_mmc_init(int dev_index) host->cfg.host_caps |= MMC_MODE_8BIT; if (host->width >= 4) host->cfg.host_caps |= MMC_MODE_4BIT;
- host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
/*
- min freq is for card identification, and is the highest
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 7887f11..a92f12d 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -29,8 +29,6 @@ int zynq_sdhci_init(phys_addr_t regbase) SDHCI_QUIRK_BROKEN_R1B; host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
- host->host_caps = MMC_MODE_HC;
- add_sdhci(host, 52000000, 52000000 >> 9); return 0;
} diff --git a/include/mmc.h b/include/mmc.h index 2ad0f19..bdb003c 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -55,7 +55,6 @@ #define MMC_MODE_4BIT (1 << 2) #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) -#define MMC_MODE_HC (1 << 5) #define MMC_MODE_DDR_52MHz (1 << 6)
#define SD_DATA_4BIT 0x00040000
2.1.0
Hand merged and applied. Thanks.
— Pantelis
From: Kevin Liu kliu5@marvell.com
Timeout interrupt also work for response busy command(R1b) like cmd38/cmd6. So need to set it accordingly. Current code only set timeout for data command.
Signed-off-by: Kevin Liu kliu5@marvell.com Signed-off-by: Rob Herring robh@kernel.org Cc: Pantelis Antoniou panto@antoniou-consulting.com --- drivers/mmc/sdhci.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 78e958e..8faeca3 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -213,6 +213,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, SDHCI_BLOCK_SIZE); sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); + } else if (cmd->resp_type & MMC_RSP_BUSY) { + sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL); }
sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
Hi Rob,
On Mar 24, 2015, at 00:57 , Rob Herring robh@kernel.org wrote:
From: Kevin Liu kliu5@marvell.com
Timeout interrupt also work for response busy command(R1b) like cmd38/cmd6. So need to set it accordingly. Current code only set timeout for data command.
Signed-off-by: Kevin Liu kliu5@marvell.com Signed-off-by: Rob Herring robh@kernel.org Cc: Pantelis Antoniou panto@antoniou-consulting.com
drivers/mmc/sdhci.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 78e958e..8faeca3 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -213,6 +213,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, SDHCI_BLOCK_SIZE); sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
} else if (cmd->resp_type & MMC_RSP_BUSY) {
sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);}
sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
-- 2.1.0
Thanks, Applied.
— Pantelis
From: Zhou Zhu zzhu3@marvell.com
The Marvell GPIO driver can be used on Marvell platforms other than Sheeva, so remove the ifdef to enable it for others.
Signed-off-by: Rob Herring robh@kernel.org --- drivers/gpio/mvgpio.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpio/mvgpio.h b/drivers/gpio/mvgpio.h index a3f17a0..1de7395 100644 --- a/drivers/gpio/mvgpio.h +++ b/drivers/gpio/mvgpio.h @@ -14,9 +14,8 @@
#include <common.h>
-#ifdef CONFIG_SHEEVA_88SV331xV5 /* - * GPIO Register map for SHEEVA 88SV331xV5 + * GPIO Register map for Marvell SOCs */ struct gpio_reg { u32 gplr; /* Pin Level Register - 0x0000 */ @@ -51,8 +50,5 @@ struct gpio_reg { u32 pad12[2]; u32 apmask; /* Bitwise Mask of Edge Detect Register - 0x009C */ }; -#else -#error "CPU core subversion not defined" -#endif
#endif /* __MVGPIO_H__ */
On Mon, Mar 23, 2015 at 05:57:01PM -0500, Rob Herring wrote:
From: Zhou Zhu zzhu3@marvell.com
The Marvell GPIO driver can be used on Marvell platforms other than Sheeva, so remove the ifdef to enable it for others.
Signed-off-by: Rob Herring robh@kernel.org
Applied to u-boot/master, thanks!
On Mon, Mar 23, 2015 at 05:56:58PM -0500, Rob Herring wrote:
From: Xiang Wang wangx@marvell.com
- The bits 11..10 for mfp driver strength is only valid for
aspen and old xscale family, for newer Marvell chip, this range has been moved to 12..11. 2. add sleep bit support
Signed-off-by: Xiang Wang wangx@marvell.com [robh: rebase to current mainline] Signed-off-by: Rob Herring robh@kernel.org
Applied to u-boot/master, thanks!
On Mon, Mar 23, 2015 at 05:56:58PM -0500, Rob Herring wrote:
From: Xiang Wang wangx@marvell.com
- The bits 11..10 for mfp driver strength is only valid for
aspen and old xscale family, for newer Marvell chip, this range has been moved to 12..11. 2. add sleep bit support
Signed-off-by: Xiang Wang wangx@marvell.com [robh: rebase to current mainline] Signed-off-by: Rob Herring robh@kernel.org
Applied to u-boot/master, thanks!
participants (3)
-
Pantelis Antoniou -
Rob Herring -
Tom Rini