[U-Boot] [PATCH v2 2/3] sunxi: Add A20-SOM204-EVB board

This is new System-On-Module platform with universal dimm socket for easy insertation. The EVB board is designed to be universal with future modules.
Base features of A20-SOM204 board includes: * 1GB DDR3 RAM * AXP209 PMU * KSZ9031 Gigabit PHY * AT24C16 EEPROM * Status LED * LCD connector * GPIO connector
There will be variants with the following options: * Second LAN8710A Megabit PHY * 16MB SPI Flash memory * eMMC card * ATECC508 crypto device
The EVB board has: * Debug UART * MicroSD card connector * USB-OTG connector * Two USB host * RTL8723BS WiFi/BT combo * IrDA transceiver/receiver * HDMI connector * VGA connector * Megabit ethernet transceiver * Gigabit ethernet transceiver * SATA connector * CAN driver * CSI camera * MIC and HP connectors * PCIe x4 connector * USB3 connector * Two UEXT connectors * Two user LEDs
Some of the features are multiplexed and cannot be used the same time: CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3.
This patch adds defconfig and dts files for this board. The dts is same with mainline kernel, except some nodes are removed to make file compatible with existing dtsi file.
Signed-off-by: Stefan Mavrodiev stefan@olimex.com Acked-by: Maxime Ripard maxime.ripard@free-electrons.com --- Changes for v2: - Add missing MAINTAINERS entry - Reworked defconfig file
arch/arm/dts/Makefile | 1 + arch/arm/dts/sun7i-a20-olimex-som204-evb.dts | 296 +++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/A20-Olimex-SOM204-EVB_defconfig | 33 +++ 4 files changed, 335 insertions(+) create mode 100644 arch/arm/dts/sun7i-a20-olimex-som204-evb.dts create mode 100644 configs/A20-Olimex-SOM204-EVB_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ebbc0ca..97e8790 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -303,6 +303,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-m5.dtb \ sun7i-a20-mk808c.dtb \ sun7i-a20-olimex-som-evb.dtb \ + sun7i-a20-olimex-som204-evb.dtb \ sun7i-a20-olinuxino-lime.dtb \ sun7i-a20-olinuxino-lime2.dtb \ sun7i-a20-olinuxino-lime2-emmc.dtb \ diff --git a/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts new file mode 100644 index 0000000..c183920 --- /dev/null +++ b/arch/arm/dts/sun7i-a20-olimex-som204-evb.dts @@ -0,0 +1,296 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Source for A20-SOM204-EVB Board + * + * Copyright (C) 2018 Olimex Ltd. + * Author: Stefan Mavrodiev stefan@olimex.com + */ + +/dts-v1/; +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pwm/pwm.h> + +/ { + model = "Olimex A20-SOM204-EVB"; + compatible = "olimex,a20-olimex-som204-evb", "allwinner,sun7i-a20"; + + aliases { + serial0 = &uart0; + serial1 = &uart4; + serial2 = &uart7; + spi0 = &spi1; + spi1 = &spi2; + ethernet1 = &rtl8723bs; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + stat { + label = "a20-som204-evb:green:stat"; + gpios = <&pio 8 0 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led1 { + label = "a20-som204-evb:green:led1"; + gpios = <&pio 8 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led2 { + label = "a20-som204-evb:yellow:led2"; + gpios = <&pio 8 11 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + rtl_pwrseq: rtl_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; + }; +}; + +&ahci { + target-supply = <®_ahci_5v>; + status = "okay"; +}; + +&codec { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii_a>; + phy = <&phy3>; + phy-mode = "rgmii"; + phy-supply = <®_vcc3v3>; + + snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + status = "okay"; + + phy3: ethernet-phy@3 { + reg = <3>; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +/* Exposed to UEXT1 */ +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +/* Exposed to UEXT2 */ +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&ir0 { + pinctrl-names = "default"; + pinctrl-0 = <&ir0_rx_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; + cd-inverted; + status = "okay"; +}; + +&mmc3 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&rtl_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + rtl8723bs: sdio_wifi@1 { + reg = <1>; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&pio { + bt_uart_pins: bt_uart_pins@0 { + pins = "PG6", "PG7", "PG8"; + function = "uart3"; + }; +}; + +#include "axp209.dtsi" + +®_ahci_5v { + gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-always-on; + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_ldo4 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pg"; +}; + +®_usb0_vbus { + gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +/* Exposed to UEXT1 */ +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins_a>, + <&spi1_cs0_pins_a>; + status = "okay"; +}; + +/* Exposed to UEXT2 */ +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins_a>, + <&spi2_cs0_pins_a>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +/* Used for RTL8723BS bluetooth */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&bt_uart_pins>; + status = "okay"; +}; + +/* Exposed to UEXT1 */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + status = "okay"; +}; + +/* Exposed to UEXT2 */ +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 362edff..2298853 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -311,6 +311,11 @@ M: FUKAUMI Naoki naobsd@gmail.com S: Maintained F: configs/Nintendo_NES_Classic_Edition_defconfig
+OLIMEX A20-SOM204 BOARD +M: Stefan Mavrodiev stefan@olimex.com +S: Maintained +F: configs/A20-Olimex-SOM204-EVB_defconfig + ORANGEPI WIN/WIN PLUS BOARD M: Jagan Teki jagan@amarulasolutions.com S: Maintained diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig new file mode 100644 index 0000000..8cabc96 --- /dev/null +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -0,0 +1,33 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_MMC0_CD_PIN="PH1" +CONFIG_USB0_VBUS_PIN="PC17" +CONFIG_USB0_VBUS_DET="PH5" +CONFIG_I2C1_ENABLE=y +CONFIG_SATAPWR="PC3" +CONFIG_GMAC_TX_DELAY=4 +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_SCSI_AHCI=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PHY_ADDR=3 +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_RGMII=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO3_VOLT=2800 +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_SCSI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

On Fri, Feb 2, 2018 at 7:26 PM, Stefan Mavrodiev stefan@olimex.com wrote:
This is new System-On-Module platform with universal dimm socket for easy insertation. The EVB board is designed to be universal with future modules.
Base features of A20-SOM204 board includes: * 1GB DDR3 RAM * AXP209 PMU * KSZ9031 Gigabit PHY * AT24C16 EEPROM * Status LED * LCD connector * GPIO connector
There will be variants with the following options: * Second LAN8710A Megabit PHY * 16MB SPI Flash memory * eMMC card * ATECC508 crypto device
The EVB board has: * Debug UART * MicroSD card connector * USB-OTG connector * Two USB host * RTL8723BS WiFi/BT combo * IrDA transceiver/receiver * HDMI connector * VGA connector * Megabit ethernet transceiver * Gigabit ethernet transceiver * SATA connector * CAN driver * CSI camera * MIC and HP connectors * PCIe x4 connector * USB3 connector * Two UEXT connectors * Two user LEDs
Some of the features are multiplexed and cannot be used the same time: CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3.
This patch adds defconfig and dts files for this board. The dts is same with mainline kernel, except some nodes are removed to make file compatible with existing dtsi file.
Signed-off-by: Stefan Mavrodiev stefan@olimex.com Acked-by: Maxime Ripard maxime.ripard@free-electrons.com
Reviewed-by: Jagan Teki jagan@openedev.com
Applied to u-boot-sunxi/master
participants (2)
-
Jagan Teki
-
Stefan Mavrodiev