[U-Boot] [PATCH v2 1/2] video, lg4573: make spi bus and cs configurable
make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards.
Signed-off-by: Heiko Schocher hs@denx.de
---
Changes in v2: - add comments from Stefano Babic - move this patch before the 2b aristainetos board support and add there the spi bus settings for the display - rebased against u-boot-imx e1518ebda736a1225c4c2a651e21c446dee3fdb0
drivers/video/lg4573.c | 3 ++- include/configs/aristainetos2.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c index 43670fc..11fef27 100644 --- a/drivers/video/lg4573.c +++ b/drivers/video/lg4573.c @@ -220,7 +220,8 @@ err_claim_bus: static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - lg4573_spi_startup(0, 0, 10000000, SPI_MODE_0); + lg4573_spi_startup(CONFIG_LG4573_BUS, CONFIG_LG4573_CS, 10000000, + SPI_MODE_0); return 0; }
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index faeafe2..dd090c5 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -45,6 +45,8 @@ /* Framebuffer */ #define CONFIG_SYS_LDB_CLOCK 33246000 #define CONFIG_LG4573 +#define CONFIG_LG4573_BUS 0 +#define CONFIG_LG4573_CS 0
#define CONFIG_CMD_BMP
there is a 2b board version of the aristainetos2 board. Differences to the v2:
- spi cs for the nor flash and display controller changed - some pinmux changes - LED gpio settings changed
Signed-off-by: Heiko Schocher hs@denx.de
---
Changes in v2: - add comments from Stefano Babic - move the spi bus settings for the display into this patch - rebased against u-boot-imx e1518ebda736a1225c4c2a651e21c446dee3fdb0
arch/arm/cpu/armv7/mx6/Kconfig | 4 +++ board/aristainetos/Kconfig | 13 ++++++++ board/aristainetos/aristainetos-v2.c | 56 +++++++++++++++++++++++++++---- board/aristainetos/aristainetos.c | 4 +-- configs/aristainetos2b_defconfig | 7 ++++ include/configs/aristainetos-common.h | 4 --- include/configs/aristainetos.h | 6 +++- include/configs/aristainetos2.h | 6 +++- include/configs/aristainetos2b.h | 62 +++++++++++++++++++++++++++++++++++ 9 files changed, 148 insertions(+), 14 deletions(-) create mode 100644 configs/aristainetos2b_defconfig create mode 100644 include/configs/aristainetos2b.h
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index c43cea8..4281214 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -41,6 +41,10 @@ config TARGET_ARISTAINETOS2 bool "aristainetos2" select CPU_V7
+config TARGET_ARISTAINETOS2B + bool "Support aristainetos2-revB" + select CPU_V7 + config TARGET_CGTQMX6EVAL bool "cgtqmx6eval" select CPU_V7 diff --git a/board/aristainetos/Kconfig b/board/aristainetos/Kconfig index 500b665..e987f38 100644 --- a/board/aristainetos/Kconfig +++ b/board/aristainetos/Kconfig @@ -23,3 +23,16 @@ config SYS_CONFIG_NAME default "aristainetos2"
endif + +if TARGET_ARISTAINETOS2B + +config SYS_BOARD + default "aristainetos" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "aristainetos2b" + +endif diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index dd5d8a3..7013e79 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -42,8 +42,16 @@ #define USDHC2_PAD_CTRL (PAD_CTL_SPEED_LOW | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-#define ECSPI1_CS0 IMX_GPIO_NR(4, 9) /* 4.3 display controller */ -#define ECSPI4_CS0 IMX_GPIO_NR(3, 29) +#if (CONFIG_SYS_BOARD_VERSION == 2) + /* 4.3 display controller */ + #define ECSPI1_CS0 IMX_GPIO_NR(4, 9) + #define ECSPI4_CS0 IMX_GPIO_NR(3, 29) +#elif (CONFIG_SYS_BOARD_VERSION == 3) + #define ECSPI1_CS0 IMX_GPIO_NR(2, 30) /* NOR flash */ + /* 4.3 display controller */ + #define ECSPI1_CS1 IMX_GPIO_NR(4, 10) +#endif + #define SOFT_RESET_GPIO IMX_GPIO_NR(7, 13) #define SD2_DRIVER_ENABLE IMX_GPIO_NR(7, 8)
@@ -103,7 +111,11 @@ iomux_v3_cfg_t const gpio_pads[] = { /* LED yellow */ MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL), /* LED red */ +#if (CONFIG_SYS_BOARD_VERSION == 2) MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), +#elif (CONFIG_SYS_BOARD_VERSION == 3) + MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), +#endif /* LED green */ MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* LED blue */ @@ -170,7 +182,12 @@ static iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), +#if (CONFIG_SYS_BOARD_VERSION == 2) MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(SPI_PAD_CTRL), +#elif (CONFIG_SYS_BOARD_VERSION == 3) + MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), +#endif };
static void setup_iomux_enet(void) @@ -178,6 +195,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); }
+#if (CONFIG_SYS_BOARD_VERSION == 2) iomux_v3_cfg_t const ecspi4_pads[] = { MX6_PAD_EIM_D21__ECSPI4_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_EIM_D22__ECSPI4_MISO | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -185,6 +203,7 @@ iomux_v3_cfg_t const ecspi4_pads[] = { MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#endif
static iomux_v3_cfg_t const display_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(DISP_PAD_CTRL), @@ -220,11 +239,17 @@ static iomux_v3_cfg_t const display_pads[] = { int board_spi_cs_gpio(unsigned bus, unsigned cs) { if (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS) +#if (CONFIG_SYS_BOARD_VERSION == 2) return IMX_GPIO_NR(5, 2);
if (bus == 0 && cs == 0) return IMX_GPIO_NR(4, 9); +#elif (CONFIG_SYS_BOARD_VERSION == 3) + return ECSPI1_CS0;
+ if (bus == 0 && cs == 1) + return ECSPI1_CS1; +#endif return -1; }
@@ -233,15 +258,22 @@ static void setup_spi(void) int i;
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); + +#if (CONFIG_SYS_BOARD_VERSION == 2) imx_iomux_v3_setup_multiple_pads(ecspi4_pads, ARRAY_SIZE(ecspi4_pads)); +#endif + for (i = 0; i < 4; i++) enable_spi_clk(true, i);
gpio_direction_output(ECSPI1_CS0, 1); +#if (CONFIG_SYS_BOARD_VERSION == 2) gpio_direction_output(ECSPI4_CS1, 0); - /* set cs0 to high (second device on spi bus #4) */ gpio_direction_output(ECSPI4_CS0, 1); +#elif (CONFIG_SYS_BOARD_VERSION == 3) + gpio_direction_output(ECSPI1_CS1, 1); +#endif }
static void setup_iomux_uart(void) @@ -582,6 +614,7 @@ static void setup_board_gpio(void) gpio_direction_output(IMX_GPIO_NR(1, 25), 0);
/* switch off Status LEDs */ +#if (CONFIG_SYS_BOARD_VERSION == 2) gpio_request(IMX_GPIO_NR(6, 16), "LED yellow"); /* 176 */ gpio_direction_output(IMX_GPIO_NR(6, 16), 1); gpio_request(IMX_GPIO_NR(2, 28), "LED red"); /* 60 */ @@ -590,11 +623,21 @@ static void setup_board_gpio(void) gpio_direction_output(IMX_GPIO_NR(5, 4), 1); gpio_request(IMX_GPIO_NR(2, 29), "LED blue"); /* 61 */ gpio_direction_output(IMX_GPIO_NR(2, 29), 1); +#elif (CONFIG_SYS_BOARD_VERSION == 3) + gpio_request(IMX_GPIO_NR(6, 16), "LED yellow"); /* 176 */ + gpio_direction_output(IMX_GPIO_NR(6, 16), 0); + gpio_request(IMX_GPIO_NR(5, 0), "LED red"); /* 128 */ + gpio_direction_output(IMX_GPIO_NR(5, 0), 0); + gpio_request(IMX_GPIO_NR(5, 4), "LED green"); /* 132 */ + gpio_direction_output(IMX_GPIO_NR(5, 4), 0); + gpio_request(IMX_GPIO_NR(2, 29), "LED blue"); /* 61 */ + gpio_direction_output(IMX_GPIO_NR(2, 29), 0); +#endif }
static void setup_board_spi(void) { - /* enable spi bus #2 SS drivers */ + /* enable spi bus #2 SS drivers (and spi bus #4 SS1 for rev2b) */ gpio_direction_output(IMX_GPIO_NR(6, 6), 1); }
@@ -629,8 +672,9 @@ int board_late_init(void) /* if we have the lg panel, we can initialze it now */ if (panel) if (!strcmp(panel, displays[1].mode.name)) - lg4573_spi_startup(0, 0, 10000000, SPI_MODE_0); + lg4573_spi_startup(CONFIG_LG4573_BUS, + CONFIG_LG4573_CS, + 10000000, SPI_MODE_0);
return 0; } - diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index 45ca5da..e95ec81 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -60,7 +60,7 @@ DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_SYS_BOARD_VERSION == 1) #include "./aristainetos-v1.c" -#elif (CONFIG_SYS_BOARD_VERSION == 2) +#elif ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3)) #include "./aristainetos-v2.c" #endif
@@ -174,7 +174,7 @@ struct display_info_t const displays[] = { .vmode = FB_VMODE_NONINTERLACED } } -#if (CONFIG_SYS_BOARD_VERSION == 2) +#if ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3)) , { .bus = -1, .addr = 0, diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig new file mode 100644 index 0000000..af2dbc6 --- /dev/null +++ b/configs/aristainetos2b_defconfig @@ -0,0 +1,7 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_TARGET_ARISTAINETOS2B=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index 30d903e..20afdd6 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -45,7 +45,6 @@ #define CONFIG_SPI_FLASH_MTD #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI -#define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN @@ -106,9 +105,6 @@ "ubiboot=echo Booting from ubi ...; " \ "run ubiargs addmtd addmisc set_fit_default;" \ "bootm ${fit_addr_r}\0" \ - "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \ - "ubifsload ${fit_addr_r} /boot/system.itb; " \ - "imi ${fit_addr_r}\0 " \ "rescueargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/ram rw\0 " \ "rescueboot=echo Booting rescue system from NOR ...; " \ diff --git a/include/configs/aristainetos.h b/include/configs/aristainetos.h index 258866a..be93deb 100644 --- a/include/configs/aristainetos.h +++ b/include/configs/aristainetos.h @@ -22,6 +22,7 @@
#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ @@ -32,7 +33,10 @@ "addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ "ubiargs=setenv bootargs console=${console},${baudrate} " \ - "ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " + "ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \ + "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \ + "ubifsload ${fit_addr_r} /boot/system.itb; " \ + "imi ${fit_addr_r}\0 "
#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) #define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index dd090c5..152f5e9 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -24,6 +24,7 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_PHY_MICREL_KSZ9031
+#define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_CS 1
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ @@ -34,7 +35,10 @@ "-(rescue-system);gpmi-nand:-(ubi)\0" \ "addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \ "ubiargs=setenv bootargs console=${console},${baudrate} " \ - "ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " + "ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \ + "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \ + "ubifsload ${fit_addr_r} /boot/system.itb; " \ + "imi ${fit_addr_r}\0 "
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
diff --git a/include/configs/aristainetos2b.h b/include/configs/aristainetos2b.h new file mode 100644 index 0000000..78791db --- /dev/null +++ b/include/configs/aristainetos2b.h @@ -0,0 +1,62 @@ +/* + * (C) Copyright 2015 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX6DL aristainetos2 board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __ARISTAINETOS2B_CONFIG_H +#define __ARISTAINETOS2B_CONFIG_H + +#define CONFIG_SYS_BOARD_VERSION 3 +#define CONFIG_HOSTNAME aristainetos2 +#define CONFIG_BOARDNAME "aristainetos2-revB" + +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1" + +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_PHY_MICREL_KSZ9031 + +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 + +#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ + "board_type=aristainetos2_7@1\0" \ + "nor_bootdelay=-2\0" \ + "mtdids=nand0=gpmi-nand,nor0=spi0.0\0" \ + "mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \ + "-(rescue-system);gpmi-nand:-(ubi)\0" \ + "addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \ + "ubiargs=setenv bootargs console=${console},${baudrate} " \ + "ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \ + "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \ + "ubifsload ${fit_addr_r} /boot/system.itb; " \ + "imi ${fit_addr_r}\0 " \ + +#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ + +#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) +#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0) +#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15) + +/* Framebuffer */ +#define CONFIG_SYS_LDB_CLOCK 33246000 +#define CONFIG_LG4573 +#define CONFIG_LG4573_BUS 0 +#define CONFIG_LG4573_CS 1 + +#define CONFIG_CMD_BMP + +#define CONFIG_PWM_IMX +#define CONFIG_IMX6_PWM_PER_CLK 66000000 + +#include "aristainetos-common.h" + +#endif /* __ARISTAINETOS2B_CONFIG_H */
On 24/08/2015 11:36, Heiko Schocher wrote:
there is a 2b board version of the aristainetos2 board. Differences to the v2:
- spi cs for the nor flash and display controller changed
- some pinmux changes
- LED gpio settings changed
Signed-off-by: Heiko Schocher hs@denx.de
Changes in v2:
- add comments from Stefano Babic
- move the spi bus settings for the display into this patch
- rebased against u-boot-imx e1518ebda736a1225c4c2a651e21c446dee3fdb0
arch/arm/cpu/armv7/mx6/Kconfig | 4 +++ board/aristainetos/Kconfig | 13 ++++++++ board/aristainetos/aristainetos-v2.c | 56 +++++++++++++++++++++++++++---- board/aristainetos/aristainetos.c | 4 +-- configs/aristainetos2b_defconfig | 7 ++++ include/configs/aristainetos-common.h | 4 --- include/configs/aristainetos.h | 6 +++- include/configs/aristainetos2.h | 6 +++- include/configs/aristainetos2b.h | 62 +++++++++++++++++++++++++++++++++++ 9 files changed, 148 insertions(+), 14 deletions(-) create mode 100644 configs/aristainetos2b_defconfig create mode 100644 include/configs/aristainetos2b.h
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index c43cea8..4281214 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -41,6 +41,10 @@ config TARGET_ARISTAINETOS2 bool "aristainetos2" select CPU_V7
+config TARGET_ARISTAINETOS2B
- bool "Support aristainetos2-revB"
- select CPU_V7
config TARGET_CGTQMX6EVAL bool "cgtqmx6eval" select CPU_V7 diff --git a/board/aristainetos/Kconfig b/board/aristainetos/Kconfig index 500b665..e987f38 100644 --- a/board/aristainetos/Kconfig +++ b/board/aristainetos/Kconfig @@ -23,3 +23,16 @@ config SYS_CONFIG_NAME default "aristainetos2"
endif
+if TARGET_ARISTAINETOS2B
+config SYS_BOARD
- default "aristainetos"
+config SYS_SOC
- default "mx6"
+config SYS_CONFIG_NAME
- default "aristainetos2b"
+endif diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index dd5d8a3..7013e79 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -42,8 +42,16 @@ #define USDHC2_PAD_CTRL (PAD_CTL_SPEED_LOW | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-#define ECSPI1_CS0 IMX_GPIO_NR(4, 9) /* 4.3 display controller */ -#define ECSPI4_CS0 IMX_GPIO_NR(3, 29) +#if (CONFIG_SYS_BOARD_VERSION == 2)
- /* 4.3 display controller */
- #define ECSPI1_CS0 IMX_GPIO_NR(4, 9)
- #define ECSPI4_CS0 IMX_GPIO_NR(3, 29)
+#elif (CONFIG_SYS_BOARD_VERSION == 3)
- #define ECSPI1_CS0 IMX_GPIO_NR(2, 30) /* NOR flash */
- /* 4.3 display controller */
- #define ECSPI1_CS1 IMX_GPIO_NR(4, 10)
+#endif
#define SOFT_RESET_GPIO IMX_GPIO_NR(7, 13) #define SD2_DRIVER_ENABLE IMX_GPIO_NR(7, 8)
@@ -103,7 +111,11 @@ iomux_v3_cfg_t const gpio_pads[] = { /* LED yellow */ MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL), /* LED red */ +#if (CONFIG_SYS_BOARD_VERSION == 2) MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), +#elif (CONFIG_SYS_BOARD_VERSION == 3)
- MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL),
+#endif /* LED green */ MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* LED blue */ @@ -170,7 +182,12 @@ static iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), +#if (CONFIG_SYS_BOARD_VERSION == 2) MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(SPI_PAD_CTRL), +#elif (CONFIG_SYS_BOARD_VERSION == 3)
- MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+#endif };
static void setup_iomux_enet(void) @@ -178,6 +195,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); }
+#if (CONFIG_SYS_BOARD_VERSION == 2) iomux_v3_cfg_t const ecspi4_pads[] = { MX6_PAD_EIM_D21__ECSPI4_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_EIM_D22__ECSPI4_MISO | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -185,6 +203,7 @@ iomux_v3_cfg_t const ecspi4_pads[] = { MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#endif
static iomux_v3_cfg_t const display_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(DISP_PAD_CTRL), @@ -220,11 +239,17 @@ static iomux_v3_cfg_t const display_pads[] = { int board_spi_cs_gpio(unsigned bus, unsigned cs) { if (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS) +#if (CONFIG_SYS_BOARD_VERSION == 2) return IMX_GPIO_NR(5, 2);
if (bus == 0 && cs == 0) return IMX_GPIO_NR(4, 9); +#elif (CONFIG_SYS_BOARD_VERSION == 3)
return ECSPI1_CS0;if (bus == 0 && cs == 1)
return ECSPI1_CS1;+#endif return -1; }
@@ -233,15 +258,22 @@ static void setup_spi(void) int i;
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
+#if (CONFIG_SYS_BOARD_VERSION == 2) imx_iomux_v3_setup_multiple_pads(ecspi4_pads, ARRAY_SIZE(ecspi4_pads)); +#endif
for (i = 0; i < 4; i++) enable_spi_clk(true, i);
gpio_direction_output(ECSPI1_CS0, 1);
+#if (CONFIG_SYS_BOARD_VERSION == 2) gpio_direction_output(ECSPI4_CS1, 0);
- /* set cs0 to high (second device on spi bus #4) */ gpio_direction_output(ECSPI4_CS0, 1);
+#elif (CONFIG_SYS_BOARD_VERSION == 3)
- gpio_direction_output(ECSPI1_CS1, 1);
+#endif }
static void setup_iomux_uart(void) @@ -582,6 +614,7 @@ static void setup_board_gpio(void) gpio_direction_output(IMX_GPIO_NR(1, 25), 0);
/* switch off Status LEDs */ +#if (CONFIG_SYS_BOARD_VERSION == 2) gpio_request(IMX_GPIO_NR(6, 16), "LED yellow"); /* 176 */ gpio_direction_output(IMX_GPIO_NR(6, 16), 1); gpio_request(IMX_GPIO_NR(2, 28), "LED red"); /* 60 */ @@ -590,11 +623,21 @@ static void setup_board_gpio(void) gpio_direction_output(IMX_GPIO_NR(5, 4), 1); gpio_request(IMX_GPIO_NR(2, 29), "LED blue"); /* 61 */ gpio_direction_output(IMX_GPIO_NR(2, 29), 1); +#elif (CONFIG_SYS_BOARD_VERSION == 3)
- gpio_request(IMX_GPIO_NR(6, 16), "LED yellow"); /* 176 */
- gpio_direction_output(IMX_GPIO_NR(6, 16), 0);
- gpio_request(IMX_GPIO_NR(5, 0), "LED red"); /* 128 */
- gpio_direction_output(IMX_GPIO_NR(5, 0), 0);
- gpio_request(IMX_GPIO_NR(5, 4), "LED green"); /* 132 */
- gpio_direction_output(IMX_GPIO_NR(5, 4), 0);
- gpio_request(IMX_GPIO_NR(2, 29), "LED blue"); /* 61 */
- gpio_direction_output(IMX_GPIO_NR(2, 29), 0);
+#endif }
static void setup_board_spi(void) {
- /* enable spi bus #2 SS drivers */
- /* enable spi bus #2 SS drivers (and spi bus #4 SS1 for rev2b) */ gpio_direction_output(IMX_GPIO_NR(6, 6), 1);
}
@@ -629,8 +672,9 @@ int board_late_init(void) /* if we have the lg panel, we can initialze it now */ if (panel) if (!strcmp(panel, displays[1].mode.name))
lg4573_spi_startup(0, 0, 10000000, SPI_MODE_0);
lg4573_spi_startup(CONFIG_LG4573_BUS,CONFIG_LG4573_CS,10000000, SPI_MODE_0);return 0;
}
diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index 45ca5da..e95ec81 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -60,7 +60,7 @@ DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_SYS_BOARD_VERSION == 1) #include "./aristainetos-v1.c" -#elif (CONFIG_SYS_BOARD_VERSION == 2) +#elif ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3)) #include "./aristainetos-v2.c" #endif
@@ -174,7 +174,7 @@ struct display_info_t const displays[] = { .vmode = FB_VMODE_NONINTERLACED } } -#if (CONFIG_SYS_BOARD_VERSION == 2) +#if ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3)) , { .bus = -1, .addr = 0, diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig new file mode 100644 index 0000000..af2dbc6 --- /dev/null +++ b/configs/aristainetos2b_defconfig @@ -0,0 +1,7 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_TARGET_ARISTAINETOS2B=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_SPI_FLASH=y diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index 30d903e..20afdd6 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -45,7 +45,6 @@ #define CONFIG_SPI_FLASH_MTD #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI -#define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN @@ -106,9 +105,6 @@ "ubiboot=echo Booting from ubi ...; " \ "run ubiargs addmtd addmisc set_fit_default;" \ "bootm ${fit_addr_r}\0" \
- "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
"ubifsload ${fit_addr_r} /boot/system.itb; " \"imi ${fit_addr_r}\0 " \diff --git a/include/configs/aristainetos.h b/include/configs/aristainetos.h index 258866a..be93deb 100644 --- a/include/configs/aristainetos.h +++ b/include/configs/aristainetos.h @@ -22,6 +22,7 @@
#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ @@ -32,7 +33,10 @@ "addmisc=setenv bootargs ${bootargs} consoleblank=0\0" \ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ "ubiargs=setenv bootargs console=${console},${baudrate} " \
"ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 "
"ubi.mtd=0,2048 root=ubi0:rootfs rootfstype=ubifs\0 " \- "ubifs_load_fit=sf probe;ubi part ubi 2048;ubifsmount ubi:rootfs;" \
"ubifsload ${fit_addr_r} /boot/system.itb; " \"imi ${fit_addr_r}\0 "#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) #define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(3, 31) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index dd090c5..152f5e9 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -24,6 +24,7 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_PHY_MICREL_KSZ9031
+#define CONFIG_SF_DEFAULT_BUS 3 #define CONFIG_SF_DEFAULT_CS 1
#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \ @@ -34,7 +35,10 @@ "-(rescue-system);gpmi-nand:-(ubi)\0" \ "addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \ "ubiargs=setenv bootargs console=${console},${baudrate} " \
"ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 "
"ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \- "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
"ubifsload ${fit_addr_r} /boot/system.itb; " \"imi ${fit_addr_r}\0 "#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
diff --git a/include/configs/aristainetos2b.h b/include/configs/aristainetos2b.h new file mode 100644 index 0000000..78791db --- /dev/null +++ b/include/configs/aristainetos2b.h @@ -0,0 +1,62 @@ +/*
- (C) Copyright 2015
- Heiko Schocher, DENX Software Engineering, hs@denx.de.
- Based on:
- Copyright (C) 2012 Freescale Semiconductor, Inc.
- Configuration settings for the Freescale i.MX6DL aristainetos2 board.
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __ARISTAINETOS2B_CONFIG_H +#define __ARISTAINETOS2B_CONFIG_H
+#define CONFIG_SYS_BOARD_VERSION 3 +#define CONFIG_HOSTNAME aristainetos2 +#define CONFIG_BOARDNAME "aristainetos2-revB"
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1"
+#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_PHY_MICREL_KSZ9031
+#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
- "board_type=aristainetos2_7@1\0" \
- "nor_bootdelay=-2\0" \
- "mtdids=nand0=gpmi-nand,nor0=spi0.0\0" \
- "mtdparts=mtdparts=spi0.0:832k(u-boot),64k(env),64k(env-red)," \
"-(rescue-system);gpmi-nand:-(ubi)\0" \- "addmisc=setenv bootargs ${bootargs} net.ifnames=0 consoleblank=0\0" \
- "ubiargs=setenv bootargs console=${console},${baudrate} " \
"ubi.mtd=0,4096 root=ubi0:rootfs rootfstype=ubifs\0 " \- "ubifs_load_fit=sf probe;ubi part ubi 4096;ubifsmount ubi:rootfs;" \
"ubifsload ${fit_addr_r} /boot/system.itb; " \"imi ${fit_addr_r}\0 " \+#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define ARISTAINETOS_USB_OTG_PWR IMX_GPIO_NR(4, 15) +#define ARISTAINETOS_USB_H1_PWR IMX_GPIO_NR(1, 0) +#define CONFIG_GPIO_ENABLE_SPI_FLASH IMX_GPIO_NR(2, 15)
+/* Framebuffer */ +#define CONFIG_SYS_LDB_CLOCK 33246000 +#define CONFIG_LG4573 +#define CONFIG_LG4573_BUS 0 +#define CONFIG_LG4573_CS 1
+#define CONFIG_CMD_BMP
+#define CONFIG_PWM_IMX +#define CONFIG_IMX6_PWM_PER_CLK 66000000
+#include "aristainetos-common.h"
+#endif /* __ARISTAINETOS2B_CONFIG_H */
Applied to u-boot-imx, thanks !
Best regards, Stefano Babic
Hi Heiko,
On Mon, 24 Aug 2015 11:36:39 +0200 Heiko Schocher hs@denx.de wrote:
make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards.
Signed-off-by: Heiko Schocher hs@denx.de
Acked-by: Anatolij Gustschin agust@denx.de
On 24/08/2015 11:36, Heiko Schocher wrote:
make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards.
Signed-off-by: Heiko Schocher hs@denx.de
Changes in v2:
- add comments from Stefano Babic
- move this patch before the 2b aristainetos board support and add there the spi bus settings for the display
- rebased against u-boot-imx e1518ebda736a1225c4c2a651e21c446dee3fdb0
drivers/video/lg4573.c | 3 ++- include/configs/aristainetos2.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c index 43670fc..11fef27 100644 --- a/drivers/video/lg4573.c +++ b/drivers/video/lg4573.c @@ -220,7 +220,8 @@ err_claim_bus: static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
- lg4573_spi_startup(0, 0, 10000000, SPI_MODE_0);
- lg4573_spi_startup(CONFIG_LG4573_BUS, CONFIG_LG4573_CS, 10000000,
SPI_MODE_0);}
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index faeafe2..dd090c5 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -45,6 +45,8 @@ /* Framebuffer */ #define CONFIG_SYS_LDB_CLOCK 33246000 #define CONFIG_LG4573 +#define CONFIG_LG4573_BUS 0 +#define CONFIG_LG4573_CS 0
#define CONFIG_CMD_BMP
Applied to u-boot-imx, thanks !
Best regards, Stefano Babic
participants (3)
-
Anatolij Gustschin -
Heiko Schocher -
Stefano Babic