[PATCH] arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet

The Globalscale Technologies Sheevaplug board has the network chip Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board. - Add board_eth_init() to use uclass mvgbe to bring up the network. And remove ad-hoc code. - Enable CONFIG_PHY_MARVELL to properly configure the network. - Miscellaneous changes: Move constants to .c file and remove header file board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup comments.
Signed-off-by: Tony Dinh mibodhi@gmail.com ---
board/Marvell/sheevaplug/sheevaplug.c | 83 +++++---------------------- board/Marvell/sheevaplug/sheevaplug.h | 24 -------- configs/sheevaplug_defconfig | 1 + include/configs/sheevaplug.h | 17 +++--- 4 files changed, 22 insertions(+), 103 deletions(-) delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 5952d158b2..26ee39ef77 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2021 Tony Dinh mibodhi@gmail.com + * Copyright (C) 2021-2022 Tony Dinh mibodhi@gmail.com * (C) Copyright 2009 * Marvell Semiconductor <www.marvell.com> * Written-by: Prafulla Wadaskar prafulla@marvell.com @@ -8,17 +8,21 @@
#include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/global_data.h> #include <asm/mach-types.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> -#include "sheevaplug.h" +#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
+#define SHEEVAPLUG_OE_LOW (~(0)) +#define SHEEVAPLUG_OE_HIGH (~(0)) +#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */ +#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */ + int board_early_init_f(void) { /* @@ -88,6 +92,11 @@ int board_early_init_f(void) return 0; }
+int board_eth_init(struct bd_info *bis) +{ + return cpu_eth_init(bis); +} + int board_init(void) { /* @@ -95,72 +104,8 @@ int board_init(void) */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
- /* adress of boot parameters */ + /* address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0; } - -static int fdt_get_phy_addr(const char *path) -{ - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; -} - -#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{ - u16 reg; - int phyaddr; - char *name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(eth0_path); - if (phyaddr < 0) - return; - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, phyaddr); - - printf("88E1116 Initialized on %s\n", name); -} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h deleted file mode 100644 index e026c1b53b..0000000000 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar prafulla@marvell.com - */ - -#ifndef __SHEEVAPLUG_H -#define __SHEEVAPLUG_H - -#define SHEEVAPLUG_OE_LOW (~(0)) -#define SHEEVAPLUG_OE_HIGH (~(0)) -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */ - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __SHEEVAPLUG_H */ diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0c5031b2d2..41bf1065b0 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_MVEBU_MMC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 4499a63aed..276c134a20 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * (C) Copyright 2022 Tony Dinh mibodhi@gmail.com * (C) Copyright 2009-2014 * Gerald Kerma dreagle@doukki.net * Marvell Semiconductor <www.marvell.com> @@ -11,13 +12,6 @@
#include "mv-common.h"
-/* - * Environment variables configurations - */ -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ /* * Environment is right behind U-Boot in flash. Make sure U-Boot * doesn't grow into the environment area. @@ -29,7 +23,7 @@ */
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ - "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" @@ -37,13 +31,16 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif
/* * SATA driver configuration + * + * The original Sheevaplug board does not have eSATA, so allow SATA to be disabled. */ #ifdef CONFIG_SATA #define CONFIG_LBA48

On 3/7/22 00:12, Tony Dinh wrote:
The Globalscale Technologies Sheevaplug board has the network chip Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup comments.
Signed-off-by: Tony Dinh mibodhi@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
board/Marvell/sheevaplug/sheevaplug.c | 83 +++++---------------------- board/Marvell/sheevaplug/sheevaplug.h | 24 -------- configs/sheevaplug_defconfig | 1 + include/configs/sheevaplug.h | 17 +++--- 4 files changed, 22 insertions(+), 103 deletions(-) delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 5952d158b2..26ee39ef77 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- Copyright (C) 2021 Tony Dinh mibodhi@gmail.com
- Copyright (C) 2021-2022 Tony Dinh mibodhi@gmail.com
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
@@ -8,17 +8,21 @@
#include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/global_data.h> #include <asm/mach-types.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> -#include "sheevaplug.h" +#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
+#define SHEEVAPLUG_OE_LOW (~(0)) +#define SHEEVAPLUG_OE_HIGH (~(0)) +#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */ +#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
- int board_early_init_f(void) { /*
@@ -88,6 +92,11 @@ int board_early_init_f(void) return 0; }
+int board_eth_init(struct bd_info *bis) +{
- return cpu_eth_init(bis);
+}
- int board_init(void) { /*
@@ -95,72 +104,8 @@ int board_init(void) */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
- /* adress of boot parameters */
/* address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0; }
-static int fdt_get_phy_addr(const char *path) -{
- const void *fdt = gd->fdt_blob;
- const u32 *reg;
- const u32 *val;
- int node, phandle, addr;
- /* Find the node by its full path */
- node = fdt_path_offset(fdt, path);
- if (node >= 0) {
/* Look up phy-handle */
val = fdt_getprop(fdt, node, "phy-handle", NULL);
if (val) {
phandle = fdt32_to_cpu(*val);
if (!phandle)
return -1;
/* Follow it to its node */
node = fdt_node_offset_by_phandle(fdt, phandle);
if (node) {
/* Look up reg */
reg = fdt_getprop(fdt, node, "reg", NULL);
if (reg) {
addr = fdt32_to_cpu(*reg);
return addr;
}
}
}
- }
- return -1;
-}
-#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{
- u16 reg;
- int phyaddr;
- char *name = "ethernet-controller@72000";
- char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
- if (miiphy_set_current_dev(name))
return;
- phyaddr = fdt_get_phy_addr(eth0_path);
- if (phyaddr < 0)
return;
- /*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
- miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®);
- reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
- miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
- /* reset the phy */
- miiphy_reset(name, phyaddr);
- printf("88E1116 Initialized on %s\n", name);
-} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h deleted file mode 100644 index e026c1b53b..0000000000 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef __SHEEVAPLUG_H -#define __SHEEVAPLUG_H
-#define SHEEVAPLUG_OE_LOW (~(0)) -#define SHEEVAPLUG_OE_HIGH (~(0)) -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
-/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-#endif /* __SHEEVAPLUG_H */ diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0c5031b2d2..41bf1065b0 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_MVEBU_MMC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 4499a63aed..276c134a20 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /*
- (C) Copyright 2022 Tony Dinh mibodhi@gmail.com
- (C) Copyright 2009-2014
- Gerald Kerma dreagle@doukki.net
- Marvell Semiconductor <www.marvell.com>
@@ -11,13 +12,6 @@
#include "mv-common.h"
-/*
- Environment variables configurations
- */
-/*
- max 4k env size is enough, but in case of nand
- it has to be rounded to sector size
- */ /*
- Environment is right behind U-Boot in flash. Make sure U-Boot
- doesn't grow into the environment area.
@@ -29,7 +23,7 @@ */
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
- "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \
- "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
@@ -37,13 +31,16 @@ /*
- Ethernet Driver configuration
*/ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif
/*
- SATA driver configuration
*/ #ifdef CONFIG_SATA #define CONFIG_LBA48
- The original Sheevaplug board does not have eSATA, so allow SATA to be disabled.
Viele Grüße, Stefan Roese

Hi Stefan,
Perhaps you've missed merging this patch into your tree, or during the pull request to Tom.
I saw Tom's recent patch to move the CONFIG_RESET_PHY_R to Kconfig: https://lists.denx.de/pipermail/u-boot/2022-March/478333.html
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig +CONFIG_RESET_PHY_R=y
And that should not be added for the Sheevaplug, since we have undef CONFIG_RESET_PHY_R in include/configs/sheevaplug.h
Thanks, Tony
On Tue, Mar 8, 2022 at 4:25 AM Stefan Roese sr@denx.de wrote:
On 3/7/22 00:12, Tony Dinh wrote:
The Globalscale Technologies Sheevaplug board has the network chip Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup comments.
Signed-off-by: Tony Dinh mibodhi@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
board/Marvell/sheevaplug/sheevaplug.c | 83 +++++---------------------- board/Marvell/sheevaplug/sheevaplug.h | 24 -------- configs/sheevaplug_defconfig | 1 + include/configs/sheevaplug.h | 17 +++--- 4 files changed, 22 insertions(+), 103 deletions(-) delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 5952d158b2..26ee39ef77 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- Copyright (C) 2021 Tony Dinh mibodhi@gmail.com
- Copyright (C) 2021-2022 Tony Dinh mibodhi@gmail.com
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
@@ -8,17 +8,21 @@
#include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/global_data.h> #include <asm/mach-types.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> -#include "sheevaplug.h" +#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
+#define SHEEVAPLUG_OE_LOW (~(0)) +#define SHEEVAPLUG_OE_HIGH (~(0)) +#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */ +#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
- int board_early_init_f(void) { /*
@@ -88,6 +92,11 @@ int board_early_init_f(void) return 0; }
+int board_eth_init(struct bd_info *bis) +{
return cpu_eth_init(bis);
+}
- int board_init(void) { /*
@@ -95,72 +104,8 @@ int board_init(void) */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
/* adress of boot parameters */
/* address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; return 0;
}
-static int fdt_get_phy_addr(const char *path) -{
const void *fdt = gd->fdt_blob;
const u32 *reg;
const u32 *val;
int node, phandle, addr;
/* Find the node by its full path */
node = fdt_path_offset(fdt, path);
if (node >= 0) {
/* Look up phy-handle */
val = fdt_getprop(fdt, node, "phy-handle", NULL);
if (val) {
phandle = fdt32_to_cpu(*val);
if (!phandle)
return -1;
/* Follow it to its node */
node = fdt_node_offset_by_phandle(fdt, phandle);
if (node) {
/* Look up reg */
reg = fdt_getprop(fdt, node, "reg", NULL);
if (reg) {
addr = fdt32_to_cpu(*reg);
return addr;
}
}
}
}
return -1;
-}
-#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{
u16 reg;
int phyaddr;
char *name = "ethernet-controller@72000";
char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
if (miiphy_set_current_dev(name))
return;
phyaddr = fdt_get_phy_addr(eth0_path);
if (phyaddr < 0)
return;
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, phyaddr);
printf("88E1116 Initialized on %s\n", name);
-} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h deleted file mode 100644 index e026c1b53b..0000000000 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef __SHEEVAPLUG_H -#define __SHEEVAPLUG_H
-#define SHEEVAPLUG_OE_LOW (~(0)) -#define SHEEVAPLUG_OE_HIGH (~(0)) -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
-/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-#endif /* __SHEEVAPLUG_H */ diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0c5031b2d2..41bf1065b0 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_MVEBU_MMC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 4499a63aed..276c134a20 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /*
- (C) Copyright 2022 Tony Dinh mibodhi@gmail.com
- (C) Copyright 2009-2014
- Gerald Kerma dreagle@doukki.net
- Marvell Semiconductor <www.marvell.com>
@@ -11,13 +12,6 @@
#include "mv-common.h"
-/*
- Environment variables configurations
- */
-/*
- max 4k env size is enough, but in case of nand
- it has to be rounded to sector size
- */ /*
- Environment is right behind U-Boot in flash. Make sure U-Boot
- doesn't grow into the environment area.
@@ -29,7 +23,7 @@ */
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \
"=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
@@ -37,13 +31,16 @@ /*
- Ethernet Driver configuration
*/ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif
/*
- SATA driver configuration
*/ #ifdef CONFIG_SATA #define CONFIG_LBA48
- The original Sheevaplug board does not have eSATA, so allow SATA to be disabled.
Viele Grüße, Stefan Roese
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

Hi Tony,
On 3/21/22 11:36, Tony Dinh wrote:
Hi Stefan,
Perhaps you've missed merging this patch into your tree, or during the pull request to Tom.
No, I've queued this patch and other Kirkwood patches for the next merge window. As we're already in rc4 by now.
I saw Tom's recent patch to move the CONFIG_RESET_PHY_R to Kconfig: https://lists.denx.de/pipermail/u-boot/2022-March/478333.html
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig +CONFIG_RESET_PHY_R=y
I missed this one. Thanks for pointing me to it.
And that should not be added for the Sheevaplug, since we have undef CONFIG_RESET_PHY_R in include/configs/sheevaplug.h
With the move to Kconfig and the removal from arch/arm/mach-kirkwood/include/mach/config.h, we (you?) could now tackle this quite ugly CONFIG_RESET_PHY_R handling again.
I think that Tom plans to pull his CONFIG_RESET_PHY_R after the release of v2022.04. So best would be, if you could send some patches handling this CONFIG_RESET_PHY_R setup in the corresponding Kirkwood config/foo_defconfig files after this is in master (or in next). I'll try to review and pull these patches quickly then.
What do you think? Would this work for you?
Thanks, Stefan
Thanks, Tony
On Tue, Mar 8, 2022 at 4:25 AM Stefan Roese sr@denx.de wrote:
On 3/7/22 00:12, Tony Dinh wrote:
The Globalscale Technologies Sheevaplug board has the network chip Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup comments.
Signed-off-by: Tony Dinh mibodhi@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
board/Marvell/sheevaplug/sheevaplug.c | 83 +++++---------------------- board/Marvell/sheevaplug/sheevaplug.h | 24 -------- configs/sheevaplug_defconfig | 1 + include/configs/sheevaplug.h | 17 +++--- 4 files changed, 22 insertions(+), 103 deletions(-) delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 5952d158b2..26ee39ef77 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- Copyright (C) 2021 Tony Dinh mibodhi@gmail.com
- Copyright (C) 2021-2022 Tony Dinh mibodhi@gmail.com
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
@@ -8,17 +8,21 @@
#include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/global_data.h> #include <asm/mach-types.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> -#include "sheevaplug.h" +#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
+#define SHEEVAPLUG_OE_LOW (~(0)) +#define SHEEVAPLUG_OE_HIGH (~(0)) +#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */ +#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
- int board_early_init_f(void) { /*
@@ -88,6 +92,11 @@ int board_early_init_f(void) return 0; }
+int board_eth_init(struct bd_info *bis) +{
return cpu_eth_init(bis);
+}
- int board_init(void) { /*
@@ -95,72 +104,8 @@ int board_init(void) */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
/* adress of boot parameters */
/* address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; return 0;
}
-static int fdt_get_phy_addr(const char *path) -{
const void *fdt = gd->fdt_blob;
const u32 *reg;
const u32 *val;
int node, phandle, addr;
/* Find the node by its full path */
node = fdt_path_offset(fdt, path);
if (node >= 0) {
/* Look up phy-handle */
val = fdt_getprop(fdt, node, "phy-handle", NULL);
if (val) {
phandle = fdt32_to_cpu(*val);
if (!phandle)
return -1;
/* Follow it to its node */
node = fdt_node_offset_by_phandle(fdt, phandle);
if (node) {
/* Look up reg */
reg = fdt_getprop(fdt, node, "reg", NULL);
if (reg) {
addr = fdt32_to_cpu(*reg);
return addr;
}
}
}
}
return -1;
-}
-#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{
u16 reg;
int phyaddr;
char *name = "ethernet-controller@72000";
char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
if (miiphy_set_current_dev(name))
return;
phyaddr = fdt_get_phy_addr(eth0_path);
if (phyaddr < 0)
return;
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, phyaddr);
printf("88E1116 Initialized on %s\n", name);
-} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h deleted file mode 100644 index e026c1b53b..0000000000 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- (C) Copyright 2009
- Marvell Semiconductor <www.marvell.com>
- Written-by: Prafulla Wadaskar prafulla@marvell.com
- */
-#ifndef __SHEEVAPLUG_H -#define __SHEEVAPLUG_H
-#define SHEEVAPLUG_OE_LOW (~(0)) -#define SHEEVAPLUG_OE_HIGH (~(0)) -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
-/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-#endif /* __SHEEVAPLUG_H */ diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0c5031b2d2..41bf1065b0 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_MVEBU_MMC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 4499a63aed..276c134a20 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /*
- (C) Copyright 2022 Tony Dinh mibodhi@gmail.com
- (C) Copyright 2009-2014
- Gerald Kerma dreagle@doukki.net
- Marvell Semiconductor <www.marvell.com>
@@ -11,13 +12,6 @@
#include "mv-common.h"
-/*
- Environment variables configurations
- */
-/*
- max 4k env size is enough, but in case of nand
- it has to be rounded to sector size
- */ /*
- Environment is right behind U-Boot in flash. Make sure U-Boot
- doesn't grow into the environment area.
@@ -29,7 +23,7 @@ */
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \
"=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
@@ -37,13 +31,16 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ +#ifdef CONFIG_RESET_PHY_R +#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ +#endif
/* * SATA driver configuration
#ifdef CONFIG_SATA #define CONFIG_LBA48
- The original Sheevaplug board does not have eSATA, so allow SATA to be disabled. */
Viele Grüße, Stefan Roese
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
Viele Grüße, Stefan Roese

On Mon, Mar 21, 2022 at 03:36:50AM -0700, Tony Dinh wrote:
Hi Stefan,
Perhaps you've missed merging this patch into your tree, or during the pull request to Tom.
I saw Tom's recent patch to move the CONFIG_RESET_PHY_R to Kconfig: https://lists.denx.de/pipermail/u-boot/2022-March/478333.html
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig +CONFIG_RESET_PHY_R=y
And that should not be added for the Sheevaplug, since we have undef CONFIG_RESET_PHY_R in include/configs/sheevaplug.h
Please note that because of how the config.h files are handled, that undef doesn't work. A follow up to my patch to clean up any/all of the wrong marvell boards would be appreciated. And as Stefan noted, this is going to be in -next and not master at this time. Thanks!

Hi Stefan & Tom,
Sure, I will apply Tom's patch to my work tree and rebuild the Kirkwood boards. My grep shows 33 defconfig with ARCH_KIRKWOOD. After that, I will do a quick review on the boards' files for sanity.
Tony
On Mon, Mar 21, 2022 at 4:46 AM Tom Rini trini@konsulko.com wrote:
On Mon, Mar 21, 2022 at 03:36:50AM -0700, Tony Dinh wrote:
Hi Stefan,
Perhaps you've missed merging this patch into your tree, or during the pull request to Tom.
I saw Tom's recent patch to move the CONFIG_RESET_PHY_R to Kconfig: https://lists.denx.de/pipermail/u-boot/2022-March/478333.html
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig +CONFIG_RESET_PHY_R=y
And that should not be added for the Sheevaplug, since we have undef CONFIG_RESET_PHY_R in include/configs/sheevaplug.h
Please note that because of how the config.h files are handled, that undef doesn't work. A follow up to my patch to clean up any/all of the wrong marvell boards would be appreciated. And as Stefan noted, this is going to be in -next and not master at this time. Thanks!
-- Tom

Hi Tony,
On 3/21/22 22:46, Tony Dinh wrote:
Hi Stefan & Tom,
Sure, I will apply Tom's patch to my work tree and rebuild the Kirkwood boards. My grep shows 33 defconfig with ARCH_KIRKWOOD. After that, I will do a quick review on the boards' files for sanity.
Perfect, thanks.
Thanks, Stefan
Tony
On Mon, Mar 21, 2022 at 4:46 AM Tom Rini trini@konsulko.com wrote:
On Mon, Mar 21, 2022 at 03:36:50AM -0700, Tony Dinh wrote:
Hi Stefan,
Perhaps you've missed merging this patch into your tree, or during the pull request to Tom.
I saw Tom's recent patch to move the CONFIG_RESET_PHY_R to Kconfig: https://lists.denx.de/pipermail/u-boot/2022-March/478333.html
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig +CONFIG_RESET_PHY_R=y
And that should not be added for the Sheevaplug, since we have undef CONFIG_RESET_PHY_R in include/configs/sheevaplug.h
Please note that because of how the config.h files are handled, that undef doesn't work. A follow up to my patch to clean up any/all of the wrong marvell boards would be appreciated. And as Stefan noted, this is going to be in -next and not master at this time. Thanks!
-- Tom
Viele Grüße, Stefan Roese

Hi Stefan,
I did a review for the Kirkwood boards regarding the CONFIG_RESET_PHY_R usage. Here is my finding, and also a suggestion below to go forward with the conflict patches.
There are about 25 out of the total of 33 Kirkwood boards that either use CONFIG_RESET_PHY_R to invoke reset_phy(), or don't use CONFIG_RESET_PHY_R at all. And CONFIG_RESET_PHY_R is necessary for the boards that have reset_phy(), because even though we have DM_ETH enabled on these boards, the reset_phy() invokes miiphy_xxx calls to do ad-hoc setups for the board. CONFIG_PHY_MARVELL is not enabled, so the proper Marvell PHY driver is not used.
d2net_v2_defconfig dns325_defconfig ds109_defconfig guruplug_defconfig ib62x0_defconfig inetspace_v2_defconfig kmcoge5un_defconfig km_kirkwood_128m16_defconfig km_kirkwood_defconfig km_kirkwood_pci_defconfig kmnusa_defconfig kmsuse2_defconfig lschlv2_defconfig lsxhl_defconfig net2big_v2_defconfig netspace_lite_v2_defconfig netspace_max_v2_defconfig netspace_mini_v2_defconfig netspace_v2_defconfig nsa310s_defconfig openrd_base_defconfig openrd_client_defconfig openrd_ultimate_defconfig SBx81LIFKW_defconfig SBx81LIFXCAT_defconfig
I have converted another 6 boards to use DM_ETH and PHY_MARVELL, so these 6 do not use CONFIG_RESET_PHY_R.
dockstar_defconfig dreamplug_defconfig goflexhome_defconfig iconnect_defconfig pogo_e02_defconfig pogo_v4_defconfig
Currently, we have 2 patches pending for 2 boards. The Sheevaplug (by me) and NAS220 (by Hajo Noerenberg). These 2 patches implement DM_ETH and PHY_MARVELL, so we are removing CONFIG_RESET_PHY_R in these 2 boards. But we also add undef CONFIG_RESET_PHY_R.
These 2 pending patches conflict with Tom's patch to move CONFIG_RESET_PHY_R to Kconfig. sheevaplug https://patchwork.ozlabs.org/project/uboot/patch/20220306231220.31868-1-mibo... nas220 https://patchwork.ozlabs.org/project/uboot/patch/cd6ec4ef-8c17-c340-f3d7-555...
So 1st approach is: we will hold off on these 2 pending patches. And wait for Tom's patch to merge to master. And then we will send another patch version (version 2 for Sheevaplug, and version 4 for NSA220).
The 2nd approach is: I will send in another patch to revert Tom's change to these 2 defconfigs, and then the 2 pending patches can be applied cleanly. And I send in another patch to reverse the undefs for CONFIG_RESET_PHY_R.
I'd vote for the 1st approach, because by holding off the 2 pending patches, we don't lose any functionality in the meantime. And it will be much easier to do.
Thanks, Tony
On Mon, Mar 21, 2022 at 4:46 AM Tom Rini trini@konsulko.com wrote:
On Mon, Mar 21, 2022 at 03:36:50AM -0700, Tony Dinh wrote:
Hi Stefan,
Perhaps you've missed merging this patch into your tree, or during the pull request to Tom.
I saw Tom's recent patch to move the CONFIG_RESET_PHY_R to Kconfig: https://lists.denx.de/pipermail/u-boot/2022-March/478333.html
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig +CONFIG_RESET_PHY_R=y
And that should not be added for the Sheevaplug, since we have undef CONFIG_RESET_PHY_R in include/configs/sheevaplug.h
Please note that because of how the config.h files are handled, that undef doesn't work. A follow up to my patch to clean up any/all of the wrong marvell boards would be appreciated. And as Stefan noted, this is going to be in -next and not master at this time. Thanks!
-- Tom

Hi Tony,
On 3/22/22 22:20, Tony Dinh wrote:
I did a review for the Kirkwood boards regarding the CONFIG_RESET_PHY_R usage. Here is my finding, and also a suggestion below to go forward with the conflict patches.
There are about 25 out of the total of 33 Kirkwood boards that either use CONFIG_RESET_PHY_R to invoke reset_phy(), or don't use CONFIG_RESET_PHY_R at all. And CONFIG_RESET_PHY_R is necessary for the boards that have reset_phy(), because even though we have DM_ETH enabled on these boards, the reset_phy() invokes miiphy_xxx calls to do ad-hoc setups for the board. CONFIG_PHY_MARVELL is not enabled, so the proper Marvell PHY driver is not used.
d2net_v2_defconfig dns325_defconfig ds109_defconfig guruplug_defconfig ib62x0_defconfig inetspace_v2_defconfig kmcoge5un_defconfig km_kirkwood_128m16_defconfig km_kirkwood_defconfig km_kirkwood_pci_defconfig kmnusa_defconfig kmsuse2_defconfig lschlv2_defconfig lsxhl_defconfig net2big_v2_defconfig netspace_lite_v2_defconfig netspace_max_v2_defconfig netspace_mini_v2_defconfig netspace_v2_defconfig nsa310s_defconfig openrd_base_defconfig openrd_client_defconfig openrd_ultimate_defconfig SBx81LIFKW_defconfig SBx81LIFXCAT_defconfig
I have converted another 6 boards to use DM_ETH and PHY_MARVELL, so these 6 do not use CONFIG_RESET_PHY_R.
dockstar_defconfig dreamplug_defconfig goflexhome_defconfig iconnect_defconfig pogo_e02_defconfig pogo_v4_defconfig
Currently, we have 2 patches pending for 2 boards. The Sheevaplug (by me) and NAS220 (by Hajo Noerenberg). These 2 patches implement DM_ETH and PHY_MARVELL, so we are removing CONFIG_RESET_PHY_R in these 2 boards. But we also add undef CONFIG_RESET_PHY_R.
These 2 pending patches conflict with Tom's patch to move CONFIG_RESET_PHY_R to Kconfig. sheevaplug https://patchwork.ozlabs.org/project/uboot/patch/20220306231220.31868-1-mibo... nas220 https://patchwork.ozlabs.org/project/uboot/patch/cd6ec4ef-8c17-c340-f3d7-555...
So 1st approach is: we will hold off on these 2 pending patches. And wait for Tom's patch to merge to master. And then we will send another patch version (version 2 for Sheevaplug, and version 4 for NSA220).
Good.
The 2nd approach is: I will send in another patch to revert Tom's change to these 2 defconfigs, and then the 2 pending patches can be applied cleanly. And I send in another patch to reverse the undefs for CONFIG_RESET_PHY_R.
I'd vote for the 1st approach, because by holding off the 2 pending patches, we don't lose any functionality in the meantime. And it will be much easier to do.
Yes, please let's move this way.
Thanks, Stefan

On 3/7/22 19:03, Pali Rohár wrote:
The Globalscale Technologies Sheevaplug board has the network chip Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310 driver to bring up Ethernet.
- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup comments.
Signed-off-by: Tony Dinh mibodhi@gmail.com
Applied to u-boot-marvell/master
Thanks, Stefan
board/Marvell/sheevaplug/sheevaplug.c | 83 +++++---------------------- board/Marvell/sheevaplug/sheevaplug.h | 24 -------- configs/sheevaplug_defconfig | 1 + include/configs/sheevaplug.h | 17 +++--- 4 files changed, 22 insertions(+), 103 deletions(-) delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheev
Viele Grüße, Stefan Roese
participants (3)
-
Stefan Roese
-
Tom Rini
-
Tony Dinh