-----Original Message----- From: Udit Agarwal udit.agarwal@nxp.com Sent: Wednesday, November 20, 2019 11:46 AM To: u-boot@lists.denx.de Cc: Priyanka Jain priyanka.jain@nxp.com; Arun Pathak arun.pathak@nxp.com; Ruchika Gupta ruchika.gupta@nxp.com; Udit Agarwal udit.agarwal@nxp.com Subject: [PATCH v3] Add TFA secure boot defconfig and Enables secure boot related configs in it.

Trim subject to fit in 60 characters. Current information is vague Mention which config is being added in subject/description.

Signed-off-by: Udit Agarwal udit.agarwal@nxp.com

Changes in V3: Corrects commit message and resends patch.

configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig

diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..aa293302f5 --- /dev/null +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -0,0 +1,57 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046AFRWY=y +CONFIG_TFABOOT=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SECURE_BOOT=y +CONFIG_QSPI_AHB_INIT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi:1m(rcw),15m(u- boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),44 8m(nand_free)" +CONFIG_MISC_INIT_R=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi:1m(rcw),15m(u- boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),44 8m(nand_free)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy" +CONFIG_ENV_IS_NOWHERE=y +CONFIG_DM=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH_BAR is not set +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_SCSI=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y

+CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_CMD_SETEXPR=y

2.17.1

-priyankajain