[U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C.
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
--- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..7f47d4d 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL; - div = readl(&clk->div_top0); - sub_div = readl(&clk->div_top1); + sub_div = readl(&clk->div_top0); + div = readl(&clk->div_top1); break; default: debug("%s: invalid peripheral %d", __func__, peripheral);
Joonyoung,
On 26/02/15 00:22, Guillaume GARDET wrote:
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..7f47d4d 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
sub_div = readl(&clk->div_top0);div = readl(&clk->div_top1);
Could you please check this patch?
Thanks, Minkyu Kang.
Le 28/02/2015 08:59, Minkyu Kang a écrit :
Joonyoung,
On 26/02/15 00:22, Guillaume GARDET wrote:
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..7f47d4d 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
sub_div = readl(&clk->div_top0);div = readl(&clk->div_top1);Could you please check this patch?
Ping.
This patch must be applied before the release, otherwise, keyboard on Samsung Chromebook will no work at all.
Guillaume
Thanks, Minkyu Kang.
Hi,
On 03/10/2015 05:52 PM, Guillaume Gardet wrote:
Le 28/02/2015 08:59, Minkyu Kang a écrit :
Joonyoung,
On 26/02/15 00:22, Guillaume GARDET wrote:
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..7f47d4d 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
sub_div = readl(&clk->div_top0);div = readl(&clk->div_top1);
Could you keep order of assign statements of div and sub_div variables?
div = readl(&clk->div_top1); sub_div = readl(&clk->div_top0);
Thanks.
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
--- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL; - div = readl(&clk->div_top0); - sub_div = readl(&clk->div_top1); + div = readl(&clk->div_top1); + sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__, peripheral);
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);sub_div = readl(&clk->div_top0);
hi,
On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');> wrote:
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');> Cc: Akshay Saraswat <akshay.s@samsung.com javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com');> Cc: Minkyu Kang <mk7.kang@samsung.com javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com');> Cc: Joonyoung Shim <jy0922.shim@samsung.com javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com');>
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__, peripheral);
U-Boot mailing list U-Boot@lists.denx.de javascript:_e(%7B%7D,'cvml','U-Boot@lists.denx.de'); http://lists.denx.de/mailman/listinfo/u-boot
This patch will be merged at next week!
Thanks, Minkyu Kang.
Hi Minkyu,
On 24 March 2015 at 01:45, Minkyu Kang promsoft@gmail.com wrote:
hi,
On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');> wrote:
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr');> Cc: Akshay Saraswat <akshay.s@samsung.com javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com');> Cc: Minkyu Kang <mk7.kang@samsung.com javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com');> Cc: Joonyoung Shim <jy0922.shim@samsung.com javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com');>
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__, peripheral);
U-Boot mailing list U-Boot@lists.denx.de javascript:_e(%7B%7D,'cvml','U-Boot@lists.denx.de'); http://lists.denx.de/mailman/listinfo/u-boot
This patch will be merged at next week!
Great! Also where are we with the peach Pi display series? Can that go in also?
Regards, Simon
Hi,
On Thursday, March 26, 2015, Simon Glass sjg@chromium.org wrote:
Hi Minkyu,
On 24 March 2015 at 01:45, Minkyu Kang <promsoft@gmail.com javascript:;> wrote:
hi,
On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr
<javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr javascript:;');>>
wrote:
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr
<javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr javascript:;
');>>
Cc: Akshay Saraswat <akshay.s@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com javascript:;');>> Cc: Minkyu Kang <mk7.kang@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com javascript:;');>> Cc: Joonyoung Shim <jy0922.shim@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com javascript:;
');>>
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__,peripheral);
U-Boot mailing list U-Boot@lists.denx.de javascript:; <javascript:_e(%7B%7D,'cvml','U-Boot@lists.denx.de javascript:;');> http://lists.denx.de/mailman/listinfo/u-boot
This patch will be merged at next week!
Great! Also where are we with the peach Pi display series? Can that go in also?
sure. I'll check it.
Regards, Simon
On 31/03/15 18:07, Minkyu Kang wrote:
Hi,
On Thursday, March 26, 2015, Simon Glass sjg@chromium.org wrote:
Hi Minkyu,
On 24 March 2015 at 01:45, Minkyu Kang <promsoft@gmail.com javascript:;> wrote:
hi,
On 20 March 2015 at 02:06, Guillaume Gardet <guillaume.gardet@free.fr
<javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr javascript:;');>>
wrote:
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr
<javascript:_e(%7B%7D,'cvml','guillaume.gardet@free.fr javascript:;
');>>
Cc: Akshay Saraswat <akshay.s@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','akshay.s@samsung.com javascript:;');>> Cc: Minkyu Kang <mk7.kang@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','mk7.kang@samsung.com javascript:;');>> Cc: Joonyoung Shim <jy0922.shim@samsung.com javascript:; <javascript:_e(%7B%7D,'cvml','jy0922.shim@samsung.com javascript:;
');>>
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
applied to u-boot-samsung.
Thanks, Minkyu Kang.
On 19 March 2015 at 11:06, Guillaume Gardet guillaume.gardet@free.fr wrote:
Ping.
Guillaume
Le 11/03/2015 10:34, Guillaume GARDET a écrit :
Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow).
Changes in V2: reorder lines as requested by Joonyoung Shim.
Signed-off-by: Guillaume GARDET guillaume.gardet@free.fr Cc: Akshay Saraswat akshay.s@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Cc: Joonyoung Shim jy0922.shim@samsung.com
arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);sub_div = readl(&clk->div_top0); break; default: debug("%s: invalid peripheral %d", __func__, peripheral);
Tested on snow.
Reviewed-by: Simon Glass sjg@chroimum.org Tested-by: Simon Glass sjg@chroimum.org
participants (6)
-
Guillaume GARDET -
Guillaume Gardet
-
Joonyoung Shim -
Minkyu Kang -
Minkyu Kang -
Simon Glass