[U-Boot] [PATCH 0/8] Stop AXP from crashing when enabeling LDO3
Hi list,
When powering up an AXP209, the default value for LDO3 output is enabled. This works fine. However if for whatever reason, LDO3 is disabled, for example by OS during reboot and u-boot enables LDO3 again, the PMIC shutsdown (without setting an interrupt) causing the board to hang. This behavior has been seen from Linux as well, u-boot disables LDO3 as a default value, the kernel enables it per its DTS, the kernel hangs as the PMIC gets shut down.
The root cause is that some boards have to high capacitance on the LDO3 output port causing inrush currents exceeding the maximum of the AXP209.
The fix is to turn on the LDO3 at the lowest possible voltage and then set the final voltage.
If the capacitance is really big (due to a connected device for example) the AXP209 also features VRC, or Voltage Rate Control, which allows the voltage ramp up to be even slower.
This patch series implements the above with a few tiny, cleanups I ran into underway.
The initial discussion with some scope screenshots can be found in the linux-sunxi mailing list [0].
Signed-off-by: Olliver Schinagl oliver@schinagl.nl
[0] https://groups.google.com/forum/m/#!topic/linux-sunxi/EDvEsbHHqQI
Olliver Schinagl (8): sunxi: board: Print error after power initialization fails sunxi: pmic_bus: Decrease boot time by not writing duplicate data power: axp209: Use BIT() macro power: axp209: Define the chip version mask power: axp209: Reduce magic values by adding defines for LDO[234] power: axp209: Add support for voltage rate control on LDO3 power: axp209: Limit inrush current for broken boards arm: sunxi: Enable inrush quirk on Olimex OLinuXino-A20-Lime2
arch/arm/mach-sunxi/pmic_bus.c | 6 ++++ board/sunxi/board.c | 14 ++++---- configs/A20-OLinuXino-Lime2_defconfig | 1 + drivers/power/Kconfig | 42 ++++++++++++++++++++++ drivers/power/axp209.c | 61 ++++++++++++++++++++++++++------ include/axp209.h | 66 ++++++++++++++++++++++++++--------- 6 files changed, 158 insertions(+), 32 deletions(-)
Currently during init, we enable all power, then enable the dram and after that check if there was an error during power-up.
This makes little sense, we should enable power and then check if power was brought up properly initializing other things.
This patch moves the DRAM init after the power failure check.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- board/sunxi/board.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 53656383d5..5467015860 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -540,11 +540,6 @@ void sunxi_board_init(void) power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); #endif #endif - printf("DRAM:"); - ramsize = sunxi_dram_init(); - printf(" %d MiB\n", (int)(ramsize >> 20)); - if (!ramsize) - hang();
/* * Only clock up the CPU to full speed if we are reasonably @@ -553,7 +548,14 @@ void sunxi_board_init(void) if (!power_failed) clock_set_pll1(CONFIG_SYS_CLK_FREQ); else - printf("Failed to set core voltage! Can't set CPU frequency\n"); + printf("Error setting up the power controller.\n \ + CPU frequency not set.\n"); + + printf("DRAM:"); + ramsize = sunxi_dram_init(); + printf(" %d MiB\n", (int)(ramsize >> 20)); + if (!ramsize) + hang(); } #endif
01.03.2017, 20:52, "Olliver Schinagl" oliver@schinagl.nl:
Currently during init, we enable all power, then enable the dram and after that check if there was an error during power-up.
This makes little sense, we should enable power and then check if power was brought up properly initializing other things.
This patch moves the DRAM init after the power failure check.
Seems meaningful... at least some Pine64 wrongly set its DRAM voltage when booting.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl
board/sunxi/board.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 53656383d5..5467015860 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -540,11 +540,6 @@ void sunxi_board_init(void) power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); #endif #endif
- printf("DRAM:");
- ramsize = sunxi_dram_init();
- printf(" %d MiB\n", (int)(ramsize >> 20));
- if (!ramsize)
- hang();
/* * Only clock up the CPU to full speed if we are reasonably @@ -553,7 +548,14 @@ void sunxi_board_init(void) if (!power_failed) clock_set_pll1(CONFIG_SYS_CLK_FREQ); else
- printf("Failed to set core voltage! Can't set CPU frequency\n");
- printf("Error setting up the power controller.\n \
- CPU frequency not set.\n");
- printf("DRAM:");
- ramsize = sunxi_dram_init();
- printf(" %d MiB\n", (int)(ramsize >> 20));
- if (!ramsize)
- hang();
} #endif
-- 2.11.0
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When we set or clear a pmic_bus bit, we do a read-modify-write operation. We waste some time however, by writing back the exact same value that was already set in the chip. Let us thus only configure the chip if the data is different.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- arch/arm/mach-sunxi/pmic_bus.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index 7c57f02792..dc3d328c1b 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -95,6 +95,9 @@ int pmic_bus_setbits(u8 reg, u8 bits) if (ret) return ret;
+ if (val & bits) + return 0; + val |= bits; return pmic_bus_write(reg, val); } @@ -108,6 +111,9 @@ int pmic_bus_clrbits(u8 reg, u8 bits) if (ret) return ret;
+ if (!(val & bits)) + return 0; + val &= ~bits; return pmic_bus_write(reg, val); }
Use the standard BIT() macro to define BITS.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- include/axp209.h | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/include/axp209.h b/include/axp209.h index e1b22e3442..7803300328 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -4,6 +4,8 @@ * SPDX-License-Identifier: GPL-2.0+ */
+#include <linux/bitops.h> + enum axp209_reg { AXP209_POWER_STATUS = 0x00, AXP209_CHIP_VERSION = 0x03, @@ -21,29 +23,29 @@ enum axp209_reg { AXP209_SHUTDOWN = 0x32, };
-#define AXP209_POWER_STATUS_ON_BY_DC (1 << 0) -#define AXP209_POWER_STATUS_VBUS_USABLE (1 << 4) +#define AXP209_POWER_STATUS_ON_BY_DC BIT(0) +#define AXP209_POWER_STATUS_VBUS_USABLE BIT(4)
-#define AXP209_OUTPUT_CTRL_EXTEN (1 << 0) -#define AXP209_OUTPUT_CTRL_DCDC3 (1 << 1) -#define AXP209_OUTPUT_CTRL_LDO2 (1 << 2) -#define AXP209_OUTPUT_CTRL_LDO4 (1 << 3) -#define AXP209_OUTPUT_CTRL_DCDC2 (1 << 4) -#define AXP209_OUTPUT_CTRL_LDO3 (1 << 6) +#define AXP209_OUTPUT_CTRL_EXTEN BIT(0) +#define AXP209_OUTPUT_CTRL_DCDC3 BIT(1) +#define AXP209_OUTPUT_CTRL_LDO2 BIT(2) +#define AXP209_OUTPUT_CTRL_LDO4 BIT(3) +#define AXP209_OUTPUT_CTRL_DCDC2 BIT(4) +#define AXP209_OUTPUT_CTRL_LDO3 BIT(6)
-#define AXP209_IRQ5_PEK_UP (1 << 6) -#define AXP209_IRQ5_PEK_DOWN (1 << 5) +#define AXP209_IRQ5_PEK_UP BIT(6) +#define AXP209_IRQ5_PEK_DOWN BIT(5)
-#define AXP209_POWEROFF (1 << 7) +#define AXP209_POWEROFF BIT(7)
/* For axp_gpio.c */ #define AXP_POWER_STATUS 0x00 -#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) +#define AXP_POWER_STATUS_VBUS_PRESENT BIT(5) #define AXP_GPIO0_CTRL 0x90 #define AXP_GPIO1_CTRL 0x92 #define AXP_GPIO2_CTRL 0x93 -#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ -#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ -#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ +#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ +#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ +#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ #define AXP_GPIO_STATE 0x94 -#define AXP_GPIO_STATE_OFFSET 4 +#define AXP_GPIO_STATE_OFFSET 4
Use a define for the chip version mask on the axp209.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- drivers/power/axp209.c | 5 +---- include/axp209.h | 2 ++ 2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index 731b75e50a..d496f675a1 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -154,10 +154,7 @@ int axp_init(void) if (rc) return rc;
- /* Low 4 bits is chip version */ - ver &= 0x0f; - - if (ver != 0x1) + if ((ver & AXP209_CHIP_VERSION_MASK) != 0x1) return -1;
/* Mask all interrupts */ diff --git a/include/axp209.h b/include/axp209.h index 7803300328..51d2e88dd2 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -26,6 +26,8 @@ enum axp209_reg { #define AXP209_POWER_STATUS_ON_BY_DC BIT(0) #define AXP209_POWER_STATUS_VBUS_USABLE BIT(4)
+#define AXP209_CHIP_VERSION_MASK 0x0f + #define AXP209_OUTPUT_CTRL_EXTEN BIT(0) #define AXP209_OUTPUT_CTRL_DCDC3 BIT(1) #define AXP209_OUTPUT_CTRL_LDO2 BIT(2)
Hi Olliver,
On 03/01/2017 09:52 PM, Olliver Schinagl wrote:
Use a define for the chip version mask on the axp209.
I missed this patch...Could you resend the patch with other patches? (on latest u-boot version.)
There is conflict.
Best Regards, Jaehoon Chung
Signed-off-by: Olliver Schinagl oliver@schinagl.nl
drivers/power/axp209.c | 5 +---- include/axp209.h | 2 ++ 2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index 731b75e50a..d496f675a1 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -154,10 +154,7 @@ int axp_init(void) if (rc) return rc;
- /* Low 4 bits is chip version */
- ver &= 0x0f;
- if (ver != 0x1)
if ((ver & AXP209_CHIP_VERSION_MASK) != 0x1) return -1;
/* Mask all interrupts */
diff --git a/include/axp209.h b/include/axp209.h index 7803300328..51d2e88dd2 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -26,6 +26,8 @@ enum axp209_reg { #define AXP209_POWER_STATUS_ON_BY_DC BIT(0) #define AXP209_POWER_STATUS_VBUS_USABLE BIT(4)
+#define AXP209_CHIP_VERSION_MASK 0x0f
#define AXP209_OUTPUT_CTRL_EXTEN BIT(0) #define AXP209_OUTPUT_CTRL_DCDC3 BIT(1) #define AXP209_OUTPUT_CTRL_LDO2 BIT(2)
The AXP209 has a few 'magisc-ish' values that are better served with clear defines.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- drivers/power/axp209.c | 10 ++++------ include/axp209.h | 14 ++++++++++++++ 2 files changed, 18 insertions(+), 6 deletions(-)
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index d496f675a1..a5d38cdf76 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -82,8 +82,7 @@ int axp_set_aldo2(unsigned int mvolt) if (rc) return rc;
- /* LDO2 configuration is in upper 4 bits */ - reg = (reg & 0x0f) | (cfg << 4); + reg |= AXP209_LDO24_LDO2_SET(reg, cfg); rc = pmic_bus_write(AXP209_LDO24_VOLTAGE, reg); if (rc) return rc; @@ -101,9 +100,9 @@ int axp_set_aldo3(unsigned int mvolt) AXP209_OUTPUT_CTRL_LDO3);
if (mvolt == -1) - cfg = 0x80; /* determined by LDO3IN pin */ + cfg = AXP209_LDO3_VOLTAGE_FROM_LDO3IN; else - cfg = axp209_mvolt_to_cfg(mvolt, 700, 3500, 25); + cfg = AXP209_LDO3_VOLTAGE_SET(axp209_mvolt_to_cfg(mvolt, 700, 3500, 25));
rc = pmic_bus_write(AXP209_LDO3_VOLTAGE, cfg); if (rc) @@ -132,8 +131,7 @@ int axp_set_aldo4(unsigned int mvolt) if (rc) return rc;
- /* LDO4 configuration is in lower 4 bits */ - reg = (reg & 0xf0) | (cfg << 0); + reg |= AXP209_LDO24_LDO4_SET(reg, cfg); rc = pmic_bus_write(AXP209_LDO24_VOLTAGE, reg); if (rc) return rc; diff --git a/include/axp209.h b/include/axp209.h index 51d2e88dd2..e4210eca00 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -35,6 +35,20 @@ enum axp209_reg { #define AXP209_OUTPUT_CTRL_DCDC2 BIT(4) #define AXP209_OUTPUT_CTRL_LDO3 BIT(6)
+#define AXP209_LDO24_LDO2_MASK 0xf0 +#define AXP209_LDO24_LDO4_MASK 0x0f +#define AXP209_LDO24_LDO2_SET(reg, cfg) \ + (((reg) & ~AXP209_LDO24_LDO2_MASK) | \ + (((cfg) << 4) & AXP209_LDO24_LDO2_MASK)) +#define AXP209_LDO24_LDO4_SET(reg, cfg) \ + (((reg) & ~AXP209_LDO24_LDO4_MASK) | \ + (((cfg) << 0) & AXP209_LDO24_LDO4_MASK)) + + +#define AXP209_LDO3_VOLTAGE_FROM_LDO3IN BIT(7) +#define AXP209_LDO3_VOLTAGE_MASK 0x7f +#define AXP209_LDO3_VOLTAGE_SET(x) ((x) & AXP209_LDO3_VOLTAGE_MASK) + #define AXP209_IRQ5_PEK_UP BIT(6) #define AXP209_IRQ5_PEK_DOWN BIT(5)
The AXP209 has voltage rate control, or can set a slew rate, for LDO3. This allows for the power to gradually rise to the desired voltage, instead of spiking up quickly. Reason to have this can be to reduce the inrush currents for example.
There are 3 slopes to choose from, the default, 'none' is a voltage rise of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- drivers/power/Kconfig | 33 +++++++++++++++++++++++++++++++++ drivers/power/axp209.c | 24 ++++++++++++++++++++++++ include/axp209.h | 16 ++++++++++++++++ 3 files changed, 73 insertions(+)
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index f2c5629be2..3f10f84a89 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -188,6 +188,39 @@ config AXP_ALDO3_VOLT On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be 3.0V.
+choice + prompt "axp pmic (a)ldo3 voltage rate control" + depends on AXP209_POWER && (AXP_ALDO3_VOLT != 0) + default AXP_ALDO3_VOLT_SLOPE_NONE + ---help--- + The AXP can slowly ramp up voltage to reduce the inrush current when + changing voltages. + Note, this does not apply when enabeling/disableing LDO3. See + "axp pmic (a)ldo3 inrush quirk" below to enable a slew rate to limit + inrush current on broken board designs. + +config AXP_ALDO3_VOLT_SLOPE_NONE + bool "No voltage slope" + ---help--- + Tries to reach the next voltage setting near instantaneous. Measurements + indicate that this is about 0.0167 V/uS. + +config AXP_ALDO3_VOLT_SLOPE_16 + bool "1.6 mV per uS" + ---help--- + Increases the voltage by 1.6 mV per uS until the final voltage has + been reached. Note that the scaling is in 25 mV steps however and thus + the slew rate is 25 mV/31.250 uS in reality. + +config AXP_ALDO3_VOLT_SLOPE_08 + bool "0.8 mV per uS" + ---help--- + Increases the voltage by 0.8 mV per uS until the final voltage has + been reached. Note that the scaling is in 25 mV steps however and thus + the slew rate is 25 mV/15.625 uS in reality. This is the slowest rate. + +endchoice + config AXP_ALDO4_VOLT int "axp pmic (a)ldo4 voltage" depends on AXP209_POWER diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index a5d38cdf76..8f9269cb40 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -10,6 +10,16 @@ #include <asm/arch/pmic_bus.h> #include <axp_pmic.h>
+#ifdef CONFIG_AXP_ALDO3_VOLT_SLOPE_08 +# define AXP209_VRC_SLOPE AXP209_VRC_LDO3_800uV_uS +#endif +#ifdef CONFIG_AXP_ALDO3_VOLT_SLOPE_16 +# define AXP209_VRC_SLOPE AXP209_VRC_LDO3_1600uV_uS +#endif +#if defined CONFIG_AXP_ALDO3_VOLT_SLOPE_NONE || !defined AXP209_VRC_SLOPE +# define AXP209_VRC_SLOPE 0x00 +#endif + static u8 axp209_mvolt_to_cfg(int mvolt, int min, int max, int div) { if (mvolt < min) @@ -99,6 +109,20 @@ int axp_set_aldo3(unsigned int mvolt) return pmic_bus_clrbits(AXP209_OUTPUT_CTRL, AXP209_OUTPUT_CTRL_LDO3);
+ /* + * Some boards have trouble reaching the target voltage without causing + * great inrush currents. To prevent this, boards can enable a certain + * slope to ramp up voltage. Note, this only works when changing an + * already active power rail. When toggling power on, the AXP ramps up + * steeply at 0.0167 V/uS. + */ + rc = pmic_bus_read(AXP209_VRC_DCDC2_LDO3, &cfg); + cfg = AXP209_VRC_LDO3_SLOPE_SET(cfg, AXP209_VRC_SLOPE); + rc |= pmic_bus_write(AXP209_VRC_DCDC2_LDO3, cfg); + + if (rc) + return rc; + if (mvolt == -1) cfg = AXP209_LDO3_VOLTAGE_FROM_LDO3IN; else diff --git a/include/axp209.h b/include/axp209.h index e4210eca00..62be93b806 100644 --- a/include/axp209.h +++ b/include/axp209.h @@ -11,6 +11,7 @@ enum axp209_reg { AXP209_CHIP_VERSION = 0x03, AXP209_OUTPUT_CTRL = 0x12, AXP209_DCDC2_VOLTAGE = 0x23, + AXP209_VRC_DCDC2_LDO3 = 0x25, AXP209_DCDC3_VOLTAGE = 0x27, AXP209_LDO24_VOLTAGE = 0x28, AXP209_LDO3_VOLTAGE = 0x29, @@ -35,6 +36,21 @@ enum axp209_reg { #define AXP209_OUTPUT_CTRL_DCDC2 BIT(4) #define AXP209_OUTPUT_CTRL_LDO3 BIT(6)
+#define AXP209_VRC_LDO3_EN BIT(3) +#define AXP209_VRC_DCDC2_EN BIT(2) +#define AXP209_VRC_LDO3_800uV_uS (BIT(1) | AXP209_VRC_LDO3_EN) +#define AXP209_VRC_LDO3_1600uV_uS AXP209_VRC_LDO3_EN +#define AXP209_VRC_DCDC2_800uV_uS (BIT(0) | AXP209_VRC_DCDC2_EN) +#define AXP209_VRC_DCDC2_1600uV_uS AXP209_VRC_DCDC2_EN +#define AXP209_VRC_LDO3_MASK 0xa +#define AXP209_VRC_DCDC2_MASK 0x5 +#define AXP209_VRC_DCDC2_SLOPE_SET(reg, cfg) \ + (((reg) & ~AXP209_VRC_DCDC2_MASK) | \ + ((cfg) & AXP209_VRC_DCDC2_MASK)) +#define AXP209_VRC_LDO3_SLOPE_SET(reg, cfg) \ + (((reg) & ~AXP209_VRC_LDO3_MASK) | \ + ((cfg) & AXP209_VRC_LDO3_MASK)) + #define AXP209_LDO24_LDO2_MASK 0xf0 #define AXP209_LDO24_LDO4_MASK 0x0f #define AXP209_LDO24_LDO2_SET(reg, cfg) \
Hi Oliver,
2017-03-01 13:52 GMT+01:00 Olliver Schinagl oliver@schinagl.nl:
+#define AXP209_VRC_LDO3_EN BIT(3) +#define AXP209_VRC_DCDC2_EN BIT(2) +#define AXP209_VRC_LDO3_800uV_uS (BIT(1) | AXP209_VRC_LDO3_EN) +#define AXP209_VRC_LDO3_1600uV_uS AXP209_VRC_LDO3_EN
Does that mean that the description of the LDO3/DCDC2 VRC control on the linux-sunxi wiki [1] and the PDF datasheet [2] are wrong? They say that VRC for LDO3 is enabled if the bit is 0, disabled when the bit is 1. And that the default value is enabled.
[1] http://linux-sunxi.org/AXP209#REG_25H:_DC-DC2.2FLDO3_dynamic_voltage_scaling... [2] http://dl.linux-sunxi.org/AXP/AXP209_Datasheet_v1.0en.pdf
Cheers,
Marcus
Hey Marcus,
On 01-03-17 16:10, Marcus Weseloh wrote:
Hi Oliver,
2017-03-01 13:52 GMT+01:00 Olliver Schinagl <oliver@schinagl.nl mailto:oliver@schinagl.nl>:
+#define AXP209_VRC_LDO3_EN BIT(3) +#define AXP209_VRC_DCDC2_EN BIT(2) +#define AXP209_VRC_LDO3_800uV_uS (BIT(1) | AXP209_VRC_LDO3_EN) +#define AXP209_VRC_LDO3_1600uV_uS AXP209_VRC_LDO3_ENDoes that mean that the description of the LDO3/DCDC2 VRC control on the linux-sunxi wiki [1] and the PDF datasheet [2] are wrong? They say that VRC for LDO3 is enabled if the bit is 0, disabled when the bit is 1. And that the default value is enabled.
Yes you are correct (and well spotted) that the datasheet is wrong. It took us some time to figure out why it wasn't working :)
I thought I updated the wiki, but I must have done it incorrectly. I will fix it immediatly.
olliver
[1] http://linux-sunxi.org/AXP209#REG_25H:_DC-DC2.2FLDO3_dynamic_voltage_scaling... [2] http://dl.linux-sunxi.org/AXP/AXP209_Datasheet_v1.0en.pdf
Cheers,
Marcus
On Thu, Mar 2, 2017 at 12:02 AM, Olliver Schinagl o.schinagl@ultimaker.com wrote:
Hey Marcus,
On 01-03-17 16:10, Marcus Weseloh wrote:
Hi Oliver,
2017-03-01 13:52 GMT+01:00 Olliver Schinagl <oliver@schinagl.nl mailto:oliver@schinagl.nl>:
+#define AXP209_VRC_LDO3_EN BIT(3) +#define AXP209_VRC_DCDC2_EN BIT(2) +#define AXP209_VRC_LDO3_800uV_uS (BIT(1) | AXP209_VRC_LDO3_EN) +#define AXP209_VRC_LDO3_1600uV_uS AXP209_VRC_LDO3_ENDoes that mean that the description of the LDO3/DCDC2 VRC control on the linux-sunxi wiki [1] and the PDF datasheet [2] are wrong? They say that VRC for LDO3 is enabled if the bit is 0, disabled when the bit is 1. And that the default value is enabled.
Yes you are correct (and well spotted) that the datasheet is wrong. It took us some time to figure out why it wasn't working :)
I thought I updated the wiki, but I must have done it incorrectly. I will fix it immediatly.
Please also leave a note there saying the datasheet is wrong.
Thanks ChenYu
olliver
[1]
http://linux-sunxi.org/AXP209#REG_25H:_DC-DC2.2FLDO3_dynamic_voltage_scaling... [2] http://dl.linux-sunxi.org/AXP/AXP209_Datasheet_v1.0en.pdf
Cheers,
Marcus
Some boards feature a capacitance on LDO3's output that is to large, causing inrush currents which as a result, shut down the AXP209. This has been reported before, without knowing the actual cause.
A fix appeared to be done with commit 0e6e34ac8db ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").
The description there is a bit misleading, the kernel does not hang during AXP209 initialization, the PMIC shuts down, causing voltages to drop and thus the whole system to freeze.
While the AXP209 does have the ability to ramp up the voltage slowly, to reduce these inrush currents, the voltage rate control (VRC) however is not applicable when switching on the LDO3 output. Only when going from an enabled lower voltage setting, to a higher voltage setting is the VRC in effect.
To work around this problem, we set LDO3 to the lowest possible setting of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do its thing. It should be noted, that for some undocumented reason, there is a short delay needed between setting the LDO3 voltage register and enabling the power. One would expect that this delay ought to be just after enabling the output power at 0.7 V, but this did not work.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- drivers/power/Kconfig | 9 +++++++++ drivers/power/axp209.c | 22 ++++++++++++++++++++++ 2 files changed, 31 insertions(+)
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 3f10f84a89..644f206b4d 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -221,6 +221,15 @@ config AXP_ALDO3_VOLT_SLOPE_08
endchoice
+config AXP_ALDO3_INRUSH_QUIRK + bool "axp pmic (a)ldo3 inrush quirk" + depends on AXP209_POWER + default n + ---help--- + The reference design denotes a value of 4.7 uF for the output capacitor + of LDO3. Some boards have to higher capacitance than that which causes + an inrush current and causes an AXP209 shutdown. + config AXP_ALDO4_VOLT int "axp pmic (a)ldo4 voltage" depends on AXP209_POWER diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index 8f9269cb40..2121b88e0c 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -123,6 +123,28 @@ int axp_set_aldo3(unsigned int mvolt) if (rc) return rc;
+ /* + * On some boards, LDO3 has a to big capacitor installed. When + * turning on LDO3, this causes the AXP209 to shutdown on + * voltages over 1.9 volt. As a work around, we enable LDO3 + * first with the lowest possible voltage. If this still causes + * high inrush currents, the voltage slope should be increased. + */ +#ifdef CONFIG_AXP_ALDO3_INRUSH_QUIRK + rc = pmic_bus_read(AXP209_OUTPUT_CTRL, &cfg); + if (rc) + return rc; + + if (!(cfg & AXP209_OUTPUT_CTRL_LDO3)) { + rc = pmic_bus_write(AXP209_LDO3_VOLTAGE, 0x0); /* 0.7 Volt */ + mdelay(1); + rc |= pmic_bus_setbits(AXP209_OUTPUT_CTRL, AXP209_OUTPUT_CTRL_LDO3); + + if (rc) + return rc; + } +#endif + if (mvolt == -1) cfg = AXP209_LDO3_VOLTAGE_FROM_LDO3IN; else
The lime2 features a too large capacitor on the LDO3 output, which causes the PMIC to shutdown when enabling power. To be able to still boot up however, we must gradually enable power on LDO3 for this board.
Signed-off-by: Olliver Schinagl oliver@schinagl.nl --- configs/A20-OLinuXino-Lime2_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 8fd7c64e77..72bb8beb2e 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_DFU_RAM=y CONFIG_RTL8211X_PHY_FORCE_MASTER=y CONFIG_ETH_DESIGNWARE=y +CONFIG_AXP_ALDO3_INRUSH_QUIRK=y CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 CONFIG_USB_EHCI_HCD=y
Hi Oliver,
On Wed, Mar 01, 2017 at 01:52:16PM +0100, Olliver Schinagl wrote:
Hi list,
When powering up an AXP209, the default value for LDO3 output is enabled. This works fine. However if for whatever reason, LDO3 is disabled, for example by OS during reboot and u-boot enables LDO3 again, the PMIC shutsdown (without setting an interrupt) causing the board to hang. This behavior has been seen from Linux as well, u-boot disables LDO3 as a default value, the kernel enables it per its DTS, the kernel hangs as the PMIC gets shut down.
The root cause is that some boards have to high capacitance on the LDO3 output port causing inrush currents exceeding the maximum of the AXP209.
The fix is to turn on the LDO3 at the lowest possible voltage and then set the final voltage.
If the capacitance is really big (due to a connected device for example) the AXP209 also features VRC, or Voltage Rate Control, which allows the voltage ramp up to be even slower.
This patch series implements the above with a few tiny, cleanups I ran into underway.
The initial discussion with some scope screenshots can be found in the linux-sunxi mailing list [0].
If you don't CC the proper maintainers, no one is going to pick the patches.
Maxime
Hey Maxime,
On 01-03-17 14:00, Maxime Ripard wrote:
Hi Oliver,
On Wed, Mar 01, 2017 at 01:52:16PM +0100, Olliver Schinagl wrote:
Hi list,
When powering up an AXP209, the default value for LDO3 output is enabled. This works fine. However if for whatever reason, LDO3 is disabled, for example by OS during reboot and u-boot enables LDO3 again, the PMIC shutsdown (without setting an interrupt) causing the board to hang. This behavior has been seen from Linux as well, u-boot disables LDO3 as a default value, the kernel enables it per its DTS, the kernel hangs as the PMIC gets shut down.
The root cause is that some boards have to high capacitance on the LDO3 output port causing inrush currents exceeding the maximum of the AXP209.
The fix is to turn on the LDO3 at the lowest possible voltage and then set the final voltage.
If the capacitance is really big (due to a connected device for example) the AXP209 also features VRC, or Voltage Rate Control, which allows the voltage ramp up to be even slower.
This patch series implements the above with a few tiny, cleanups I ran into underway.
The initial discussion with some scope screenshots can be found in the linux-sunxi mailing list [0].
If you don't CC the proper maintainers, no one is going to pick the patches.
who did I miss? I did use the get_maintainers script, and added you explicitly.
There is no sunxi custodian anymore, it is orphaned.
Maxime
01.03.2017, 21:45, "Olliver Schinagl" o.schinagl@ultimaker.com:
Hey Maxime,
On 01-03-17 14:00, Maxime Ripard wrote:
Hi Oliver,
On Wed, Mar 01, 2017 at 01:52:16PM +0100, Olliver Schinagl wrote:
Hi list,
When powering up an AXP209, the default value for LDO3 output is enabled. This works fine. However if for whatever reason, LDO3 is disabled, for example by OS during reboot and u-boot enables LDO3 again, the PMIC shutsdown (without setting an interrupt) causing the board to hang. This behavior has been seen from Linux as well, u-boot disables LDO3 as a default value, the kernel enables it per its DTS, the kernel hangs as the PMIC gets shut down.
The root cause is that some boards have to high capacitance on the LDO3 output port causing inrush currents exceeding the maximum of the AXP209.
The fix is to turn on the LDO3 at the lowest possible voltage and then set the final voltage.
If the capacitance is really big (due to a connected device for example) the AXP209 also features VRC, or Voltage Rate Control, which allows the voltage ramp up to be even slower.
This patch series implements the above with a few tiny, cleanups I ran into underway.
The initial discussion with some scope screenshots can be found in the linux-sunxi mailing list [0].
If you don't CC the proper maintainers, no one is going to pick the patches.
who did I miss? I did use the get_maintainers script, and added you explicitly.
There is no sunxi custodian anymore, it is orphaned.
Currently maintainers are Maxime Ripard and Jegan Teki.
Maxime
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Hey Maxime, Jagan,
On 01-03-17 14:00, Maxime Ripard wrote:
Hi Oliver,
On Wed, Mar 01, 2017 at 01:52:16PM +0100, Olliver Schinagl wrote:
Hi list,
When powering up an AXP209, the default value for LDO3 output is enabled. This works fine. However if for whatever reason, LDO3 is disabled, for example by OS during reboot and u-boot enables LDO3 again, the PMIC shutsdown (without setting an interrupt) causing the board to hang. This behavior has been seen from Linux as well, u-boot disables LDO3 as a default value, the kernel enables it per its DTS, the kernel hangs as the PMIC gets shut down.
The root cause is that some boards have to high capacitance on the LDO3 output port causing inrush currents exceeding the maximum of the AXP209.
The fix is to turn on the LDO3 at the lowest possible voltage and then set the final voltage.
If the capacitance is really big (due to a connected device for example) the AXP209 also features VRC, or Voltage Rate Control, which allows the voltage ramp up to be even slower.
This patch series implements the above with a few tiny, cleanups I ran into underway.
The initial discussion with some scope screenshots can be found in the linux-sunxi mailing list [0].
If you don't CC the proper maintainers, no one is going to pick the patches.
Appologies, I did check the u-boot page, where sunxi is still listed as orphaned and the AXP stuff does not show up with the sunxi maintainers.
@Jagan, do you wish for me to resend the series, or can you see them via the linux-sunxi list?
Olliver
Maxime
Hey Jagan,
FYI,
I used the wrong e-mail address, I think it is still listed in some of the u-boot sources.
Olliver
On 01-03-17 15:06, Olliver Schinagl wrote:
Hey Maxime, Jagan,
On 01-03-17 14:00, Maxime Ripard wrote:
Hi Oliver,
On Wed, Mar 01, 2017 at 01:52:16PM +0100, Olliver Schinagl wrote:
Hi list,
When powering up an AXP209, the default value for LDO3 output is enabled. This works fine. However if for whatever reason, LDO3 is disabled, for example by OS during reboot and u-boot enables LDO3 again, the PMIC shutsdown (without setting an interrupt) causing the board to hang. This behavior has been seen from Linux as well, u-boot disables LDO3 as a default value, the kernel enables it per its DTS, the kernel hangs as the PMIC gets shut down.
The root cause is that some boards have to high capacitance on the LDO3 output port causing inrush currents exceeding the maximum of the AXP209.
The fix is to turn on the LDO3 at the lowest possible voltage and then set the final voltage.
If the capacitance is really big (due to a connected device for example) the AXP209 also features VRC, or Voltage Rate Control, which allows the voltage ramp up to be even slower.
This patch series implements the above with a few tiny, cleanups I ran into underway.
The initial discussion with some scope screenshots can be found in the linux-sunxi mailing list [0].
If you don't CC the proper maintainers, no one is going to pick the patches.
Appologies, I did check the u-boot page, where sunxi is still listed as orphaned and the AXP stuff does not show up with the sunxi maintainers.
@Jagan, do you wish for me to resend the series, or can you see them via the linux-sunxi list?
Olliver
Maxime
participants (7)
-
Chen-Yu Tsai -
Icenowy Zheng -
Jaehoon Chung -
Marcus Weseloh -
Maxime Ripard -
Olliver Schinagl -
Olliver Schinagl