Add support for csb337, an older at91rm9200 board. These boards originally shipped with MicroMonitor, not U-Boot. This config supports boot from Ethernet, and talks over I2C and console.

Open issues: - Console refuses to start at 115200 baud, and misbehaves if it's later changed to that speed. So, use 38400 (like MicroMonitor).

- USB didn't work; the software wouldn't detect usb-storage devices. So it's not yet enabled.

- There seems to be some issue copying lots of data from NOR flash. It works OK in chunks of up to 512 KB or so, but copying a kernel (1.4 MB) failed ... copying *way* over 15 MBytes, and trashing the DRAM image of U-Boot that was running. (Compiler issue?)

Sending this along anyway; it basically works, bugs can be fixed later.

Signed-off-by: David Brownell dbrownell@users.sourceforge.net --- NOTE: depends on cpu/arm920t/at91rm9200/ether.c patch to change how the Ethernet address is stored in chip registers so it matches the old MicroMonitor bug that Linux is working around.

MAKEALL | 1 Makefile | 3 board/csb337/Makefile | 49 +++++++++ board/csb337/config.mk | 1 board/csb337/csb337.c | 74 +++++++++++++++ board/csb337/u-boot.lds | 56 +++++++++++ include/configs/csb337.h | 222 +++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 406 insertions(+)

--- a/MAKEALL +++ b/MAKEALL @@ -579,6 +579,7 @@ LIST_at91=" \ at91sam9g20ek \ at91sam9rlek \ cmc_pu2 \ + csb337 \ csb637 \ kb9202 \ mp2usb \ --- a/Makefile +++ b/Makefile @@ -2638,6 +2638,9 @@ at91rm9200ek_config : unconfig cmc_pu2_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200

+csb337_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm920t csb337 NULL at91rm9200 + csb637_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200

--- /dev/null +++ b/board/csb337/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS += $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + --- /dev/null +++ b/board/csb337/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x21f00000 --- /dev/null +++ b/board/csb337/csb337.c @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2009 David Brownell + * + * Based on csb637 support: + * + * (C) Copyright 2005 + * REA Elektronik GmbH <www.rea.de> + * Anders Larsen alarsen@rea.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/AT91RM9200.h> +#include <at91rm9200_net.h> +#include <lxt971a.h> + +DECLARE_GLOBAL_DATA_PTR; + + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + gd->bd->bi_arch_number = MACH_TYPE_CSB337; + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#if defined(CONFIG_DRIVER_ETHER) && defined(CONFIG_CMD_NET) + +/* The AT91 lxt972 glue modified the original lxt971 code by + * changing names and generalizing a bit. So we use "lxt972" + * names here even though the CSB337 has an lxt971 chip. + */ +extern unsigned char lxt972_InitPhy(AT91S_EMAC *mac); +extern unsigned lxt972_IsPhyConnected(AT91S_EMAC *mac); +extern unsigned char lxt972_GetLinkSpeed(AT91S_EMAC *mac); +extern unsigned char lxt972_AutoNegotiate(AT91S_EMAC *mac, int *status); + +void at91rm9200_GetPhyInterface(AT91S_PhyOps *ops) +{ + ops->Init = lxt972_InitPhy; + ops->IsPhyConnected = lxt972_IsPhyConnected; + ops->GetLinkSpeed = lxt972_GetLinkSpeed; + ops->AutoNegotiate = lxt972_AutoNegotiate; +} + +#endif --- /dev/null +++ b/board/csb337/u-boot.lds @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + cpu/arm920t/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = ALIGN(4); + __bss_start = .; + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } + _end = .; +} --- /dev/null +++ b/include/configs/csb337.h @@ -0,0 +1,222 @@ +/* + * (C) Copyright 2005 REA Elektronik GmbH <www.rea.de> + * Anders Larsen alarsen@rea.de + * + * Configuation settings for the Cogent CSB337 board. + * Modified from CSB637 settings. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> + +/* CSB337 board from Cogent */ +#define CONFIG_MACH_CSB337 +#define CONFIG_AT91RM9200 + +//#define CONFIG_SKIP_LOWLEVEL_INIT + +#define AT91_SLOW_CLOCK 32768 /* slow clock crystal */ +#define AT91_MAIN_CLOCK 3686400 /* 3.6864 MHz crystal */ + +#define CONFIG_SYS_USE_MAIN_OSCILLATOR + +/* default timings shipped by Cogent (PLLA --> MCK): + * 184.32 MHz for CPU (PLLA) + * 46.08 MHz for memory and peripherals (PLL/4) + * 96.00 MHz for USB (PLLB) + */ +#define AT91_PLLA_DIV 1 +#define AT91_PLLA_MULT 50 +#define AT91_PLLA_CLOCK ((AT91_MAIN_CLOCK / AT91_PLLA_DIV) * AT91_PLLA_MULT) + +#define AT91_PLLB_DIV 24 +#define AT91_PLLB_MULT 625 +#define AT91_PLLB_CLOCK ((AT91_MAIN_CLOCK / AT91_PLLB_DIV) * AT91_PLLB_MULT) + +#define AT91C_MASTER_CLOCK (AT91_PLLA_CLOCK / 4) + +#define CONFIG_SYS_HZ 1000 + +/* NOTE: uses TC0, not system timer. */ +#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) + +/* clocks */ +#if 0 /* can't use this from startup.S, sigh */ +#define CONFIG_SYS_PLLAR_VAL \ + ( AT91C_CKGR_SRCA | AT91C_CKGR_OUTA_2 | (0x3e << 8) \ + | ((AT91_PLLA_MULT - 1) << 16) | (AT91_PLLA_DIV << 0)) +#define CONFIG_SYS_PLLBR_VAL \ + ( AT91C_CKGR_USB_PLL | AT91C_CKGR_OUTB_0 | (0x3e << 8) \ + | ((AT91_PLLB_MULT - 1) << 16) | (AT91_PLLB_DIV << 0)) +#define CONFIG_SYS_MCKR_VAL \ + (AT91C_PMC_MDIV_4 | AT91C_PMC_CSS_PLLA_CLK) +#else +#define CONFIG_SYS_PLLAR_VAL 0x20313e01 /* 184.32 MHz */ +#define CONFIG_SYS_PLLBR_VAL 0x12703e18 /* 96.00 MHz (+div2) */ +#define CONFIG_SYS_MCKR_VAL 0x00000302 /* 46.00 MHz */ +#endif + +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 /* NOTE: RESERVED ADDR! */ +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 /* NOTE: RESERVED ADDR! */ +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 /* NOTE: RESERVED ADDR! */ +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 /* NOTE: READ-ONLY REG! */ +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 /* NOTE: READ-ONLY REG! */ + +/* 32 bit bus */ +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS0=SMC, CS1=SDRAM */ +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 /* internal d15..d0 pullups */ +#define CONFIG_SYS_PIOC_ASR_VAL 0Xffff0000 /* pc31..pc16 are d31..d16 */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xffff0000 /* internal d31..d16 pullups */ + +/* CS0 == 16 bit flash */ +#define CONFIG_SYS_SMC_CSR0_VAL 0x1100328b /* 16 bit, 2 TDF, 10 WS */ + +/* CS1 == 32 bit SDRAM; timings are a function of the master clock speed */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188b0d5 /* SDRAM timings */ +#define CONFIG_SYS_SDRC_TR_VAL 0x00000200 /* Write refresh rate */ + +/* except maybe for SDRAM1, none of these are board-specic */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of SDRAM + mode register value */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* scratch value written to SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ + +/* define one of CONFIG_{DBGU,USART0,USART1} for console */ +#define CONFIG_AT91RM9200_USART +#define CONFIG_DBGU + +#define CONFIG_BAUDRATE 38400 +#define CONFIG_SYS_BAUDRATE_TABLE {115200, 57600, 38400, 19200, 9600,} + +/* RAM info */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x20000000 +#define PHYS_SDRAM_SIZE SZ_32M + +/* NOR flash (boot device) */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +/* NOR FLASH - one 28F640J03A, 16 bits */ +#define PHYS_FLASH_SIZE SZ_8M +#define CONFIG_SYS_FLASH_BASE 0x10000000 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware protection */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 64 + +#define NOR_SECTOR_SIZE SZ_128K + +#define CONFIG_MTD_PARTITIONS + +/* Ethernet, using full MII */ +#define CONFIG_DRIVER_ETHER + +#if 0 +/* REVISIT: USB failed to enumerate devices of any kind ... sw issues */ + +/* allow loading from USB media */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91-ohci" +#define CONFIG_USB_STORAGE +#endif + +/* I2C, RTC */ +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0x08 /* SMBus host address */ + +#define CONFIG_RTC_DS1307 + +/* basic commands; and ones that need driver support */ +#include <config_cmd_default.h> + +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_XIMG + +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_PING + +#ifdef CONFIG_USB_OHCI_NEW +#define CONFIG_CMD_USB +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif + +/* general U-Boot configuration */ +#undef CONFIG_USE_IRQ /* no IRQ/FIQ stuff */ + +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "CSB337# " +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_TIMESTAMP + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_NET_RETRY_COUNT 10 + +#define CONFIG_STACKSIZE SZ_64K /* regular stack */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ +#define CONFIG_SYS_MALLOC_LEN SZ_512K /* heap */ +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_16M) +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM + +#define CONFIG_SYS_CBSIZE SZ_1K /* Console I/O Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (2*CONFIG_SYS_CBSIZE) + +/* Linux interfacing */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */ + +/* flash layout: 3 sectors U-Boot, 1 sector env ... rest is configurable */ +#define UBOOT_SIZE (3 * NOR_SECTOR_SIZE) +#define CONFIG_ENV_SECT_SIZE NOR_SECTOR_SIZE + +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + UBOOT_SIZE) + +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0" \ + ":512k(bootloader)ro,-(filesystem)" + +#endif /* __CONFIG_H */