[U-Boot] [PATCH 00/16] sun50i: a64: add support for axp803, musb
This series deals axp803, musb and related improvements on a64 - axp803 PMIC support used by a64 - a64 musb improvements (rework by Philipp [1]) - musb support for bananapi-m64, a64-olinuxino
[1] https://patchwork.ozlabs.org/patch/729246/
Jagan Teki (11): power: sunxi: add AXP803 PMIC support sunxi: adjust usb bases between H3_H5 vs a64 musb-new: sunxi: add common SUNXI_MUSB_BASE sunxi: usb_phy: Update a64 sunxi_usb_phy base arm64: allwinner: sync bananapi-m64 usb nodes from Linux configs: sun50i: add usb-otg support for bananapi-m64 configs: sun50i: enable ums on bananapi-m64 arm64: allwinner: sync a64-olinuxino usb nodes from Linux configs: sun50i: add usb-otg support for a64-olinuxino configs: sun50i: enable ums on a64-olinuxino configs: sun50i: Enable eMMC on a64-olinuxino
Philipp Tomsich (5): sunxi (sun50i): Set CONFIG_SUNXI_USB_PHYS to 2 (the A64 has 2 PHYs) musb-new: sunxi: a64: add support to select shared phy musb-new: sunxi: a64: adds support for clearing the SIDDP usb: sunxi: set up usb_phy_passby only for HCI sunxi: clock: update a64 usb clock gating and module reset bits
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 27 +++ arch/arm/dts/sun50i-a64-olinuxino.dts | 19 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 16 +- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 6 + arch/arm/include/asm/arch-sunxi/usb_phy.h | 2 + arch/arm/mach-sunxi/Makefile | 9 + arch/arm/mach-sunxi/pmic_bus.c | 9 +- arch/arm/mach-sunxi/rsb.c | 2 +- arch/arm/mach-sunxi/usb_phy.c | 24 ++- board/sunxi/board.c | 40 ++++ configs/a64-olinuxino_defconfig | 6 + configs/bananapi_m64_defconfig | 4 + drivers/power/Kconfig | 95 +++++++--- drivers/power/Makefile | 3 + drivers/power/axp803.c | 260 ++++++++++++++++++++++++++ drivers/usb/host/ehci-sunxi.c | 10 + drivers/usb/host/ohci-sunxi.c | 10 + drivers/usb/musb-new/musb_regs.h | 3 +- drivers/usb/musb-new/sunxi.c | 24 ++- include/axp803.h | 68 +++++++ include/axp_pmic.h | 4 + include/configs/sun50i.h | 2 +- 22 files changed, 598 insertions(+), 45 deletions(-) create mode 100644 drivers/power/axp803.c create mode 100644 include/axp803.h
AXP803 another PMIC produced by x-powers and paired with A64 via RSB bus.
unlike other axp chip's support in SPL this is only added for U-Boot proper since SPL on A64 has no space to add anything.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/mach-sunxi/Makefile | 9 ++ arch/arm/mach-sunxi/pmic_bus.c | 9 +- arch/arm/mach-sunxi/rsb.c | 2 +- board/sunxi/board.c | 40 +++++++ drivers/power/Kconfig | 95 ++++++++++----- drivers/power/Makefile | 3 + drivers/power/axp803.c | 260 +++++++++++++++++++++++++++++++++++++++++ include/axp803.h | 68 +++++++++++ include/axp_pmic.h | 4 + 9 files changed, 458 insertions(+), 32 deletions(-) create mode 100644 drivers/power/axp803.c create mode 100644 include/axp803.h
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 2a3c379..aedf22f 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -19,9 +19,15 @@ endif obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I) += prcm.o obj-$(CONFIG_MACH_SUN9I) += prcm.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_MACH_SUN50I) += prcm.o +endif obj-$(CONFIG_MACH_SUN6I) += p2wi.o obj-$(CONFIG_MACH_SUN8I) += rsb.o obj-$(CONFIG_MACH_SUN9I) += rsb.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_MACH_SUN50I) += rsb.o +endif obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o @@ -38,6 +44,9 @@ obj-$(CONFIG_AXP152_POWER) += pmic_bus.o obj-$(CONFIG_AXP209_POWER) += pmic_bus.o obj-$(CONFIG_AXP221_POWER) += pmic_bus.o obj-$(CONFIG_AXP809_POWER) += pmic_bus.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_AXP803_POWER) += pmic_bus.o +endif obj-$(CONFIG_AXP818_POWER) += pmic_bus.o
ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index f917c3e..34acd01 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -36,7 +36,8 @@ int pmic_bus_init(void) if (!needs_init) return 0;
-#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER # ifdef CONFIG_MACH_SUN6I p2wi_init(); ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, @@ -65,7 +66,8 @@ int pmic_bus_read(u8 reg, u8 *data) return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1); #elif defined CONFIG_AXP209_POWER return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER # ifdef CONFIG_MACH_SUN6I return p2wi_read(reg, data); # elif defined CONFIG_MACH_SUN8I_R40 @@ -82,7 +84,8 @@ int pmic_bus_write(u8 reg, u8 data) return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1); #elif defined CONFIG_AXP209_POWER return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1); -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \ + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER # ifdef CONFIG_MACH_SUN6I return p2wi_write(reg, data); # elif defined CONFIG_MACH_SUN8I_R40 diff --git a/arch/arm/mach-sunxi/rsb.c b/arch/arm/mach-sunxi/rsb.c index 6fd11f1..ea52a6f 100644 --- a/arch/arm/mach-sunxi/rsb.c +++ b/arch/arm/mach-sunxi/rsb.c @@ -27,7 +27,7 @@ static void rsb_cfg_io(void) sunxi_gpio_set_pull(SUNXI_GPL(1), 1); sunxi_gpio_set_drv(SUNXI_GPL(0), 2); sunxi_gpio_set_drv(SUNXI_GPL(1), 2); -#elif defined CONFIG_MACH_SUN9I +#elif defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB); sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB); sunxi_gpio_set_pull(SUNXI_GPN(0), 1); diff --git a/board/sunxi/board.c b/board/sunxi/board.c index dcacdf3..158282e 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -173,6 +173,40 @@ void i2c_init_board(void) #endif }
+#ifdef CONFIG_AXP803_POWER +static int axp803_init(void) +{ + int power_failed = 0; + + power_failed = axp_init(); + + power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT); + power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT); + power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT); + power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT); + power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); + power_failed |= axp_set_dcdc6(CONFIG_AXP_DCDC6_VOLT); + + power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT); + power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT); + power_failed |= axp_set_aldo3(CONFIG_AXP_ALDO3_VOLT); + + power_failed |= axp_set_dldo(1, CONFIG_AXP_DLDO1_VOLT); + power_failed |= axp_set_dldo(2, CONFIG_AXP_DLDO2_VOLT); + power_failed |= axp_set_dldo(3, CONFIG_AXP_DLDO3_VOLT); + power_failed |= axp_set_dldo(4, CONFIG_AXP_DLDO4_VOLT); + + power_failed |= axp_set_eldo(1, CONFIG_AXP_ELDO1_VOLT); + power_failed |= axp_set_eldo(2, CONFIG_AXP_ELDO2_VOLT); + power_failed |= axp_set_eldo(3, CONFIG_AXP_ELDO3_VOLT); + + power_failed |= axp_set_fldo(1, CONFIG_AXP_FLDO1_VOLT); + power_failed |= axp_set_fldo(2, CONFIG_AXP_FLDO2_VOLT); + + return power_failed; +} +#endif + /* add board specific code here */ int board_init(void) { @@ -209,6 +243,12 @@ int board_init(void) } #endif /* !CONFIG_ARM64 */
+#ifdef CONFIG_AXP803_POWER + ret = axp803_init(); + if (ret) + return ret; +#endif + ret = axp_gpio_init(); if (ret) return ret; diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index d8c107e..6c1e4ff 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -11,8 +11,9 @@ choice depends on ARCH_SUNXI default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40 + default AXP803_POWER if MACH_SUN50I default AXP818_POWER if MACH_SUN8I_A83T - default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I + default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5
config SUNXI_NO_PMIC bool "board without a pmic" @@ -43,6 +44,13 @@ config AXP221_POWER Select this to enable support for the axp221/axp223 pmic found on most A23 and A31 boards.
+config AXP803_POWER + bool "axp803 pmic support" + depends on MACH_SUN50I + select CMD_POWEROFF + ---help--- + Say y here to enable support for the axp803 pmic found on A64 boards. + config AXP809_POWER bool "axp809 pmic support" depends on MACH_SUN9I @@ -69,8 +77,8 @@ endchoice
config AXP_DCDC1_VOLT int "axp pmic dcdc1 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER - default 3300 if AXP818_POWER || MACH_SUN8I_R40 + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER + default 3300 if AXP818_POWER || MACH_SUN8I_R40 || MACH_SUN50I default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I ---help--- Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to @@ -80,14 +88,15 @@ config AXP_DCDC1_VOLT save battery. On A31 devices dcdc1 is also used for VCC-IO. On A83T dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1 normally powers some of the pingroups, NAND/eMMC, SD/MMC, and USB OTG. + On A64 boards dcdc1 is used for Nand/eMMC/SDMMC/WIFI-IO and should be 3.3V.
config AXP_DCDC2_VOLT int "axp pmic dcdc2 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 900 if AXP818_POWER default 1400 if AXP152_POWER || AXP209_POWER default 1200 if MACH_SUN6I - default 1100 if MACH_SUN8I + default 1100 if MACH_SUN8I || MACH_SUN50I default 0 if MACH_SUN9I ---help--- Set the voltage (mV) to program the axp pmic dcdc2 at, set to 0 to @@ -98,14 +107,15 @@ config AXP_DCDC2_VOLT On A80 boards dcdc2 powers the GPU and can be left off. On A83T boards dcdc2 is used for VDD-CPUA(cluster 0) and should be 0.9V. On R40 boards dcdc2 is VDD-CPU and should be 1.1V + On A64 boards dcdc2 is used for VDD-CPUX and should be 1.1V.
config AXP_DCDC3_VOLT int "axp pmic dcdc3 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 900 if AXP809_POWER || AXP818_POWER default 1500 if AXP152_POWER default 1250 if AXP209_POWER - default 1100 if MACH_SUN8I_R40 + default 1100 if MACH_SUN8I_R40 || MACH_SUN50I default 1200 if MACH_SUN6I || MACH_SUN8I ---help--- Set the voltage (mV) to program the axp pmic dcdc3 at, set to 0 to @@ -117,13 +127,14 @@ config AXP_DCDC3_VOLT On A80 boards dcdc3 is used for VDD-CPUA(cluster 0) and should be 0.9V. On A83T boards dcdc3 is used for VDD-CPUB(cluster 1) and should be 0.9V. On R40 boards dcdc3 is VDD-SYS and VDD-GPU and should be 1.1V. + On A64 boards dcdc2 is used for VDD-CPUX and should be 1.1V.
config AXP_DCDC4_VOLT int "axp pmic dcdc4 voltage" - depends on AXP152_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 1250 if AXP152_POWER default 1200 if MACH_SUN6I - default 0 if MACH_SUN8I + default 0 if MACH_SUN8I || MACH_SUN50I default 900 if MACH_SUN9I ---help--- Set the voltage (mV) to program the axp pmic dcdc4 at, set to 0 to @@ -133,21 +144,31 @@ config AXP_DCDC4_VOLT On A23 / A33 boards dcdc4 is unused and should be disabled. On A80 boards dcdc4 powers VDD-SYS, HDMI, USB OTG and should be 0.9V. On A83T boards dcdc4 is used for VDD-GPU. + On A64 boards dcdc4 is unused and should be disabled.
config AXP_DCDC5_VOLT int "axp pmic dcdc5 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER - default 1500 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER + default 1500 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I || MACH_SUN50I ---help--- Set the voltage (mV) to program the axp pmic dcdc5 at, set to 0 to disable dcdc5. - On A23 / A31 / A33 / A80 / A83T / R40 boards dcdc5 is VCC-DRAM and + On A23 / A31 / A33 / A80 / A83T / R40 / A64 boards dcdc5 is VCC-DRAM and should be 1.5V, 1.35V if DDR3L is used.
+config AXP_DCDC6_VOLT + int "axp pmic dcdc6 voltage" + depends on AXP803_POWER + default 1100 if MACH_SUN50I + ---help--- + Set the voltage (mV) to program the axp pmic dcdc6 at, set to 0 to + disable dcdc6. + On A64 boards dcdc6 is VDD-SYS and should be 1.1V. + config AXP_ALDO1_VOLT int "axp pmic (a)ldo1 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER - default 0 if MACH_SUN6I || MACH_SUN8I_R40 + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER + default 0 if MACH_SUN6I || MACH_SUN8I_R40 || MACH_SUN50I default 1800 if MACH_SUN8I_A83T default 3000 if MACH_SUN8I || MACH_SUN9I ---help--- @@ -158,13 +179,14 @@ config AXP_ALDO1_VOLT On A80 boards aldo1 powers the USB hosts and should be 3.0V. On A83T / H8 boards aldo1 is used for MIPI CSI, DSI, HDMI, EFUSE, and should be 1.8V. + On A64 boards aldo1 is unused and should be disabled.
config AXP_ALDO2_VOLT int "axp pmic (a)ldo2 voltage" - depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP152_POWER || AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 3000 if AXP152_POWER || AXP209_POWER default 0 if MACH_SUN6I || MACH_SUN9I - default 1800 if MACH_SUN8I_A83T + default 1800 if MACH_SUN8I_A83T || MACH_SUN50I default 2500 if MACH_SUN8I ---help--- Set the voltage (mV) to program the axp pmic aldo2 at, set to 0 to @@ -176,12 +198,13 @@ config AXP_ALDO2_VOLT On A80 boards aldo2 powers PB pingroup and camera IO and can be left off. On A83T / H8 boards aldo2 powers VDD-DLL, VCC18-PLL, CPVDD, VDD18-ADC, LPDDR2, and the codec. It should be 1.8V. + On A64 boards aldo2 may be used for VCC-PL then it should be 1.8V.
config AXP_ALDO3_VOLT int "axp pmic (a)ldo3 voltage" - depends on AXP209_POWER || AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP209_POWER || AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 0 if AXP209_POWER || MACH_SUN9I - default 3000 if MACH_SUN6I || MACH_SUN8I + default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN50I ---help--- Set the voltage (mV) to program the axp pmic aldo3 at, set to 0 to disable aldo3. @@ -189,7 +212,7 @@ config AXP_ALDO3_VOLT On A23 / A31 / A33 / R40 boards aldo3 is VCC-PLL and AVCC and should be 3.0V. On A80 boards aldo3 is normally not used. - On A83T / H8 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be + On A83T / H8 / A64 boards aldo3 is AVCC, VCC-PL, and VCC-LED, and should be 3.0V.
config AXP_ALDO4_VOLT @@ -203,59 +226,71 @@ config AXP_ALDO4_VOLT
config AXP_DLDO1_VOLT int "axp pmic dldo1 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER + default 3300 if MACH_SUN50I default 0 ---help--- Set the voltage (mV) to program the axp pmic dldo1 at, set to 0 to disable dldo1. On sun6i (A31) boards with ethernet dldo1 is often used to power the ethernet phy. On A23, A33 and A80 boards this is often used to power the wifi. + On A64 boards dldo1 powers the HDMI, DSI, SENSOR pins and should be 3.3V.
config AXP_DLDO2_VOLT int "axp pmic dldo2 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 3000 if MACH_SUN9I + default 3300 if MACH_SUN50I default 0 ---help--- Set the voltage (mV) to program the axp pmic dldo2 at, set to 0 to disable dldo2. On A80 boards dldo2 normally powers the PL pins and should be 3.0V. + On A64 boards dldo2 normally powers the MIPI pins and should be 3.3V.
config AXP_DLDO3_VOLT int "axp pmic dldo3 voltage" - depends on AXP221_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP818_POWER + default 2800 if MACH_SUN50I default 0 ---help--- Set the voltage (mV) to program the axp pmic dldo3 at, set to 0 to disable dldo3. + On A64 boards dldo3 normally powers the AVDD-CSI pins and should be 2.8V.
config AXP_DLDO4_VOLT int "axp pmic dldo4 voltage" - depends on AXP221_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP818_POWER + default 3300 if MACH_SUN50I default 0 ---help--- Set the voltage (mV) to program the axp pmic dldo4 at, set to 0 to disable dldo4. + On A64 boards dldo4 normally powers the WIFI-IO pins and should be 3.3V.
config AXP_ELDO1_VOLT int "axp pmic eldo1 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER + default 1800 if MACH_SUN50I default 0 ---help--- Set the voltage (mV) to program the axp pmic eldo1 at, set to 0 to disable eldo1. + On A64 boards eldo1 normally powers the CPVDD pins and should be 1.8V.
config AXP_ELDO2_VOLT int "axp pmic eldo2 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER + default 1800 if MACH_SUN50I default 0 ---help--- Set the voltage (mV) to program the axp pmic eldo2 at, set to 0 to disable eldo2. + On A64 boards eldo2 normally powers the VCC-DVDD-CSI pins and should be 1.8V.
config AXP_ELDO3_VOLT int "axp pmic eldo3 voltage" - depends on AXP221_POWER || AXP809_POWER || AXP818_POWER + depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER default 3000 if MACH_SUN9I default 0 ---help--- @@ -267,22 +302,26 @@ config AXP_ELDO3_VOLT
config AXP_FLDO1_VOLT int "axp pmic fldo1 voltage" - depends on AXP818_POWER + depends on AXP803_POWER || AXP818_POWER default 0 if MACH_SUN8I_A83T + default 1200 if MACH_SUN50I ---help--- Set the voltage (mV) to program the axp pmic fldo1 at, set to 0 to disable fldo1. On A83T / H8 boards fldo1 is VCC-HSIC and should be 1.2V if HSIC is used. + On A64 boards fldo1 normally powers the HSCI pins and should be 1.2V.
config AXP_FLDO2_VOLT int "axp pmic fldo2 voltage" - depends on AXP818_POWER + depends on AXP803_POWER || AXP818_POWER default 900 if MACH_SUN8I_A83T + default 1100 if MACH_SUN50I ---help--- Set the voltage (mV) to program the axp pmic fldo2 at, set to 0 to disable fldo2. On A83T / H8 boards fldo2 is VCC-CPUS and should be 0.9V. + On A64 boards fldo1 normally powers the VDD-CPUS pins and should be 1.1V.
config AXP_FLDO3_VOLT int "axp pmic fldo3 voltage" diff --git a/drivers/power/Makefile b/drivers/power/Makefile index 90a3b00..20cabaa 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -9,6 +9,9 @@ obj-$(CONFIG_AXP152_POWER) += axp152.o obj-$(CONFIG_AXP209_POWER) += axp209.o obj-$(CONFIG_AXP221_POWER) += axp221.o obj-$(CONFIG_AXP809_POWER) += axp809.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_AXP803_POWER) += axp803.o +endif obj-$(CONFIG_AXP818_POWER) += axp818.o obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o diff --git a/drivers/power/axp803.c b/drivers/power/axp803.c new file mode 100644 index 0000000..0f43917 --- /dev/null +++ b/drivers/power/axp803.c @@ -0,0 +1,260 @@ +/* + * AXP803 driver based on AXP809 driver + * (C) Copyright 2017 Jagan Teki jagan@amarulasolutions.com + * + * Based on axp809.c + * (C) Copyright 2016 Chen-Yu Tsai wens@csie.org + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <asm/arch/gpio.h> +#include <asm/arch/pmic_bus.h> +#include <axp_pmic.h> + +static u8 axp803_mvolt_to_cfg(int mvolt, int min, int max, int div) +{ + if (mvolt < min) + mvolt = min; + else if (mvolt > max) + mvolt = max; + + return (mvolt - min) / div; +} + +int axp_set_dcdc1(unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 1600, 3400, 100); + + if (mvolt >= 1200) + cfg = 0x47 + axp803_mvolt_to_cfg(mvolt, 1220, 1300, 20); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC1_EN); + + ret = pmic_bus_write(AXP803_DCDC1_CTRL, cfg); + if (ret) + return ret; + + ret = pmic_bus_setbits(AXP803_OUTPUT_CTRL2, + AXP803_OUTPUT_CTRL2_DC1SW_EN); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC1_EN); +} + +int axp_set_dcdc2(unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 500, 1200, 10); + + if (mvolt >= 1200) + cfg = 0x47 + axp803_mvolt_to_cfg(mvolt, 1220, 1300, 20); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC2_EN); + + ret = pmic_bus_write(AXP803_DCDC2_CTRL, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC2_EN); +} + +int axp_set_dcdc3(unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 500, 1200, 10); + + if (mvolt >= 1200) + cfg = 0x47 + axp803_mvolt_to_cfg(mvolt, 1220, 1300, 20); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC3_EN); + + ret = pmic_bus_write(AXP803_DCDC3_CTRL, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC3_EN); +} + +int axp_set_dcdc4(unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 500, 1200, 10); + + if (mvolt >= 1200) + cfg = 0x47 + axp803_mvolt_to_cfg(mvolt, 1220, 1300, 20); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC4_EN); + + ret = pmic_bus_write(AXP803_DCDC5_CTRL, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC4_EN); +} + +int axp_set_dcdc5(unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 800, 1220, 10); + + if (mvolt >= 1220) + cfg = 0x21 + axp803_mvolt_to_cfg(mvolt, 1140, 1840, 20); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC5_EN); + + ret = pmic_bus_write(AXP803_DCDC5_CTRL, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC5_EN); +} + +int axp_set_dcdc6(unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 600, 1100, 10); + + if (mvolt >= 1100) + cfg = 0x33 + axp803_mvolt_to_cfg(mvolt, 1120, 1520, 20); + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC6_EN); + + ret = pmic_bus_write(AXP803_DCDC6_CTRL, cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL1, + AXP803_OUTPUT_CTRL1_DCDC6_EN); +} + +int axp_set_aldo(int aldo_num, unsigned int mvolt) +{ + int ret; + u8 cfg; + + if (aldo_num < 1 || aldo_num > 3) + return -EINVAL; + + if (mvolt == 0 && aldo_num == 3) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL3, + AXP803_OUTPUT_CTRL3_ALDO3_EN); + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL3, + AXP803_OUTPUT_CTRL3_ALDO1_EN << (aldo_num - 1)); + + cfg = axp803_mvolt_to_cfg(mvolt, 700, 3300, 100); + ret = pmic_bus_write(AXP803_ALDO1_CTRL + (aldo_num - 1), cfg); + if (ret) + return ret; + + if (aldo_num == 3) + return pmic_bus_setbits(AXP803_OUTPUT_CTRL3, + AXP803_OUTPUT_CTRL3_ALDO3_EN); + return pmic_bus_setbits(AXP803_OUTPUT_CTRL3, + AXP803_OUTPUT_CTRL3_ALDO1_EN << (aldo_num - 1)); +} + +/* TODO: re-work other AXP drivers to consolidate ALDO functions. */ +int axp_set_aldo1(unsigned int mvolt) +{ + return axp_set_aldo(1, mvolt); +} + +int axp_set_aldo2(unsigned int mvolt) +{ + return axp_set_aldo(2, mvolt); +} + +int axp_set_aldo3(unsigned int mvolt) +{ + return axp_set_aldo(3, mvolt); +} + +int axp_set_dldo(int dldo_num, unsigned int mvolt) +{ + u8 cfg = axp803_mvolt_to_cfg(mvolt, 700, 3300, 100); + int ret; + + if (dldo_num < 1 || dldo_num > 4) + return -EINVAL; + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL2, + AXP803_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); + + if (dldo_num == 2 && mvolt > 3300) + cfg += 1 + axp803_mvolt_to_cfg(mvolt, 3400, 4200, 200); + ret = pmic_bus_write(AXP803_DLDO1_CTRL + (dldo_num - 1), cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL2, + AXP803_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); +} + +int axp_set_eldo(int eldo_num, unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 700, 1900, 50); + + if (eldo_num < 1 || eldo_num > 3) + return -EINVAL; + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL2, + AXP803_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); + + ret = pmic_bus_write(AXP803_ELDO1_CTRL + (eldo_num - 1), cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL2, + AXP803_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); +} + +int axp_set_fldo(int fldo_num, unsigned int mvolt) +{ + int ret; + u8 cfg = axp803_mvolt_to_cfg(mvolt, 700, 1450, 50); + + if (fldo_num < 1 || fldo_num > 2) + return -EINVAL; + + if (mvolt == 0) + return pmic_bus_clrbits(AXP803_OUTPUT_CTRL3, + AXP803_OUTPUT_CTRL3_FLDO1_EN << (fldo_num - 1)); + + ret = pmic_bus_write(AXP803_FLDO1_CTRL + (fldo_num - 1), cfg); + if (ret) + return ret; + + return pmic_bus_setbits(AXP803_OUTPUT_CTRL3, + AXP803_OUTPUT_CTRL3_FLDO1_EN << (fldo_num - 1)); +} + +int axp_init(void) +{ + return pmic_bus_init(); +} diff --git a/include/axp803.h b/include/axp803.h new file mode 100644 index 0000000..c69e207 --- /dev/null +++ b/include/axp803.h @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2017 Jagan Teki jagan@amarulasolutions.com + * + * X-Powers AXP803 Power Management IC driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#define AXP809_CHIP_ID 0x03 + +#define AXP803_OUTPUT_CTRL1 0x10 +#define AXP803_OUTPUT_CTRL1_DCDC1_EN (1 << 0) +#define AXP803_OUTPUT_CTRL1_DCDC2_EN (1 << 1) +#define AXP803_OUTPUT_CTRL1_DCDC3_EN (1 << 2) +#define AXP803_OUTPUT_CTRL1_DCDC4_EN (1 << 3) +#define AXP803_OUTPUT_CTRL1_DCDC5_EN (1 << 4) +#define AXP803_OUTPUT_CTRL1_DCDC6_EN (1 << 5) +#define AXP803_OUTPUT_CTRL2 0x12 +#define AXP803_OUTPUT_CTRL2_ELDO1_EN (1 << 0) +#define AXP803_OUTPUT_CTRL2_ELDO2_EN (1 << 1) +#define AXP803_OUTPUT_CTRL2_ELDO3_EN (1 << 2) +#define AXP803_OUTPUT_CTRL2_DLDO1_EN (1 << 3) +#define AXP803_OUTPUT_CTRL2_DLDO2_EN (1 << 4) +#define AXP803_OUTPUT_CTRL2_DLDO3_EN (1 << 5) +#define AXP803_OUTPUT_CTRL2_DLDO4_EN (1 << 6) +#define AXP803_OUTPUT_CTRL2_DC1SW_EN (1 << 7) +#define AXP803_OUTPUT_CTRL3 0x13 +#define AXP803_OUTPUT_CTRL3_FLDO1_EN (1 << 2) +#define AXP803_OUTPUT_CTRL3_FLDO2_EN (1 << 3) +#define AXP803_OUTPUT_CTRL3_ALDO1_EN (1 << 5) +#define AXP803_OUTPUT_CTRL3_ALDO2_EN (1 << 6) +#define AXP803_OUTPUT_CTRL3_ALDO3_EN (1 << 7) + +#define AXP803_DLDO1_CTRL 0x15 +#define AXP803_DLDO2_CTRL 0x16 +#define AXP803_DLDO3_CTRL 0x17 +#define AXP803_DLDO4_CTRL 0x18 +#define AXP803_ELDO1_CTRL 0x19 +#define AXP803_ELDO2_CTRL 0x1a +#define AXP803_ELDO3_CTRL 0x1b +#define AXP803_FLDO1_CTRL 0x1c +#define AXP803_FLDO2_CTRL 0x1d +#define AXP803_DCDC1_CTRL 0x20 +#define AXP803_DCDC2_CTRL 0x21 +#define AXP803_DCDC3_CTRL 0x22 +#define AXP803_DCDC4_CTRL 0x23 +#define AXP803_DCDC5_CTRL 0x24 +#define AXP803_DCDC6_CTRL 0x25 +#define AXP803_ALDO1_CTRL 0x28 +#define AXP803_ALDO2_CTRL 0x29 +#define AXP803_ALDO3_CTRL 0x2a +#define AXP803_SHUTDOWN 0x32 +#define AXP803_SHUTDOWN_POWEROFF (1 << 7) + +/* For axp_gpio.c */ +#define AXP_POWER_STATUS 0x00 +#define AXP_POWER_STATUS_VBUS_PRESENT (1 << 5) +#define AXP_VBUS_IPSOUT 0x30 +#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2) +#define AXP_MISC_CTRL 0x8f +#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) +#define AXP_GPIO0_CTRL 0x90 +#define AXP_GPIO1_CTRL 0x92 +#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */ +#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */ +#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */ +#define AXP_GPIO_STATE 0x94 +#define AXP_GPIO_STATE_OFFSET 0 diff --git a/include/axp_pmic.h b/include/axp_pmic.h index d789ad8..7c17de9 100644 --- a/include/axp_pmic.h +++ b/include/axp_pmic.h @@ -16,6 +16,9 @@ #ifdef CONFIG_AXP221_POWER #include <axp221.h> #endif +#ifdef CONFIG_AXP803_POWER +#include <axp803.h> +#endif #ifdef CONFIG_AXP809_POWER #include <axp809.h> #endif @@ -28,6 +31,7 @@ int axp_set_dcdc2(unsigned int mvolt); int axp_set_dcdc3(unsigned int mvolt); int axp_set_dcdc4(unsigned int mvolt); int axp_set_dcdc5(unsigned int mvolt); +int axp_set_dcdc6(unsigned int mvolt); int axp_set_aldo1(unsigned int mvolt); int axp_set_aldo2(unsigned int mvolt); int axp_set_aldo3(unsigned int mvolt);
Hi,
On Tue, Dec 12, 2017 at 12:28:16PM +0530, Jagan Teki wrote:
AXP803 another PMIC produced by x-powers and paired with A64 via RSB bus.
unlike other axp chip's support in SPL this is only added for U-Boot proper since SPL on A64 has no space to add anything.
How do you setup the CPU and DRAM regulators then?
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/mach-sunxi/Makefile | 9 ++ arch/arm/mach-sunxi/pmic_bus.c | 9 +- arch/arm/mach-sunxi/rsb.c | 2 +- board/sunxi/board.c | 40 +++++++ drivers/power/Kconfig | 95 ++++++++++----- drivers/power/Makefile | 3 + drivers/power/axp803.c | 260 +++++++++++++++++++++++++++++++++++++++++ include/axp803.h | 68 +++++++++++ include/axp_pmic.h | 4 + 9 files changed, 458 insertions(+), 32 deletions(-) create mode 100644 drivers/power/axp803.c create mode 100644 include/axp803.h
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 2a3c379..aedf22f 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -19,9 +19,15 @@ endif obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I) += prcm.o obj-$(CONFIG_MACH_SUN9I) += prcm.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_MACH_SUN50I) += prcm.o +endif
The number of lines here is starting to be a bit ridiculous, please make a Kconfig option selected by the SoC families.
obj-$(CONFIG_MACH_SUN6I) += p2wi.o obj-$(CONFIG_MACH_SUN8I) += rsb.o obj-$(CONFIG_MACH_SUN9I) += rsb.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_MACH_SUN50I) += rsb.o +endif
Ditto.
obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o @@ -38,6 +44,9 @@ obj-$(CONFIG_AXP152_POWER) += pmic_bus.o obj-$(CONFIG_AXP209_POWER) += pmic_bus.o obj-$(CONFIG_AXP221_POWER) += pmic_bus.o obj-$(CONFIG_AXP809_POWER) += pmic_bus.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_AXP803_POWER) += pmic_bus.o +endif
Ditto.
obj-$(CONFIG_AXP818_POWER) += pmic_bus.o
ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c index f917c3e..34acd01 100644 --- a/arch/arm/mach-sunxi/pmic_bus.c +++ b/arch/arm/mach-sunxi/pmic_bus.c @@ -36,7 +36,8 @@ int pmic_bus_init(void) if (!needs_init) return 0;
-#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \
- defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
Ditto.
# ifdef CONFIG_MACH_SUN6I p2wi_init(); ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, @@ -65,7 +66,8 @@ int pmic_bus_read(u8 reg, u8 *data) return i2c_read(AXP152_I2C_ADDR, reg, 1, data, 1); #elif defined CONFIG_AXP209_POWER return i2c_read(AXP209_I2C_ADDR, reg, 1, data, 1); -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \
- defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
# ifdef CONFIG_MACH_SUN6I return p2wi_read(reg, data); # elif defined CONFIG_MACH_SUN8I_R40 @@ -82,7 +84,8 @@ int pmic_bus_write(u8 reg, u8 data) return i2c_write(AXP152_I2C_ADDR, reg, 1, &data, 1); #elif defined CONFIG_AXP209_POWER return i2c_write(AXP209_I2C_ADDR, reg, 1, &data, 1); -#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER +#elif defined CONFIG_AXP221_POWER || defined CONFIG_AXP803_POWER || \
- defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER
# ifdef CONFIG_MACH_SUN6I return p2wi_write(reg, data); # elif defined CONFIG_MACH_SUN8I_R40 diff --git a/arch/arm/mach-sunxi/rsb.c b/arch/arm/mach-sunxi/rsb.c index 6fd11f1..ea52a6f 100644 --- a/arch/arm/mach-sunxi/rsb.c +++ b/arch/arm/mach-sunxi/rsb.c @@ -27,7 +27,7 @@ static void rsb_cfg_io(void) sunxi_gpio_set_pull(SUNXI_GPL(1), 1); sunxi_gpio_set_drv(SUNXI_GPL(0), 2); sunxi_gpio_set_drv(SUNXI_GPL(1), 2); -#elif defined CONFIG_MACH_SUN9I +#elif defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I sunxi_gpio_set_cfgpin(SUNXI_GPN(0), SUN9I_GPN_R_RSB); sunxi_gpio_set_cfgpin(SUNXI_GPN(1), SUN9I_GPN_R_RSB); sunxi_gpio_set_pull(SUNXI_GPN(0), 1); diff --git a/board/sunxi/board.c b/board/sunxi/board.c index dcacdf3..158282e 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -173,6 +173,40 @@ void i2c_init_board(void) #endif }
+#ifdef CONFIG_AXP803_POWER +static int axp803_init(void) +{
- int power_failed = 0;
- power_failed = axp_init();
- power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT);
- power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT);
- power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT);
- power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT);
- power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT);
- power_failed |= axp_set_dcdc6(CONFIG_AXP_DCDC6_VOLT);
- power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT);
- power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT);
- power_failed |= axp_set_aldo3(CONFIG_AXP_ALDO3_VOLT);
- power_failed |= axp_set_dldo(1, CONFIG_AXP_DLDO1_VOLT);
- power_failed |= axp_set_dldo(2, CONFIG_AXP_DLDO2_VOLT);
- power_failed |= axp_set_dldo(3, CONFIG_AXP_DLDO3_VOLT);
- power_failed |= axp_set_dldo(4, CONFIG_AXP_DLDO4_VOLT);
- power_failed |= axp_set_eldo(1, CONFIG_AXP_ELDO1_VOLT);
- power_failed |= axp_set_eldo(2, CONFIG_AXP_ELDO2_VOLT);
- power_failed |= axp_set_eldo(3, CONFIG_AXP_ELDO3_VOLT);
- power_failed |= axp_set_fldo(1, CONFIG_AXP_FLDO1_VOLT);
- power_failed |= axp_set_fldo(2, CONFIG_AXP_FLDO2_VOLT);
- return power_failed;
+} +#endif
/* add board specific code here */ int board_init(void) { @@ -209,6 +243,12 @@ int board_init(void) } #endif /* !CONFIG_ARM64 */
+#ifdef CONFIG_AXP803_POWER
- ret = axp803_init();
- if (ret)
return ret;+#endif
- ret = axp_gpio_init(); if (ret) return ret;
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index d8c107e..6c1e4ff 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -11,8 +11,9 @@ choice depends on ARCH_SUNXI default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40
- default AXP803_POWER if MACH_SUN50I default AXP818_POWER if MACH_SUN8I_A83T
- default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I
- default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5
config SUNXI_NO_PMIC bool "board without a pmic" @@ -43,6 +44,13 @@ config AXP221_POWER Select this to enable support for the axp221/axp223 pmic found on most A23 and A31 boards.
+config AXP803_POWER
- bool "axp803 pmic support"
- depends on MACH_SUN50I
- select CMD_POWEROFF
- ---help---
- Say y here to enable support for the axp803 pmic found on A64 boards.
config AXP809_POWER bool "axp809 pmic support" depends on MACH_SUN9I @@ -69,8 +77,8 @@ endchoice
config AXP_DCDC1_VOLT int "axp pmic dcdc1 voltage"
- depends on AXP221_POWER || AXP809_POWER || AXP818_POWER
- default 3300 if AXP818_POWER || MACH_SUN8I_R40
- depends on AXP221_POWER || AXP803_POWER || AXP809_POWER || AXP818_POWER
- default 3300 if AXP818_POWER || MACH_SUN8I_R40 || MACH_SUN50I default 3000 if MACH_SUN6I || MACH_SUN8I || MACH_SUN9I ---help--- Set the voltage (mV) to program the axp pmic dcdc1 at, set to 0 to
@@ -80,14 +88,15 @@ config AXP_DCDC1_VOLT save battery. On A31 devices dcdc1 is also used for VCC-IO. On A83T dcdc1 is used for VCC-IO, nand, usb0, sd , etc. On A80 dcdc1 normally powers some of the pingroups, NAND/eMMC, SD/MMC, and USB OTG.
- On A64 boards dcdc1 is used for Nand/eMMC/SDMMC/WIFI-IO and should be 3.3V.
These help messages are getting a bit ridiculous as well, since it's essentially something that is board specific, and not SoC specific.
Please drop them.
Thanks! Maxime
On Tue, Dec 12, 2017 at 1:28 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
Hi,
On Tue, Dec 12, 2017 at 12:28:16PM +0530, Jagan Teki wrote:
AXP803 another PMIC produced by x-powers and paired with A64 via RSB bus.
unlike other axp chip's support in SPL this is only added for U-Boot proper since SPL on A64 has no space to add anything.
How do you setup the CPU and DRAM regulators then?
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/mach-sunxi/Makefile | 9 ++ arch/arm/mach-sunxi/pmic_bus.c | 9 +- arch/arm/mach-sunxi/rsb.c | 2 +- board/sunxi/board.c | 40 +++++++ drivers/power/Kconfig | 95 ++++++++++----- drivers/power/Makefile | 3 + drivers/power/axp803.c | 260 +++++++++++++++++++++++++++++++++++++++++ include/axp803.h | 68 +++++++++++ include/axp_pmic.h | 4 + 9 files changed, 458 insertions(+), 32 deletions(-) create mode 100644 drivers/power/axp803.c create mode 100644 include/axp803.h
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 2a3c379..aedf22f 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -19,9 +19,15 @@ endif obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I) += prcm.o obj-$(CONFIG_MACH_SUN9I) += prcm.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_MACH_SUN50I) += prcm.o +endif
The number of lines here is starting to be a bit ridiculous, please make a Kconfig option selected by the SoC families.
as of now there was no Kconfig option for prcm, we shouldn't build this for SPL because of size limitation.
On Tue, Dec 12, 2017 at 02:20:17PM +0530, Jagan Teki wrote:
On Tue, Dec 12, 2017 at 1:28 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
Hi,
On Tue, Dec 12, 2017 at 12:28:16PM +0530, Jagan Teki wrote:
AXP803 another PMIC produced by x-powers and paired with A64 via RSB bus.
unlike other axp chip's support in SPL this is only added for U-Boot proper since SPL on A64 has no space to add anything.
How do you setup the CPU and DRAM regulators then?
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/mach-sunxi/Makefile | 9 ++ arch/arm/mach-sunxi/pmic_bus.c | 9 +- arch/arm/mach-sunxi/rsb.c | 2 +- board/sunxi/board.c | 40 +++++++ drivers/power/Kconfig | 95 ++++++++++----- drivers/power/Makefile | 3 + drivers/power/axp803.c | 260 +++++++++++++++++++++++++++++++++++++++++ include/axp803.h | 68 +++++++++++ include/axp_pmic.h | 4 + 9 files changed, 458 insertions(+), 32 deletions(-) create mode 100644 drivers/power/axp803.c create mode 100644 include/axp803.h
diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 2a3c379..aedf22f 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -19,9 +19,15 @@ endif obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I) += prcm.o obj-$(CONFIG_MACH_SUN9I) += prcm.o +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_MACH_SUN50I) += prcm.o +endif
The number of lines here is starting to be a bit ridiculous, please make a Kconfig option selected by the SoC families.
as of now there was no Kconfig option for prcm,
This is my point, you should add it :)
Maxime
On Tue, Dec 12, 2017 at 1:28 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
Hi,
On Tue, Dec 12, 2017 at 12:28:16PM +0530, Jagan Teki wrote:
AXP803 another PMIC produced by x-powers and paired with A64 via RSB bus.
unlike other axp chip's support in SPL this is only added for U-Boot proper since SPL on A64 has no space to add anything.
How do you setup the CPU and DRAM regulators then?
If we need axp for these, then it should be part of SPL and SPL can't fit with this code. as of now PMIC is configured in ATF, I guess that will take care of CPU, DRAM.
Once we have a TPL(only option I have seen as of now) or similar setup that will avoid SPL size limitation, may be we can move this axp803 into SPL.
thanks!
From: Philipp Tomsich philipp.tomsich@theobroma-systems.com
The sun50i platform (e.g. the A64/sun50iw1p1) integrates 2 USB PHYs which are connected as follows: PHY#0 is shared between the OTG controller (MUSB) [at 01C19000] and the USB-OTG-HCI [at 01C1A000] PHY#1 is dedicated to USB-HCI0 [at 01C1B000] and can be bypassed when connecting HCI0 to the HSIC interface
Note that all USB PHYs are controlled from within the OTG address space at 01C19000.
X-AffectedPlatforms: A64-uQ7 Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [jagan: rebased, fixed 80 line warning] Signed-off-by: Jagan Teki jagan@amarulasolutions.com Acked-by: Maxime Ripard maxime.ripard@free-electrons.com --- drivers/usb/musb-new/musb_regs.h | 3 ++- include/configs/sun50i.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/musb-new/musb_regs.h b/drivers/usb/musb-new/musb_regs.h index a3cc38e..89b5dbc 100644 --- a/drivers/usb/musb-new/musb_regs.h +++ b/drivers/usb/musb-new/musb_regs.h @@ -432,7 +432,8 @@ static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
static inline u8 musb_read_configdata(void __iomem *mbase) { -#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T +#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T \ + || defined CONFIG_MACH_SUN50I /* <Sigh> allwinner saves a reg, and we need to hardcode this */ return 0xde; #else diff --git a/include/configs/sun50i.h b/include/configs/sun50i.h index b7b67a1..9f3a8a6 100644 --- a/include/configs/sun50i.h +++ b/include/configs/sun50i.h @@ -16,7 +16,7 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif
-#define CONFIG_SUNXI_USB_PHYS 1 +#define CONFIG_SUNXI_USB_PHYS 2
#define GICD_BASE 0x1c81000 #define GICC_BASE 0x1c82000
A64 doesn't have USB2 and USB3 so defined them only for H3_H5
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 2419062..98728f9 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -66,8 +66,10 @@ #define SUNXI_USBPHY_BASE 0x01c19000 #define SUNXI_USB0_BASE 0x01c1a000 #define SUNXI_USB1_BASE 0x01c1b000 +# if defined(CONFIG_MACH_SUNXI_H3_H5) #define SUNXI_USB2_BASE 0x01c1c000 #define SUNXI_USB3_BASE 0x01c1d000 +# endif #else #define SUNXI_USB0_BASE 0x01c19000 #define SUNXI_USB1_BASE 0x01c1a000
MUSB sunxi driver base not always USB0_BASE, on a64 USB0_BASE is USB-OTG-EHCI/OHCI base so add SUNXI_MUSB_BASE and adjust the proper msub base for all sunxi families.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++++ drivers/usb/musb-new/sunxi.c | 4 ++-- 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 98728f9..2035489 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -47,6 +47,7 @@ #define SUNXI_MMC3_BASE 0x01c12000 #ifdef CONFIG_SUNXI_GEN_SUN4I #define SUNXI_USB0_BASE 0x01c13000 +#define SUNXI_MUSB_BASE SUNXI_USB0_BASE #define SUNXI_USB1_BASE 0x01c14000 #endif #define SUNXI_SS_BASE 0x01c15000 @@ -64,14 +65,17 @@ #ifdef CONFIG_SUNXI_GEN_SUN6I #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) #define SUNXI_USBPHY_BASE 0x01c19000 +#define SUNXI_MUSB_BASE SUNXI_USBPHY_BASE #define SUNXI_USB0_BASE 0x01c1a000 #define SUNXI_USB1_BASE 0x01c1b000 # if defined(CONFIG_MACH_SUNXI_H3_H5) +#define SUNXI_MUSB_BASE SUNXI_USB0_BASE #define SUNXI_USB2_BASE 0x01c1c000 #define SUNXI_USB3_BASE 0x01c1d000 # endif #else #define SUNXI_USB0_BASE 0x01c19000 +#define SUNXI_MUSB_BASE SUNXI_USB0_BASE #define SUNXI_USB1_BASE 0x01c1a000 #define SUNXI_USB2_BASE 0x01c1b000 #endif diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 7ee44ea..2e22497 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -318,7 +318,7 @@ static int musb_usb_probe(struct udevice *dev)
#ifdef CONFIG_USB_MUSB_HOST host->host = musb_init_controller(&musb_plat, NULL, - (void *)SUNXI_USB0_BASE); + (void *)SUNXI_MUSB_BASE); if (!host->host) return -EIO;
@@ -326,7 +326,7 @@ static int musb_usb_probe(struct udevice *dev) if (!ret) printf("Allwinner mUSB OTG (Host)\n"); #else - ret = musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE); + ret = musb_register(&musb_plat, NULL, (void *)SUNXI_MUSB_BASE); if (!ret) printf("Allwinner mUSB OTG (Peripheral)\n"); #endif
On Tue, Dec 12, 2017 at 2:58 PM, Jagan Teki jagan@amarulasolutions.com wrote:
MUSB sunxi driver base not always USB0_BASE, on a64 USB0_BASE is USB-OTG-EHCI/OHCI base so add SUNXI_MUSB_BASE and adjust the proper msub base for all sunxi families.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 4 ++++ drivers/usb/musb-new/sunxi.c | 4 ++-- 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h index 98728f9..2035489 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h @@ -47,6 +47,7 @@ #define SUNXI_MMC3_BASE 0x01c12000 #ifdef CONFIG_SUNXI_GEN_SUN4I #define SUNXI_USB0_BASE 0x01c13000 +#define SUNXI_MUSB_BASE SUNXI_USB0_BASE #define SUNXI_USB1_BASE 0x01c14000 #endif #define SUNXI_SS_BASE 0x01c15000 @@ -64,14 +65,17 @@ #ifdef CONFIG_SUNXI_GEN_SUN6I #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) #define SUNXI_USBPHY_BASE 0x01c19000 +#define SUNXI_MUSB_BASE SUNXI_USBPHY_BASE #define SUNXI_USB0_BASE 0x01c1a000 #define SUNXI_USB1_BASE 0x01c1b000 # if defined(CONFIG_MACH_SUNXI_H3_H5) +#define SUNXI_MUSB_BASE SUNXI_USB0_BASE #define SUNXI_USB2_BASE 0x01c1c000 #define SUNXI_USB3_BASE 0x01c1d000 # endif #else #define SUNXI_USB0_BASE 0x01c19000 +#define SUNXI_MUSB_BASE SUNXI_USB0_BASE #define SUNXI_USB1_BASE 0x01c1a000 #define SUNXI_USB2_BASE 0x01c1b000 #endif diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 7ee44ea..2e22497 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -318,7 +318,7 @@ static int musb_usb_probe(struct udevice *dev)
#ifdef CONFIG_USB_MUSB_HOST host->host = musb_init_controller(&musb_plat, NULL,
(void *)SUNXI_USB0_BASE);
(void *)SUNXI_MUSB_BASE);
This driver is fully DM enabled. See the patch getting the base address from the device tree I just sent.
ChenYu
if (!host->host) return -EIO;@@ -326,7 +326,7 @@ static int musb_usb_probe(struct udevice *dev) if (!ret) printf("Allwinner mUSB OTG (Host)\n"); #else
ret = musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
ret = musb_register(&musb_plat, NULL, (void *)SUNXI_MUSB_BASE); if (!ret) printf("Allwinner mUSB OTG (Peripheral)\n");#endif
2.7.4
From: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Allwinner a64 has a shared PHY for MUSB and USB-OTG-HCI, so add function to select the PHY route.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [jagan: reworked for remove func support] Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- drivers/usb/musb-new/sunxi.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 2e22497..45ddf20 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -45,6 +45,9 @@ #define USBC_REG_o_PHYCTL 0x0404 #define USBC_REG_o_PHYBIST 0x0408 #define USBC_REG_o_PHYTUNE 0x040c +#if defined(CONFIG_MACH_SUN50I) +#define SUNXI_OTG_PHY_CFG 0x0420 +#endif
#define USBC_REG_o_VEND0 0x0043
@@ -162,6 +165,16 @@ static void USBC_ConfigFIFO_Base(void) writel(reg_value, SUNXI_SRAMC_BASE + 0x04); }
+#if defined(CONFIG_MACH_SUN50I) +static void USBC_SelectPhyToDevice(__iomem void *base, bool routePHYtoOTG) +{ + /* The OTG and HCI0 controllers share a single PHY in the A64. + * Select either 'to OTG' (1) or 'to HCI' (0). + */ + clrsetbits_le32(base + SUNXI_OTG_PHY_CFG, 1, routePHYtoOTG ? 1 : 0); +} +#endif + /****************************************************************************** * Needed for the DFU polling magic ******************************************************************************/ @@ -267,6 +280,9 @@ static int sunxi_musb_init(struct musb *musb) setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); #endif sunxi_usb_phy_init(0); +#if defined(CONFIG_MACH_SUN50I) + USBC_SelectPhyToDevice(musb->mregs, true); +#endif
USBC_ConfigFIFO_Base(); USBC_EnableDpDmPullUp(musb->mregs); @@ -342,6 +358,9 @@ static int musb_usb_remove(struct udevice *dev) musb_stop(host->host);
sunxi_usb_phy_exit(0); +#if defined(CONFIG_MACH_SUN50I) + USBC_SelectPhyToDevice(host->host->mregs, false); +#endif #ifdef CONFIG_SUNXI_GEN_SUN6I clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); #endif
From: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Allwinner a64 needs to clear the SIDDP bit from PHYCTL register once the phy_init done.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [jagan: reworked to fix multi-line comments] Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/usb_phy.h | 1 + arch/arm/mach-sunxi/usb_phy.c | 11 +++++++++++ drivers/usb/host/ehci-sunxi.c | 8 ++++++++ drivers/usb/host/ohci-sunxi.c | 8 ++++++++ drivers/usb/musb-new/sunxi.c | 1 + 5 files changed, 29 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h index 5a9cacb..f97d415 100644 --- a/arch/arm/include/asm/arch-sunxi/usb_phy.h +++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h @@ -19,3 +19,4 @@ void sunxi_usb_phy_power_off(int index); int sunxi_usb_phy_vbus_detect(int index); int sunxi_usb_phy_id_detect(int index); void sunxi_usb_phy_enable_squelch_detect(int index, int enable); +void sunxi_usb_phy_clear_SIDDP(void *base); diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 2f1cad1..1bfee40 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -190,6 +190,17 @@ static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) } #endif
+#if defined(CONFIG_MACH_SUN50I) +void sunxi_usb_phy_clear_SIDDP(void *base) +{ + /* We pretend that this is always at the same offset (0x410), + * even though it is 0x410 for MUSB/OTG and OHCI, but 0x810 + * for EHCI. The EHCI call site will have to adjust this... + */ + clrbits_le32(base + SUNXI_USB_CSR, (1 << 1)); +} +#endif + static void sunxi_usb_phy_passby(struct sunxi_usb_phy *phy, int enable) { unsigned long bits = 0; diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 6ecb7c4..c3432aa 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -61,6 +61,14 @@ static int ehci_usb_probe(struct udevice *dev) #endif
sunxi_usb_phy_init(priv->phy_index); +#if defined(CONFIG_MACH_SUN50I) + /* + * For the HCI blocks, the PHYCTL register is at 0x810, so + * it's an extra 0x400 for the EHCI block. This should go + * away once the PHYs use the driver model. + */ + sunxi_usb_phy_clear_SIDDP((void *)hccr + 0x400); +#endif sunxi_usb_phy_power_on(priv->phy_index);
hcor = (struct ehci_hcor *)((uintptr_t)hccr + diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c index 133774f..e9eeb56 100644 --- a/drivers/usb/host/ohci-sunxi.c +++ b/drivers/usb/host/ohci-sunxi.c @@ -66,6 +66,14 @@ static int ohci_usb_probe(struct udevice *dev) #endif
sunxi_usb_phy_init(priv->phy_index); +#if defined(CONFIG_MACH_SUN50I) + /* + * For the HCI blocks, the PHYCTL register is at 0x810, so it's + * an extra 0x400 for the EHCI block. This should go away once + * the PHYs use the driver model. + */ + sunxi_usb_phy_clear_SIDDP(regs); +#endif sunxi_usb_phy_power_on(priv->phy_index);
return ohci_register(dev, regs); diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 45ddf20..0d87582 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -281,6 +281,7 @@ static int sunxi_musb_init(struct musb *musb) #endif sunxi_usb_phy_init(0); #if defined(CONFIG_MACH_SUN50I) + sunxi_usb_phy_clear_SIDDP(musb->mregs); USBC_SelectPhyToDevice(musb->mregs, true); #endif
From: Philipp Tomsich philipp.tomsich@theobroma-systems.com
sunxi_usb_phy_passby will deal PHY's other than 0 and it not require to use it for MUSB so use directly for HCI.
Also update the function proto type for with index and bool enable for better usability.
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [jagan: reowrked on entire patch] Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/usb_phy.h | 1 + arch/arm/mach-sunxi/usb_phy.c | 9 ++------- drivers/usb/host/ehci-sunxi.c | 2 ++ drivers/usb/host/ohci-sunxi.c | 2 ++ 4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h index f97d415..83ada78 100644 --- a/arch/arm/include/asm/arch-sunxi/usb_phy.h +++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h @@ -20,3 +20,4 @@ int sunxi_usb_phy_vbus_detect(int index); int sunxi_usb_phy_id_detect(int index); void sunxi_usb_phy_enable_squelch_detect(int index, int enable); void sunxi_usb_phy_clear_SIDDP(void *base); +void sunxi_usb_phy_passby(int index, bool enable); diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 1bfee40..4bc47a1 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -201,8 +201,9 @@ void sunxi_usb_phy_clear_SIDDP(void *base) } #endif
-static void sunxi_usb_phy_passby(struct sunxi_usb_phy *phy, int enable) +void sunxi_usb_phy_passby(int index, bool enable) { + struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; unsigned long bits = 0; void *addr;
@@ -250,9 +251,6 @@ void sunxi_usb_phy_init(int index)
sunxi_usb_phy_config(phy);
- if (phy->id != 0) - sunxi_usb_phy_passby(phy, SUNXI_USB_PASSBY_EN); - #ifdef CONFIG_MACH_SUN8I_A83T if (phy->id == 0) { setbits_le32(SUNXI_USB0_BASE + SUNXI_USB_CSR, @@ -272,9 +270,6 @@ void sunxi_usb_phy_exit(int index) if (phy->init_count != 0) return;
- if (phy->id != 0) - sunxi_usb_phy_passby(phy, !SUNXI_USB_PASSBY_EN); - #ifdef CONFIG_MACH_SUN8I_A83T if (phy->id == 0) { setbits_le32(SUNXI_USB0_BASE + SUNXI_USB_CSR, diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index c3432aa..4eef739 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -69,6 +69,7 @@ static int ehci_usb_probe(struct udevice *dev) */ sunxi_usb_phy_clear_SIDDP((void *)hccr + 0x400); #endif + sunxi_usb_phy_passby(priv->phy_index, true); sunxi_usb_phy_power_on(priv->phy_index);
hcor = (struct ehci_hcor *)((uintptr_t)hccr + @@ -87,6 +88,7 @@ static int ehci_usb_remove(struct udevice *dev) if (ret) return ret;
+ sunxi_usb_phy_passby(priv->phy_index, false); sunxi_usb_phy_exit(priv->phy_index);
#ifdef CONFIG_SUNXI_GEN_SUN6I diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c index e9eeb56..cb052d4 100644 --- a/drivers/usb/host/ohci-sunxi.c +++ b/drivers/usb/host/ohci-sunxi.c @@ -74,6 +74,7 @@ static int ohci_usb_probe(struct udevice *dev) */ sunxi_usb_phy_clear_SIDDP(regs); #endif + sunxi_usb_phy_passby(priv->phy_index, true); sunxi_usb_phy_power_on(priv->phy_index);
return ohci_register(dev, regs); @@ -89,6 +90,7 @@ static int ohci_usb_remove(struct udevice *dev) if (ret) return ret;
+ sunxi_usb_phy_passby(priv->phy_index, false); sunxi_usb_phy_exit(priv->phy_index);
#ifdef CONFIG_SUNXI_GEN_SUN6I
From: Philipp Tomsich philipp.tomsich@theobroma-systems.com
clock gating and module reset bits on a64 are different than H3_H5 and other allwinner family SOCs, add them on clock_sun6i.h
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [jagan: reowrked on entire patch] Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d328df9..7cb9235 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -280,12 +280,24 @@ struct sunxi_ccm_reg { #define AHB_GATE_OFFSET_USB_EHCI2 27 #define AHB_GATE_OFFSET_USB_EHCI1 26 #define AHB_GATE_OFFSET_USB_EHCI0 25 +#elif defined(CONFIG_MACH_SUN50I) +#define AHB_GATE_OFFSET_USB_OHCI0 29 +#define AHB_GATE_OFFSET_USBOTG_OHCI 28 +#define AHB_GATE_OFFSET_USB_EHCI0 25 +#define AHB_GATE_OFFSET_USBOTG_EHCI 24 +#define AHB_GATE_OFFSET_USBOTG 23 #else #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 #endif -#ifndef CONFIG_MACH_SUN8I_R40 -#define AHB_GATE_OFFSET_USB0 24 +#ifdef CONFIG_MACH_SUN50I +/* + * The musb-new/sunxi.c glue uses AHB_GATE_OFFSET_USB0 + * for the MUSB OTG block, so we define it to what it expects. + */ +# define AHB_GATE_OFFSET_USB0 AHB_GATE_OFFSET_USBOTG +#elif !defined(CONFIG_MACH_SUN8I_R40) +# define AHB_GATE_OFFSET_USB0 24 #else #define AHB_GATE_OFFSET_USB0 25 #define AHB_GATE_OFFSET_SATA 24
Hi,
On Tue, Dec 12, 2017 at 12:28:23PM +0530, Jagan Teki wrote:
From: Philipp Tomsich philipp.tomsich@theobroma-systems.com
clock gating and module reset bits on a64 are different than H3_H5 and other allwinner family SOCs, add them on clock_sun6i.h
Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com [jagan: reowrked on entire patch] Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d328df9..7cb9235 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -280,12 +280,24 @@ struct sunxi_ccm_reg { #define AHB_GATE_OFFSET_USB_EHCI2 27 #define AHB_GATE_OFFSET_USB_EHCI1 26 #define AHB_GATE_OFFSET_USB_EHCI0 25 +#elif defined(CONFIG_MACH_SUN50I) +#define AHB_GATE_OFFSET_USB_OHCI0 29 +#define AHB_GATE_OFFSET_USBOTG_OHCI 28 +#define AHB_GATE_OFFSET_USB_EHCI0 25 +#define AHB_GATE_OFFSET_USBOTG_EHCI 24 +#define AHB_GATE_OFFSET_USBOTG 23 #else #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 #endif -#ifndef CONFIG_MACH_SUN8I_R40 -#define AHB_GATE_OFFSET_USB0 24 +#ifdef CONFIG_MACH_SUN50I +/*
- The musb-new/sunxi.c glue uses AHB_GATE_OFFSET_USB0
- for the MUSB OTG block, so we define it to what it expects.
- */
+# define AHB_GATE_OFFSET_USB0 AHB_GATE_OFFSET_USBOTG
USB0 *is* USB OTG, why don't you just call it that way?
+#elif !defined(CONFIG_MACH_SUN8I_R40) +# define AHB_GATE_OFFSET_USB0 24
Why is this modified?
Thanks, Maxime
a64 has shared PHY#0(for OTG and USB-OTG-HCI) which start at 0x01C19000 which different than other allwinner SOC, so update the same for sunxi_usb_phy[0] base.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/mach-sunxi/usb_phy.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 4bc47a1..cc66446 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -63,7 +63,11 @@ static struct sunxi_usb_phy { { .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK, .id = 0, +#ifdef CONFIG_MACH_SUN50I + .base = SUNXI_USBPHY_BASE, +#else .base = SUNXI_USB0_BASE, +#endif }, { .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,
Sync USB-OTG and USB-OTG-HCI nodes from Linux.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/sun50i-a64-bananapi-m64.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index 02db114..1b02e09 100644 --- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts +++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -68,6 +68,15 @@ }; };
+&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; @@ -108,6 +117,14 @@ status = "okay"; };
+&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; @@ -119,3 +136,13 @@ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ + status = "okay"; +};
Hi,
On Tue, Dec 12, 2017 at 12:28:25PM +0530, Jagan Teki wrote:
Sync USB-OTG and USB-OTG-HCI nodes from Linux.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index 02db114..1b02e09 100644 --- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts +++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -68,6 +68,15 @@ }; };
+&ehci0 {
- status = "okay";
+};
+&ehci1 {
- status = "okay";
+};
You have multiple blank lines here.
Maxime
USB-OTG require MUSB driver along with PHY#0 id(PH9) and/or vbus pin through AXP_GPIO driver.
This patch add support for it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/bananapi_m64_defconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 461567f..55feafe 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -4,6 +4,8 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_ID_DET="PH9" +CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y @@ -14,4 +16,5 @@ CONFIG_SPL=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
On Tue, Dec 12, 2017 at 12:28:26PM +0530, Jagan Teki wrote:
USB-OTG require MUSB driver along with PHY#0 id(PH9) and/or vbus pin through AXP_GPIO driver.
This patch add support for it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 461567f..55feafe 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -4,6 +4,8 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_ID_DET="PH9" +CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y @@ -14,4 +16,5 @@ CONFIG_SPL=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y
Did you test the host mode as well?
Maxime
On Tue, Dec 12, 2017 at 1:34 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
On Tue, Dec 12, 2017 at 12:28:26PM +0530, Jagan Teki wrote:
USB-OTG require MUSB driver along with PHY#0 id(PH9) and/or vbus pin through AXP_GPIO driver.
This patch add support for it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 461567f..55feafe 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -4,6 +4,8 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_ID_DET="PH9" +CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y @@ -14,4 +16,5 @@ CONFIG_SPL=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y
Did you test the host mode as well?
No, I've not tried host mode yet.
thanks!
On Tue, Dec 12, 2017 at 02:43:38PM +0530, Jagan Teki wrote:
On Tue, Dec 12, 2017 at 1:34 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
On Tue, Dec 12, 2017 at 12:28:26PM +0530, Jagan Teki wrote:
USB-OTG require MUSB driver along with PHY#0 id(PH9) and/or vbus pin through AXP_GPIO driver.
This patch add support for it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 461567f..55feafe 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -4,6 +4,8 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_ID_DET="PH9" +CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y @@ -14,4 +16,5 @@ CONFIG_SPL=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y
Did you test the host mode as well?
No, I've not tried host mode yet.
Then you didn't test that at least the ID pin and the VBUS control was working :)
Maxime
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set
Hi,
On Tue, Dec 12, 2017 at 12:28:27PM +0530, Jagan Teki wrote:
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y
How does that work with the current over-size issue we have on the A64?
And I'd also like to keep the way we did things for several years now, which is to *not* have board-specific options selected besides the hardware-related ones.
If you want to enable a general feature, do it for all the boards so that our users will have a consistent experience across boards, and we will not have to always chase all the defconfigs to provide it.
And I guess the next question would be: what is the targetted use case and why should we enable it for all the boards? We're having binary size issues on the A64, so we really want to provide something meaningful for the majority of our users.
We won't enable something used by only a small fraction, especially when it's so easy to enable it.
Maxime
On Tue, Dec 12, 2017 at 1:42 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
Hi,
On Tue, Dec 12, 2017 at 12:28:27PM +0530, Jagan Teki wrote:
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y
How does that work with the current over-size issue we have on the A64?
And I'd also like to keep the way we did things for several years now, which is to *not* have board-specific options selected besides the hardware-related ones.
If you want to enable a general feature, do it for all the boards so that our users will have a consistent experience across boards, and we will not have to always chase all the defconfigs to provide it.
I always believe test-proven even it is general feature there may be changes it may(not) work on all boards. Once the relevant boards have needed it and then it will anyway added.
And I guess the next question would be: what is the targetted use case and why should we enable it for all the boards? We're having binary size issues on the A64, so we really want to provide something meaningful for the majority of our users.
We won't enable something used by only a small fraction, especially when it's so easy to enable it.
Yes, this was tested on this board and it is working. the use-case I've seen to upgrade the target partitioned-disk directly from host instead of plug-and-play every time and especially with eMMC.
thanks!
Hi,
On Tue, Dec 12, 2017 at 02:39:59PM +0530, Jagan Teki wrote:
On Tue, Dec 12, 2017 at 1:42 PM, Maxime Ripard maxime.ripard@free-electrons.com wrote:
Hi,
On Tue, Dec 12, 2017 at 12:28:27PM +0530, Jagan Teki wrote:
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y
How does that work with the current over-size issue we have on the A64?
And I'd also like to keep the way we did things for several years now, which is to *not* have board-specific options selected besides the hardware-related ones.
If you want to enable a general feature, do it for all the boards so that our users will have a consistent experience across boards, and we will not have to always chase all the defconfigs to provide it.
I always believe test-proven even it is general feature there may be changes it may(not) work on all boards. Once the relevant boards have needed it and then it will anyway added.
And this leads to inconsistencies across boards in the features they support, which in turn lead to downstream users being unable to rely on one particular feature being enabled. And really, this is what we've doing all along.
And I guess the next question would be: what is the targetted use case and why should we enable it for all the boards? We're having binary size issues on the A64, so we really want to provide something meaningful for the majority of our users.
We won't enable something used by only a small fraction, especially when it's so easy to enable it.
Yes, this was tested on this board and it is working. the use-case I've seen to upgrade the target partitioned-disk directly from host instead of plug-and-play every time and especially with eMMC.
We already have DFU and fastboot to cover that. Do we really need to have a third option when we already have size issues in our binary?
Really, if someone uses it, then yeah, we should make it as convenient as possible to enable it. But since it's just one option to check, what's the point?
That's also why we have Kconfig after all.
Maxime
在 2017年12月12日星期二 CST 下午4:12:13，Maxime Ripard 写道：
Hi,
On Tue, Dec 12, 2017 at 12:28:27PM +0530, Jagan Teki wrote:
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64"
CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
How does that work with the current over-size issue we have on the A64?
And I'd also like to keep the way we did things for several years now, which is to *not* have board-specific options selected besides the hardware-related ones.
If you want to enable a general feature, do it for all the boards so that our users will have a consistent experience across boards, and we will not have to always chase all the defconfigs to provide it.
I think there's a problem on A64 -- the Pine series are all designed to be host-only, and it's the most popular A64 board series.
And I guess the next question would be: what is the targetted use case and why should we enable it for all the boards? We're having binary size issues on the A64, so we really want to provide something meaningful for the majority of our users.
We won't enable something used by only a small fraction, especially when it's so easy to enable it.
Maxime
On Wednesday, December 13, 2017 2:36:26 AM CET Icenowy Zheng wrote:
在 2017年12月12日星期二 CST 下午4:12:13，Maxime Ripard 写道：
Hi,
On Tue, Dec 12, 2017 at 12:28:27PM +0530, Jagan Teki wrote:
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64"
CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
How does that work with the current over-size issue we have on the A64?
And I'd also like to keep the way we did things for several years now, which is to *not* have board-specific options selected besides the hardware-related ones.
If you want to enable a general feature, do it for all the boards so that our users will have a consistent experience across boards, and we will not have to always chase all the defconfigs to provide it.
I think there's a problem on A64 -- the Pine series are all designed to be host-only, and it's the most popular A64 board series.
No, it just means the *initial* role of the Pine will be Host, but the roles can be swapped using HNP (Host Negotiation Protocol) afterwards, which is pure software.
Regards,
Stefan
On Wed, Dec 13, 2017 at 7:31 AM, Stefan Brüns stefan.bruens@rwth-aachen.de wrote:
On Wednesday, December 13, 2017 2:36:26 AM CET Icenowy Zheng wrote:
在 2017年12月12日星期二 CST 下午4:12:13，Maxime Ripard 写道：
Hi,
On Tue, Dec 12, 2017 at 12:28:27PM +0530, Jagan Teki wrote:
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/bananapi_m64_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 55feafe..d4aade5 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64"
CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set
+CONFIG_CMD_USB_MASS_STORAGE=y
How does that work with the current over-size issue we have on the A64?
And I'd also like to keep the way we did things for several years now, which is to *not* have board-specific options selected besides the hardware-related ones.
If you want to enable a general feature, do it for all the boards so that our users will have a consistent experience across boards, and we will not have to always chase all the defconfigs to provide it.
I think there's a problem on A64 -- the Pine series are all designed to be host-only, and it's the most popular A64 board series.
No, it just means the *initial* role of the Pine will be Host, but the roles can be swapped using HNP (Host Negotiation Protocol) afterwards, which is pure software.
I don't think we can configure otg in peripheral mode, atleast I couldn't find any info in schematics and it's not working at software level(based on my recent test)
thanks!
Sync USB-OTG and USB-OTG-HCI nodes from Linux.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/sun50i-a64-olinuxino.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts index 7bd4730..bd56355 100644 --- a/arch/arm/dts/sun50i-a64-olinuxino.dts +++ b/arch/arm/dts/sun50i-a64-olinuxino.dts @@ -66,6 +66,10 @@ }; };
+&ehci0 { + status = "okay"; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; @@ -77,8 +81,23 @@ status = "okay"; };
+&ohci0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ + usb0_vbus_det-gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + status = "okay"; +};
USB-OTG require MUSB driver along with PHY#0 id(PH9) and/or vbus pin(PH6) through AXP_GPIO driver.
This patch add support for it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/a64-olinuxino_defconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 63a0048..4c3fe75 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_USB0_ID_DET="PH9" +CONFIG_USB0_VBUS_DET="PH6" +CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y @@ -12,4 +15,5 @@ CONFIG_SPL=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
Hi,
On Tue, Dec 12, 2017 at 12:28:29PM +0530, Jagan Teki wrote:
USB-OTG require MUSB driver along with PHY#0 id(PH9) and/or vbus pin(PH6) through AXP_GPIO driver.
This patch add support for it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
configs/a64-olinuxino_defconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 63a0048..4c3fe75 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_USB0_ID_DET="PH9" +CONFIG_USB0_VBUS_DET="PH6" +CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y @@ -12,4 +15,5 @@ CONFIG_SPL=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y
Same question, did you test the host mode?
Maxime
This patch enable ums through CMD_USB_MASS_STORAGE.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/a64-olinuxino_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index 4c3fe75..c1408bd 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino" CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set +CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set
a64-olinuxino has 8GiB eMMC, enable it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/a64-olinuxino_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index c1408bd..6f26e9e 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH9" CONFIG_USB0_VBUS_DET="PH6" CONFIG_AXP_GPIO=y
On Tue, Dec 12, 2017 at 12:28:31PM +0530, Jagan Teki wrote:
a64-olinuxino has 8GiB eMMC, enable it.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com
Acked-by: Maxime Ripard maxime.ripard@free-electrons.com
Maxime
Hi,
On Tue, Dec 12, 2017 at 2:58 PM, Jagan Teki jagan@amarulasolutions.com wrote:
This series deals axp803, musb and related improvements on a64
- axp803 PMIC support used by a64
- a64 musb improvements (rework by Philipp [1])
- musb support for bananapi-m64, a64-olinuxino
[1] https://patchwork.ozlabs.org/patch/729246/
Jagan Teki (11): power: sunxi: add AXP803 PMIC support sunxi: adjust usb bases between H3_H5 vs a64 musb-new: sunxi: add common SUNXI_MUSB_BASE sunxi: usb_phy: Update a64 sunxi_usb_phy base arm64: allwinner: sync bananapi-m64 usb nodes from Linux configs: sun50i: add usb-otg support for bananapi-m64 configs: sun50i: enable ums on bananapi-m64 arm64: allwinner: sync a64-olinuxino usb nodes from Linux configs: sun50i: add usb-otg support for a64-olinuxino configs: sun50i: enable ums on a64-olinuxino configs: sun50i: Enable eMMC on a64-olinuxino
Philipp Tomsich (5): sunxi (sun50i): Set CONFIG_SUNXI_USB_PHYS to 2 (the A64 has 2 PHYs) musb-new: sunxi: a64: add support to select shared phy musb-new: sunxi: a64: adds support for clearing the SIDDP usb: sunxi: set up usb_phy_passby only for HCI sunxi: clock: update a64 usb clock gating and module reset bits
FYI I've been working on getting OTG working for the H3. There are quite a few similar things to change, which is where my musb patch came from.
Alas I haven't been able to get it working in peripheral mode yet. I do have EHCI0/OHCI0 working for host mode though.
ChenYu
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 27 +++ arch/arm/dts/sun50i-a64-olinuxino.dts | 19 ++ arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 16 +- arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 6 + arch/arm/include/asm/arch-sunxi/usb_phy.h | 2 + arch/arm/mach-sunxi/Makefile | 9 + arch/arm/mach-sunxi/pmic_bus.c | 9 +- arch/arm/mach-sunxi/rsb.c | 2 +- arch/arm/mach-sunxi/usb_phy.c | 24 ++- board/sunxi/board.c | 40 ++++ configs/a64-olinuxino_defconfig | 6 + configs/bananapi_m64_defconfig | 4 + drivers/power/Kconfig | 95 +++++++--- drivers/power/Makefile | 3 + drivers/power/axp803.c | 260 ++++++++++++++++++++++++++ drivers/usb/host/ehci-sunxi.c | 10 + drivers/usb/host/ohci-sunxi.c | 10 + drivers/usb/musb-new/musb_regs.h | 3 +- drivers/usb/musb-new/sunxi.c | 24 ++- include/axp803.h | 68 +++++++ include/axp_pmic.h | 4 + include/configs/sun50i.h | 2 +- 22 files changed, 598 insertions(+), 45 deletions(-) create mode 100644 drivers/power/axp803.c create mode 100644 include/axp803.h
-- 2.7.4
On Tue, Dec 12, 2017 at 1:47 PM, Chen-Yu Tsai wens@csie.org wrote:
Hi,
On Tue, Dec 12, 2017 at 2:58 PM, Jagan Teki jagan@amarulasolutions.com wrote:
This series deals axp803, musb and related improvements on a64
- axp803 PMIC support used by a64
- a64 musb improvements (rework by Philipp [1])
- musb support for bananapi-m64, a64-olinuxino
[1] https://patchwork.ozlabs.org/patch/729246/
Jagan Teki (11): power: sunxi: add AXP803 PMIC support sunxi: adjust usb bases between H3_H5 vs a64 musb-new: sunxi: add common SUNXI_MUSB_BASE sunxi: usb_phy: Update a64 sunxi_usb_phy base arm64: allwinner: sync bananapi-m64 usb nodes from Linux configs: sun50i: add usb-otg support for bananapi-m64 configs: sun50i: enable ums on bananapi-m64 arm64: allwinner: sync a64-olinuxino usb nodes from Linux configs: sun50i: add usb-otg support for a64-olinuxino configs: sun50i: enable ums on a64-olinuxino configs: sun50i: Enable eMMC on a64-olinuxino
Philipp Tomsich (5): sunxi (sun50i): Set CONFIG_SUNXI_USB_PHYS to 2 (the A64 has 2 PHYs) musb-new: sunxi: a64: add support to select shared phy musb-new: sunxi: a64: adds support for clearing the SIDDP usb: sunxi: set up usb_phy_passby only for HCI sunxi: clock: update a64 usb clock gating and module reset bits
FYI I've been working on getting OTG working for the H3. There are quite a few similar things to change, which is where my musb patch came from.
OK, are these changes on ML yet? I think H5 also similar like H3. I'm trying for that as well.
thanks!
On Wed, Dec 13, 2017 at 7:51 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
On Tue, Dec 12, 2017 at 1:47 PM, Chen-Yu Tsai wens@csie.org wrote:
Hi,
On Tue, Dec 12, 2017 at 2:58 PM, Jagan Teki jagan@amarulasolutions.com wrote:
This series deals axp803, musb and related improvements on a64
- axp803 PMIC support used by a64
- a64 musb improvements (rework by Philipp [1])
- musb support for bananapi-m64, a64-olinuxino
[1] https://patchwork.ozlabs.org/patch/729246/
Jagan Teki (11): power: sunxi: add AXP803 PMIC support sunxi: adjust usb bases between H3_H5 vs a64 musb-new: sunxi: add common SUNXI_MUSB_BASE sunxi: usb_phy: Update a64 sunxi_usb_phy base arm64: allwinner: sync bananapi-m64 usb nodes from Linux configs: sun50i: add usb-otg support for bananapi-m64 configs: sun50i: enable ums on bananapi-m64 arm64: allwinner: sync a64-olinuxino usb nodes from Linux configs: sun50i: add usb-otg support for a64-olinuxino configs: sun50i: enable ums on a64-olinuxino configs: sun50i: Enable eMMC on a64-olinuxino
Philipp Tomsich (5): sunxi (sun50i): Set CONFIG_SUNXI_USB_PHYS to 2 (the A64 has 2 PHYs) musb-new: sunxi: a64: add support to select shared phy musb-new: sunxi: a64: adds support for clearing the SIDDP usb: sunxi: set up usb_phy_passby only for HCI sunxi: clock: update a64 usb clock gating and module reset bits
FYI I've been working on getting OTG working for the H3. There are quite a few similar things to change, which is where my musb patch came from.
OK, are these changes on ML yet? I think H5 also similar like H3. I'm trying for that as well.
Not yet. I haven't been able to get it working in peripheral mode. The changes for host mode are here:
https://github.com/wens/u-boot-sunxi/commits/libretech-cc
ChenYu
On Thu, Dec 14, 2017 at 8:32 AM, Chen-Yu Tsai wens@csie.org wrote:
On Wed, Dec 13, 2017 at 7:51 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
On Tue, Dec 12, 2017 at 1:47 PM, Chen-Yu Tsai wens@csie.org wrote:
Hi,
On Tue, Dec 12, 2017 at 2:58 PM, Jagan Teki jagan@amarulasolutions.com wrote:
This series deals axp803, musb and related improvements on a64
- axp803 PMIC support used by a64
- a64 musb improvements (rework by Philipp [1])
- musb support for bananapi-m64, a64-olinuxino
[1] https://patchwork.ozlabs.org/patch/729246/
Jagan Teki (11): power: sunxi: add AXP803 PMIC support sunxi: adjust usb bases between H3_H5 vs a64 musb-new: sunxi: add common SUNXI_MUSB_BASE sunxi: usb_phy: Update a64 sunxi_usb_phy base arm64: allwinner: sync bananapi-m64 usb nodes from Linux configs: sun50i: add usb-otg support for bananapi-m64 configs: sun50i: enable ums on bananapi-m64 arm64: allwinner: sync a64-olinuxino usb nodes from Linux configs: sun50i: add usb-otg support for a64-olinuxino configs: sun50i: enable ums on a64-olinuxino configs: sun50i: Enable eMMC on a64-olinuxino
Philipp Tomsich (5): sunxi (sun50i): Set CONFIG_SUNXI_USB_PHYS to 2 (the A64 has 2 PHYs) musb-new: sunxi: a64: add support to select shared phy musb-new: sunxi: a64: adds support for clearing the SIDDP usb: sunxi: set up usb_phy_passby only for HCI sunxi: clock: update a64 usb clock gating and module reset bits
FYI I've been working on getting OTG working for the H3. There are quite a few similar things to change, which is where my musb patch came from.
OK, are these changes on ML yet? I think H5 also similar like H3. I'm trying for that as well.
Not yet. I haven't been able to get it working in peripheral mode. The changes for host mode are here:
Ok, do you have phy data-sheet? I couldn't find it anywhere.
On Thu, Dec 14, 2017 at 2:21 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
On Thu, Dec 14, 2017 at 8:32 AM, Chen-Yu Tsai wens@csie.org wrote:
On Wed, Dec 13, 2017 at 7:51 PM, Jagan Teki jagannadh.teki@gmail.com wrote:
On Tue, Dec 12, 2017 at 1:47 PM, Chen-Yu Tsai wens@csie.org wrote:
Hi,
On Tue, Dec 12, 2017 at 2:58 PM, Jagan Teki jagan@amarulasolutions.com wrote:
This series deals axp803, musb and related improvements on a64
- axp803 PMIC support used by a64
- a64 musb improvements (rework by Philipp [1])
- musb support for bananapi-m64, a64-olinuxino
[1] https://patchwork.ozlabs.org/patch/729246/
Jagan Teki (11): power: sunxi: add AXP803 PMIC support sunxi: adjust usb bases between H3_H5 vs a64 musb-new: sunxi: add common SUNXI_MUSB_BASE sunxi: usb_phy: Update a64 sunxi_usb_phy base arm64: allwinner: sync bananapi-m64 usb nodes from Linux configs: sun50i: add usb-otg support for bananapi-m64 configs: sun50i: enable ums on bananapi-m64 arm64: allwinner: sync a64-olinuxino usb nodes from Linux configs: sun50i: add usb-otg support for a64-olinuxino configs: sun50i: enable ums on a64-olinuxino configs: sun50i: Enable eMMC on a64-olinuxino
Philipp Tomsich (5): sunxi (sun50i): Set CONFIG_SUNXI_USB_PHYS to 2 (the A64 has 2 PHYs) musb-new: sunxi: a64: add support to select shared phy musb-new: sunxi: a64: adds support for clearing the SIDDP usb: sunxi: set up usb_phy_passby only for HCI sunxi: clock: update a64 usb clock gating and module reset bits
FYI I've been working on getting OTG working for the H3. There are quite a few similar things to change, which is where my musb patch came from.
OK, are these changes on ML yet? I think H5 also similar like H3. I'm trying for that as well.
Not yet. I haven't been able to get it working in peripheral mode. The changes for host mode are here:
Ok, do you have phy data-sheet? I couldn't find it anywhere.
No. The only thing we have to go on is the BSP kernel code.
ChenYu
participants (6)
-
Chen-Yu Tsai -
Icenowy Zheng -
Jagan Teki -
Jagan Teki -
Maxime Ripard -
Stefan Brüns